Category Archives: MEMS

Researchers at Aalto University, Finland, have developed a biosensor that enables creating a range of new easy-to-use health tests similar to home pregnancy tests. The plasmonic biosensor can detect diseased exosomes even by the naked eye. Exosomes, important indicators of health conditions, are cell-derived vesicles that are present in blood and urine.

A rapid analysis by biosensors helps recognize inflammatory bowel diseases, cancer and other diseases rapidly and start relevant treatments in time. In addition to using discovery in biomedicine, industry may use advanced applications in energy.

Researchers created a new biosensor by depositing plasmonic metaparticles on a black, physical body that absorbs all incident electromagnetic radiation. A plasmon is a quantum of plasma oscillation. Plasmonic materials have been used for making objects invisible in scientific tests. They efficiently reflect and absorb light. Plasmonic materials are based on the effective polarizabilities of metallic nanostructures.

The carriers containing Ag nanoparticles are covered with various dielectrics of AlN, SiO2 and the composites thereof that are placed on a black background to enhance the reflectivity contrast of various colours at a normal angle of incidence. Credit: Aalto University

The carriers containing Ag nanoparticles are covered with various dielectrics of AlN, SiO2 and the composites thereof that are placed on a black background to enhance the reflectivity contrast of various colours at a normal angle of incidence. Credit: Aalto University

“It is extraordinary that we can detect diseased exosomes by the naked eye. The conventional plasmonic biosensors are able to detect analytes solely at a molecular level. So far, the naked-eye detection of biosamples has been either rarely considered or unsuccessful”, says Professor Mady Elbahri from Aalto University.

Plasmonic dipoles are famous for their strong scattering and absorption. Dr. Shahin Homaeigohar and Moheb Abdealziz from Aalto University explain that the research group has succeeded in demonstrating the as-yet unknown specular reflection and the Brewster effect of ultrafine plasmonic dipoles on a black body host.

“We exploited it as the basis of new design rules to differentiate diseased human serum exosomes from healthy ones in a simple manner with no need to any specialized equipment”, says Dr. Abdou Elsharawy from the University of Kiel.

The novel approach enables a simple and cost-effective design of a perfect colored absorber and creation of vivid interference plasmonic colors.

According to Elbahri, there is no need to use of sophisticated fabrication and patterning methods. It enables naked-eye environmental and bulk biodetection of samples with a very minor change of molecular polarizability of even 0.001%.

Think keeping your coffee warm is important? Try satellites. If a satellite’s temperature is not maintained within its optimal range, its performance can suffer which could mean it could be harder to track wildfires or other natural disasters, your Google maps might not work and your Netflix binge might be interrupted. This might be prevented with a new material recently developed by USC Viterbi School of Engineering engineers.

When satellites travel behind the Earth, the Earth can block the sun’s rays from reaching the satellites—cooling them down. In space, a satellite can face extreme temperature variation as much as 190 to 260 degrees Fahrenheit. It’s long been a challenge for engineers to keep satellite temperatures from fluctuating wildly. Satellites have conventionally used one of two mechanisms: physical “shutters” or heat pipes to regulate heat. Both solutions can deplete on-board power reserves. Even with solar power, the output is limited. Furthermore, both solutions add mass, weight and design complexity to satellites, which are already quite expensive to launch.

Taking cues from humans who have a self-contained system to manage internal temperature through homeostasis, a team of researchers including Michelle L. Povinelli, a Professor in the Ming Hsieh Department of Electrical Engineering at the USC Viterbi School of Engineering, and USC Viterbi students Shao-Hua Wu and Mingkun Chen, along with Michael T. Barako, Vladan Jankovic, Philip W.C. Hon and Luke A. Sweatlock of Northrop Grumman, developed a new material to self-regulate the temperature of the satellite. The team of engineers with expertise in optics, photonics, and thermal engineering developed a hybrid structure of silicon and vanadium dioxide with a conical design to better control the radiation from the body of the satellite. It’s like a textured skin or coating.

Vanadium dioxide functions as what is known as a “phase-change” material. It acts in two distinct ways: as an insulator at low temperatures and a conductor at high temperatures. This affects how it radiates heat. At over 134 degrees Fahrenheit (330 degrees Kelvin), it radiates as much heat as possible to cool the satellite down. At about two degrees below this, the material shuts off the heat radiation to warm the satellite up. The material’s conical structure (almost like a prickly skin) is invisible to the human eye at about less than half the thickness of a single human hair–but has a distinct purpose of helping the satellite to switch its radiation on and off very effectively.

Results

The hybrid material developed by USC and Northrop Grumman is twenty times better at maintaining temperature than silicon alone. Importantly, passively regulating heat and temperature of satellites could increase the life span of the satellites by reducing the need to expend on-board power.

Applications on Earth

Besides use on a satellite, the material could also be used on Earth for thermal management. It could be applied to a building over a large area to more efficiently maintain a building’s temperature.

The study, “Thermal homeostasis using microstructured phase-change materials,” is published in Optica. The research was funded by Northrop Grumman and the National Science Foundation. This development is part of a thematic research effort between Northrop Grumman, NG Next Basic Research and USC known as the Northrop Grumman Institute of Optical Nanomaterials and Nanophotonics (NG-ION2).

The researchers are now working on developing the material in the USC microfabrication facility and will likely benefit from the new capabilities in the recently-dedicated John D. O’Brien Nanofabrication Laboratory in the USC Michelson Center for Convergent Bioscience.

ProPlus Design Solutions Inc. and MPI Corporation today announced a strategic partnership agreement and immediate availability of a characterization and modeling solution that integrates ProPlus’ SPICE modeling and noise characterization solution with MPI’s advanced probing technologies.

The integrated solution offers seamless support of the MPI probe stations to perform automated measurement of DC, CV and noise characteristics, enabling MPI users easy access to the most accurate ProPlus SPICE modeling and noise characterization offerings. The advanced probing technologies developed by MPI are optimized for the latest ProPlus 9812DX noise analyzer with improved grounding and shielding technologies critical to wafer-level noise characterization.

Under the partnership agreement, ProPlus users are able to integrate MPI’s advanced semi-automatic probe stations in their characterization and modeling flow for better noise measurement quality. The close collaboration also proved that probe card wafer-level noise characterization is possible using the 9812DX noise analyzer. Previously, these measurements were performed using manipulators and easily introducing RF interferences and oscillations. The advanced probe card technology specially developed for noise measurement provides better data quality and stability, as well as improves flexibility of wafer-level noise characterization for higher throughput.

“ProPlus Design Solutions continues to invest on improving the technologies that made wafer-level noise characterization possible 20 years ago,” remarks Dr. Zhihong Liu, chairman and chief executive officer of ProPlus Design Solutions. “We brought it to the next level with a specially designed probe card for a tightly integrated noise system thus delivering the fastest and most accurate noise characterization of the highest quality. We’re pleased to work with MPI on this effort.”

“The collaboration with ProPlus Design Solutions has enabled a seamlessly integrated wafer level low-frequency noise measurement capability with guaranteed system configuration and performance,” says Dr. Stojan Kanev, general manager of Advanced Semiconductor Test Division at MPI Corporation. “We now offer the most advanced high throughput noise characterization and modeling system. MPI’s exceptional shielding technology provides world class 1/f noise measurement capability. Customers may now rest assured these systems are validated to provide reliable and accurate noise measurement capability while enjoying a reduced cost of test.”

The integrated solution has been adopted by leading semiconductor companies. ProPlus and MPI Corporation will demonstrate the joint solution globally throughout 2018.

Today, SEMI, the global industry association representing the electronics manufacturing supply chain, released its Year-end Forecast at the annual SEMICON Japan exposition. SEMI projects that worldwide sales of new semiconductor manufacturing equipment will increase 35.6 percent to US$55.9 billion in 2017, marking the first time that the semiconductor equipment market has exceeded the previous market high of US$47.7 billion set in 2000. In 2018, 7.5 percent growth is expected to result in sales of US$60.1 billion for the global semiconductor equipment market – another record-breaking year.

The SEMI Year-end Forecast predicts a 37.5 percent increase in 2017, to $45.0 billion, for wafer processing equipment. The other front-end segment, which consists of fab facilities equipment, wafer manufacturing, and mask/reticle equipment, is expected to increase 45.8 percent to $2.6 billion. The assembly and packaging equipment segment is projected to grow by 25.8 percent to $3.8 billion in 2017, while semiconductor test equipment is forecast to increase by 22.0 percent to $4.5 billion this year.

In 2017, South Korea will be the largest equipment market for the first time. After maintaining the top spot for five years, Taiwan will place second, while China will come in third. All regions tracked will experience growth, with the exception of Rest of World (primarily Southeast Asia). South Korea will lead in growth with 132.6 percent, followed by Europe at 57.2 percent, and Japan at 29.9 percent.

SEMI forecasts that in 2018, equipment sales in China will climb the most, 49.3 percent, to $11.3 billion, following 17.5 percent growth in 2017. In 2018, South Korea, China, and Taiwan are forecast to remain the top three markets, with South Korea maintaining the top spot at $16.9 billion. China is forecast to become the second largest market at $11.3 billion, while equipment sales to Taiwan are expected to approach $11.3 billion.

The following results are in terms of market size in billions of U.S. dollars:

equipment forecast

A team of University of Alberta engineers developed a new way to produce electrical power that can charge handheld devices or sensors that monitor anything from pipelines to medical implants. The discovery sets a new world standard in devices called triboelectric nanogenerators by producing a high-density DC current–a vast improvement over low-quality AC currents produced by other research teams.

Jun Liu, a PhD student working under the supervision of chemical engineering professor Thomas Thundat, was conducting research unrelated to these tiny generators, using a device called an atomic force microscope. It provides images at the atomic level using a tiny cantilever to “feel” an object, the same way you might learn about an object by running a finger over it. Liu forgot to press a button that would apply electricity to the sample–but he still saw a current coming from the material.

“I didn’t know why I was seeing a current,” he recalled.

One theory was that it was an anomaly or a technical problem, or interference. But Liu wanted to get to the bottom of it. He eventually pinned the cause on the friction of the microscope’s probe on the material. It’s like shuffling across a carpet then touching someone and giving them a shock.

It turns out that the mechanical energy of the microscope’s cantilever moving across a surface can generate a flow of electricity. But instead of releasing all the energy in one burst, the U of A team generated a steady current.

“Many other researchers are trying to generate power at the prototype stages but their performances are limited by the current density they’re getting–that is the problem we solved,” said Liu.

“This is big,” said Thundat. “So far, what other teams have been able to do is to generate very high voltages, but not the current. What Jun has discovered is a new way to get continuous flow of high current.”

The discovery means that nanoscale generators have the potential to harvest power for electrical devices based on nanoscale movement and vibration: an engine, traffic on a roadway–even a heartbeat. It could lead to technology with applications in everything from sensors used to monitor the physical strength of structures such as bridges or pipelines, the performance of engines or wearable electronic devices.

Liu said the applications are limited only by imagination.

IBM’s Khare on A.I.


December 7, 2017

BY PETE SINGER, Editor-in-Chief

Mukesh Khare, VP of IBM Research, talked about the impact artificial intelligence (AI) is going to have on the semiconductor industry during a recent panel session hosted by Applied Materials. He said that today most artificial intelligence is too complex. It requires, training, building models and then doing inferencing using those models. “The reason there is good in artificial intelligence is because of the exponential increase in data, and cheap compute. But, keep in mind that, the compute that we are using right now is the old compute. That compute was built to do spreadsheet, databases, the traditional compute.

“Since that compute is cheap and available, we are making use of it. Even with the cheap and available compute in cloud, it takes months to generate those models. So right now, most of the training is still being done in cloud. Whereas, inferencing, making use from that model is done at the edge. However, going forward, it is not possible because the devices at the edge are continuously generating so much data that you cannot send all the data back to the cloud, generate models, and come back on the edge.

“Eventually, a lot of training needs to move to the edge as well,” Khare said. This will require some innovation so that the compute, which is being done right now in cloud, can be transferred over to edge with low-power devices, cheap devices. Applied Materials’ CIO Jay Kerley added that innovation has to happen not only at the edge, but in the data center and at the network layer, as well as in the software frameworks. “Not only the AI frameworks, but what’s driving compression, de-duplication at the storage layer is absolutely critical as well,” he said.

Khare also weighed in on how transistors and memory will need to evolve to meet the demands of new AI computer architec- tures, “For artificial intelligence in our world, we have to think very differently. This is an inflection, but this is the kind of inflection that world has not seen for last 60 years.” He said the world has gone from tabulating system era (1900 to 1940) to the programmable system era in 1950s, which we are still using. “We are entering the era of what we call cognitive computing, which we believe started in 2011, when IBM first demonstrated artificial intelligence through our Watson System, which played Jeopardy,” he said.

Khare said “we are still using the technology of programmable systems, such as logic, memory, the traditional way of thinking, and applying it to AI, because that’s the best we’ve got.”
AI needs more innovation at all levels, Khare said. “You have to think about systems level optimization, chip design level optimization, device level optimization, and eventually materials level optimization,” he said. “The artificial workloads that are coming out are very different. They do not require the traditional way of thinking — they require the way the brain thinks. These are the brain inspired systems that will start to evolve.”

Khare believes analog compute might hold the answer. “Analog compute is where compute started many, many years ago. It was never adopted because the precision was not high enough, so there were a lot of errors. But the brain doesn’t think in 32 bits, our brain thinks analog, right? So we have to bring those technologies to the forefront,” he said. “In research at IBM we can see that there could be several orders of magnitude reduction in power, or improvement in efficiency that’s possible by intro- ducing some of those concepts, which are more brain inspired.”

Christos Georgiopoulos (former Intel VP and professor who was also on the panel) said a new compute model is required for A.I. “It’s important to understand that the traditional workloads that we all knew and loved for the last forty years, don’t apply with A.I. They are completely new workloads that require very different type of capabilities from the machines that you build,” he said. “With these new kind of workloads, you’re going to require not only new architectures, you’re going to require new system level design. And you’re going to require new capabilities like frameworks. He said TensorFlow, which is an open-source software library for machine intelligence originally developed by researchers and engineers working on the Google Brain Team, seems to be the biggest framework right now. “Google made it public for only one very good reason. The TPU that they have created runs TensorFlow better than any other hardware around. Well, guess what? If you write something on TensorFlow, you want to go to the Google backend to run it, because you know you’re going to get great results. These kind of architectures are getting created right now that we’re going to see a lot more of,” he said.

By Inna Skvortsova, SEMI

Electromagnetic interference (EMI) is an increasingly important topic across the global electronics manufacturing supply chain.  Progressively smaller geometries of ICs, lower supply voltages, and higher data rates all make devices and processes more vulnerable to EMI. Electrical noise, EMI-induced signal generated by equipment, and factors such as power line transients affect manufacturing processes, from wafer handling to wire bonding to PCB assembly and test, causing millions of dollars in losses to the industry. Furthermore, conducted emission capable of causing electrical overstress (EOS) can damage sensitive semiconductor devices.  Intel consistently names EOS as the “number one source of damage to IC components.” (Intel® Manufacturing Enabling Guide 2001, 2010, 2016).

While EMC (Electromagnetic Compatibility) standards, such as the European EMC Directive and FCC Testing and Certification, etc. provide limits on allowed emission levels of equipment, once the equipment is installed along with other tools, the EMI levels in actual operating environments can be substantially different and therefore impact the equipment operation, performance, and reliability. For example, (i) Occasional transients induce “extra” pulses in rotary feedback of the servo motor which in time contributes to robotic arm’s erroneous position eventually damaging the wafer; (ii) Combination of high-frequency noise from servo motors and switched mode power supplies in the tool creates difference in voltage between the bonding wire/funnel and the device which causes high current and eventual electrical overstress to the devices; (iii) Wafer probe test provides inconsistent results due to high level of EMI on the wafer chuck caused by a combination of several servo motors in the wafer handler.  Field cases like these illustrate the gap between EMC test requirements and real-life EMI tolerance levels and its impact on semiconductor manufacturing and handling.

EMI on AC power lines

EMI on AC power lines

New standard, SEMI E176-1017, Guide to Assess and Minimize Electromagnetic Interference (EMI) in a Semiconductor Manufacturing Environment, developed by the NA Chapter of the Global Metrics Technical Committee bridges this gap. Targeted to IC manufacturers and anyone handling semiconductor devices, such as PCB assembly and integration of electronic devices, SEMI E176 is a practical guide as well as an educational document. SEMI E176 provides a concise summary of EMI origins, EMI propagation, measurement techniques and recommendations on mitigation of undesirable electromagnetic emission to enable equipment co-existence and proper operation as well as reduction of EOS in its intended usage environment. Specifically, E176 provides recommended levels for different types of EMI based on IC geometries.

“SEMI E176 is likely the only active Standard in the entire industry providing recommendations on both acceptable levels of EMI in manufacturing environments and the means of achieving and maintaining these numbers,” said Vladimir Kraz, co-Chair of the NA Metrics Technical Committee and president of OnFILTER, Inc. “E176 is also unique because it is not limited just to semiconductor manufacturing, but has application across other industries.  Back-end assembly and test, as well as PCB assembly are just as affected by EMI and can benefit from SEMI E176 implementation as there are strong similarities between handling of semiconductor devices in IC manufacturing and in PCB assemblies and prevention of defects is often shared between IC and PCBA manufacturers.”

The newly published SEMI E176 and recently updated SEMI E33-0217, Guide for Semiconductor Manufacturing Equipment Electromagnetic Compatibility (EMC),provide complete documentation for establishing and maintaining low EMI levels in the manufacturing environment.

Undesirable emission has operational, liability and regulatory consequences.  Taming it is a challenging task and requires a comprehensive approach that starts from proper system design practices and ends with developing EMI expertise in the field.  The new SEMI 176 provides practical guidance on reducing EMI to the levels necessary for effective high yield semiconductor manufacturing today and in the future.

SEMI Standards development activities take place throughout the year in all major manufacturing regions. To get involved, join the SEMI International Standards Program at: www.semi.org/standardsmembership.

 

Integrated circuit sales for automotive systems and the Internet of Things are forecast to grow 70% faster than total IC revenues between 2016 and 2021, according to IC Insights’ new 2018 Integrated Circuit Market Drivers Report.  ICs used in automobiles and other vehicles are forecast to generate worldwide sales of $42.9 billion in 2021 compared to $22.9 billion in 2016, while integrated circuit revenues for Internet of Things (IoT) functionality in a wide range of systems, sensors, and objects are expected to reach $34.2 billion in four years compared to $18.4 billion last year, says the new 358-page report.

Between 2016 and 2021, automotive and IoT IC sales are projected to rise by compound annual growth rates (CAGRs) of 13.4% and 13.2%, respectively, compared to 7.9% for the entire IC market, which is projected to reach $434.5 billion in four years versus $297.7 billion last year.  As shown in Figure 1, strong five-year IC sales growth rates are also expected in medical electronics (a CAGR of 9.7% to $7.8 billion in 2021) and wearable systems (a CAGR of 9.0% to $4.9 billion).

Figure 1

Figure 1

Cellphone IC sales—the biggest end-use market application for integrated circuits, accounting for about 25% of the IC market’s total revenues—are expected to grow by a CAGR of 7.8% in the 2016-2021 period, reaching $105.6 billion in the final year of the new report’s forecast. Meanwhile, weak and negative IC sales growth rates are expected to continue in video game consoles (a CAGR of -1.9% to $9.7 billion in 2021) and tablet computers (a CAGR of -2.3% to 10.7 billion), according to the 2018 IC Market Drivers report.

Sharply higher average selling prices (ASPs) for DRAMs and NAND flash are playing a significant role in driving up dollar-sales volumes for ICs in cellphones and PCs (both desktop and notebook computers) in 2017.  Cellphone IC sales are on pace to surge 24% this year to an estimated $89.7 billion, while PC integrated circuit dollar volume is expected to climb 17.6% to $69.0 billion.   For both the cellphone and PC market segments, 2017 will be the strongest increase in IC sales since the 2010 recovery year from the 2009 downturn.  The 2018 IC Market Drivers report’s forecast shows cellphone integrated circuit sales rising 8% to $97.3 billion next year and PC IC revenues growing 5% to $72.6 billion in 2018.

The new report estimates that automotive IC sales will rise 22% in 2017 to about $28.0 billion after increasing 11% in 2016. Automotive IC sales are forecast to increase 16% in 2018 to $32.4 billion. Meanwhile, IoT-related integrated circuit sales are on pace to grow 14% in 2017 to an estimated $14.5 billion after increasing about 18% in 2016.  In 2018, integrated circuit sales for Internet of Things end-use applications are expected to rise 16% to about $16.8 billion, according to the 2018 edition of the IC Market Drivers report.

The Semiconductor Industry Association (SIA) today announced worldwide sales of semiconductors reached $37.1 billion for the month of October 2017, an increase of 21.9 percent from the October 2016 total of $30.4 billion and 3.2 percent more than last month’s total of $36.0 billion. October marked the global industry’s largest-ever monthly sales total. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average. Additionally, the latest WSTS industry forecast was revised upward and now projects annual global market growth of 20.6 percent in 2017 and 7.0 percent in 2018.

“The global semiconductor market continued to grow impressively in October, with sales surpassing the industry’s highest-ever monthly total and moving closer to topping $400 billion for 2017,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Market growth continues to be driven in part by high demand for memory products, but combined sales of all other semiconductor products were up substantially as well, showing the breadth of the market’s strength this year.”

Regionally, year-to-year sales increased in the Americas (40.9 percent), Europe (19.5 percent), China (19.1 percent), Asia Pacific/All Other (16.3 percent), and Japan (10.7 percent). Compared with last month, sales were up more modestly across all regions: the Americas (6.8 percent), China (2.6 percent), Europe (2.6 percent), Japan (1.8 percent), and Asia Pacific/All Other (1.5 percent).

Additionally, SIA today endorsed the WSTS Autumn 2017 global semiconductor sales forecast, which projects the industry’s worldwide sales will be $408.7 billion in 2017. This would mark the industry’s highest-ever annual sales, its first time topping $400 billion, and a 20.6 percent increase from the 2016 sales total. WSTS projects double-digit year-to-year increases across all regional markets for 2017: the Americas (31.9 percent), Asia Pacific (18.9 percent), Europe (16.3 percent), and Japan (12.6 percent). Beyond 2017, growth in the semiconductor market is expected to moderate across all regions. WSTS tabulates its semi-annual industry forecast by convening an extensive group of global semiconductor companies that provide accurate and timely indicators of semiconductor trends.

To find out how to purchase the WSTS Subscription Package, which includes comprehensive monthly semiconductor sales data and detailed WSTS Forecasts, please visit http://www.semiconductors.org/industry_statistics/wsts_subscription_package/. For detailed data on the global and U.S. semiconductor industry and market, consider purchasing the 2017 SIA Databook: https://www.semiconductors.org/forms/sia_databook/.

Oct 2017

Billions

Month-to-Month Sales                              

Market

Last Month

Current Month

% Change

Americas

7.99

8.54

6.8%

Europe

3.28

3.37

2.6%

Japan

3.14

3.20

1.8%

China

11.36

11.65

2.6%

Asia Pacific/All Other

10.18

10.33

1.5%

Total

35.95

37.09

3.2%

Year-to-Year Sales                         

Market

Last Year

Current Month

% Change

Americas

6.06

8.54

40.9%

Europe

2.82

3.37

19.5%

Japan

2.89

3.20

10.7%

China

9.78

11.65

19.1%

Asia Pacific/All Other

8.88

10.33

16.3%

Total

30.43

37.09

21.9%

Three-Month-Moving Average Sales

Market

May/Jun/Jul

Aug/Sep/Oct

% Change

Americas

6.94

8.54

23.0%

Europe

3.20

3.37

5.1%

Japan

3.04

3.20

5.2%

China

10.68

11.65

9.1%

Asia Pacific/All Other

9.77

10.33

5.8%

Total

33.63

37.09

10.3%

Quantenna Communications, Inc. (Nasdaq:QTNA), a developer of high performance Wi-Fi solutions, today announced that Dr. Nambi Seshadri, Quantenna’s chief technologist has been selected as the 2018 IEEE Alexander Graham Bell Medal recipient for exceptional contributions to wireless, networking and engineering. In addition to this highest honor, Seshadri’s prize consists of a gold medal, a bronze replica, a certificate, and an honorarium.

“The innovations by Nambi form the basis for some of today’s Wi-Fi and other wireless networking standards and systems, now in use by billions of Wi-Fi users,” said Dr. Sam Heidari, Chairman and Chief Executive Officer, Quantenna. “We are honored to have such a distinguished and accomplished chief technologist on our team. The process is extraordinarily competitive, this is a great lifetime accomplishment and one of the most prestigious honors that one may receive in our field.”

Every year, the IEEE board of directors selects a SINGLE individual to receive the IEEE Alexander Graham Bell Medal. The selection criteria used include weighing the value of the individual’s contribution to communication among people as well as to communication sciences and engineering, and an evaluation of the contributor, nominator and references. The timeliness of the recognition, and quality of the nomination also are considered.

The IEEE Alexander Graham Bell Medal was established in 1976 by the IEEE Board of Directors, in commemoration of the centennial of the telephone’s invention, to provide recognition for outstanding contributions to telecommunications. The invention of the telephone by Alexander Graham Bell in 1876 was a major event in electrotechnology. It was instrumental in stimulating the broad telecommunications industry that has dramatically improved life throughout the world. As an individual, Bell himself exemplified the contributions that scientists and engineers have made to the betterment of mankind.

In addition to serving as chief technologist to Quantenna, Seshadri is a Professor of Electrical and Computer Engineering (ECE) for the University of California, San Diego. Prior to Quantenna, Seshadri held multiple senior positions at Broadcom Corporation where he helped Broadcom’s wireless initiatives, including it’s foray into cellular, mobile multimedia, low power wireless connectivity, GPS and others. During 2011-2014, he also served as the General Manager of the Mobile Platforms Business Unit. Prior to joining Broadcom Corporation, he was a Member of Technical Staff at with AT&T Bell Lab Laboratories and Head of Communications Research at AT&T Shannon Labs where he contributed to fundamental advances in wireless communication theory and practice.

Seshadri was elected Fellow of the Institute of Electrical and Electronic Engineers (IEEE) in 2000 and was elected to the National Academy of Engineering (USA) in 2012 and as a Foreign Member of the Indian National Academy of Engineering in the year 2013. He holds approximately 200 patents. He was a co-recipient of the IEEE Information Theory Paper Award in 1999 for his paper with Tarokh and Calderbank on space-time codes, and his IEEE Journal on Selected Areas In Communications (JSAC) paper on space-time coding modems with Naguib, Tarokh, and Calderbank was selected by IEEE Communication Society for publication in, “The Best of the Best: Fifty Years of Communications and Networking Research,” for 2003.