Category Archives: MEMS

Nanoelectronics research center imec and Vrije Universiteit Brussel (VUB) present a frequency division duplex (FDD) balance network, capable of dual-frequency impedance tuning for all LTE bands in the 0.7-to-1GHz range. When integrated into an electrical-balance duplexer (EBD), it enables FDD duplexing with antennas in real-world environments, paving the way to high-performance, low-power, low-cost solutions for mobile communication.

An electrical balance duplexer is a tunable RF front-end concept that seeks to address several key challenges of 4G and 5G mobile systems. It balances an on-chip tunable impedance, the so-called balance network, with the antenna impedance, to provide transmit-to-receive (TX-to-RX) isolation and avoid unwanted frequency components in the received signal. It is a promising alternative to the fixed frequency surface-acoustic wave (SAW) filters implemented in today’s mobile phones as more and more SAW duplexers would be needed to support the ever growing amount of bands adopted by operators, increasing size and cost of these devices. Unlike filter-based front-ends, electrical-balance duplexers provide signal cancellation, which could help enable in-band full-duplex for double capacity and increased network density, among other benefits, for next-generation standards.

Imec and VUB’s dual-frequency balance network is the first FDD balance network that allows balancing the on-chip tunable impedance profile with the impedance profile of an antenna at two frequencies, simultaneously. This is crucial, because in real-world situations, the frequency-dependent impedance of an antenna varies over environmental conditions and limits the achievable isolation bandwidth. The balance network can generate, for any LTE band within 0.7-1GHz, a simultaneous transmit-frequency impedance and receive-frequency impedance to provide high TX-to-RX isolation at both frequencies. It is fabricated in a 0.18µm partially depleted RF SOI CMOS technology, which allows it to better withstand the large voltages present in the EBD during full-power TX operation. The active area of the balance network, which consists of 19 switched capacitors and 10 inductors, is 8.28mm2. The balance network is tuned by an in-house developed custom algorithm, which can optimize the tuning codes of all 19 capacitor banks using only the isolation at the TX and RX frequencies as input.

These results were presented at this month’s IEEE International Solid-State Circuits Conference (ISSCC2016). Imec is present at Mobile World Congress 2016 (February 22-26, 2016, Flanders Investment & Trade booth, Hall 7, G71) to showcase its 5G radio technology, mm-wave communication and sensing, ultra-low power radio, sensors and IoT networks, wearable technologies for health, and IC design services.

imec chip

Imagine a hand-held environmental sensor that can instantly test water for lead, E. coli, and pesticides all at the same time, or a biosensor that can perform a complete blood workup from just a single drop. That’s the promise of nanoscale plasmonic interferometry, a technique that combines nanotechnology with plasmonics–the interaction between electrons in a metal and light.

Now researchers from Brown University’s School of Engineering have made an important fundamental advance that could make such devices more practical. The research team has developed a technique that eliminates the need for highly specialized external light sources that deliver coherent light, which the technique normally requires. The advance could enable more versatile and more compact devices.

Plasmonic interferometers that have light emitters within them could make for better, more compact biosensors. Credit: Pacifici Lab / Brown University

Plasmonic interferometers that have light emitters within them could make for better, more compact biosensors. Credit: Pacifici Lab / Brown University

“It has always been assumed that coherent light was necessary for plasmonic interferometry,” said Domenico Pacifici, a professor of engineering who oversaw the work with his postdoctoral researcher Dongfang Li, and graduate student Jing Feng. “But we were able to disprove that assumption.”

Plasmonic interferometers make use of the interaction between light and surface plasmon polaritons, density waves created when light energy rattles free electrons in a metal. One type of interferometer looks like a bull’s-eye structure etched into a thin layer of metal. In the center is a hole poked through the metal layer with a diameter of about 300 nanometers–about 1,000 times smaller than the diameter of a human hair. The hole is encircled by a series of etched grooves, with diameters of a few micrometers. Thousands of these bulls-eyes can be placed on a chip the size of a fingernail.

When light from an external source is shown onto the surface of an interferometer, some of the photons go through the central hole, while others are scattered by the grooves. Those scattered photons generate surface plasmons that propagate through the metal inward toward the hole, where they interact with photons passing through the hole. That creates an interference pattern in the light emitted from the hole, which can be recorded by a detector beneath the metal surface.

When a liquid is deposited on top of an interferometer, the light and the surface plasmons propagate through that liquid before they interfere with each other. That alters the interference patterns picked up by the detector depending on the chemical makeup of the liquid or compounds present in it. By using different sizes of groove rings around the hole, the interferometers can be tuned to detect the signature of specific compounds or molecules. With the ability to put many differently tuned interferometers on one chip, engineers can hypothetically make a versatile detector.

Up to now, all plasmonic interferometers have required the use of highly specialized external light sources that can deliver coherent light–beams in which light waves are parallel, have the same wavelength, and travel in-phase (meaning the peaks and valleys of the waves are aligned). Without coherent light sources, the interferometers cannot produce usable interference patterns. Those kinds of light sources, however, tend to be bulky, expensive, and require careful alignment and periodic recalibration to obtain a reliable optical response.

But Pacifici and his group have come up with a way to eliminate the need for external coherent light. In the new method, fluorescent light-emitting atoms are integrated directly within the tiny hole in the center of the interferometer. An external light source is still necessary to excite the internal emitters, but it need not be a specialized coherent source.

“This is a whole new concept for optical interferometry,” Pacifici said, “an entirely new device.”

In this new device, incoherent light shown on the interferometer causes the fluorescent atoms inside the center hole to generate surface plasmons. Those plasmons propagate outward from the hole, bounce off the groove rings, and propagate back toward the hole after. Once a plasmon propagates back, it interacts with the atom that released it, causing an interference with the directly transmitted photon. Because the emission of a photon and the generation of a plasmon are indistinguishable, alternative paths originating from the same emitter, the process is naturally coherent and interference can therefore occur even though the emitters are excited incoherently.

“The important thing here is that this is a self-interference process,” Pacifici said. “It doesn’t matter that you’re using incoherent light to excite the emitters, you still get a coherent process.”

In addition to eliminating the need for specialized external light sources, the approach has several advantages, Pacifici said. Because the surface plasmons travel out from the hole and back again, they probe the sample on top of the interferometer surface twice. That makes the device more sensitive.

But that’s not the only advantage. In the new device, external light can be projected from underneath the metal surface containing the interferometers instead of from above. That eliminates the need for complex illumination architectures on top of the sensing surface, which could make for easier integration into compact devices.

The embedded light emitters also eliminate the need to control the amount of sample liquid deposited on the interferometer’s surface. Large droplets of liquid can cause lensing effects, a bending of light that can scramble the results from the interferometer. Most plasmonic sensors make use of tiny microfluidic channels to deliver a thin film of liquid to avoid lensing problems. But with internal light emitters excited from the bottom surface, the external light never comes in contact with the sample, so lensing effects are negated, as is the need for microfluidics.

Finally, the internal emitters produce a low intensity light. That’s good for probing delicate samples, such as proteins, than can be damaged by high-intensity light.

More work is required to get the system out of the lab and into devices, and Pacifici and his team plan to continue to refine the idea. The next step will be to try eliminating the external light source altogether. It might be possible, the researchers say, to eventually excite the internal emitters using tiny fiber optic lines, or perhaps electric current.

Still, this initial proof-of-concept is promising, Pacifici said.

“From a fundamental standpoint, we think this new device represents a significant step forward,” he said, “a first demonstration of plasmonic interferometry with incoherent light.”

Mobile Experts released a new report today on Wi-Fi Semiconductors, highlighting the trends in combo chips, SoCs, power amplifiers, LNAs, switches, and Front End Modules (FEMs).  The report covers both access point hardware and client devices, with detailed information regarding the trends to higher levels of integration, higher level MIMO, new standards, and changes in semiconductor process technologies.

Principal Analyst Joe Madden explained, “The market for Wi-Fi semiconductors has been around for many years, but it’s heading into a major growth phase.   More than 77% of mobile traffic actually moves over Wi-Fi, so the Wi-Fi semiconductor market has doubled in size over the past four years.   It will double again by 2020.”

“Several factors are driving massive growth in Wi-Fi semiconductors.   Wi-Fi is migrating to dual-band operation, with MIMO growing steadily in client devices and APs.  The standards are moving to higher functionality, with wider channels and higher order modulation, driving more difficult power amplifier specifications.   At the same time, new IoT devices are emerging with unique requirements in terms of cost, power efficiency, and performance.”

Mr. Madden continued, “As usual, Mobile Experts dove deeply into the RF technology here, and we have determined the direction for GaAs and RF SOI devices, as well as the direction of integration trends for RF devices.”

This report includes 36 charts and diagrams to illustrate both technical and financial analysis for Wi-Fi semiconductors.  A five-year forecast is included for shipments and revenue, related to AP SOCs, AP RF modules, client “combo chips”, client RF modules, and IoT devices.  The document reports on market share for APs, SoCs, and RF devices.

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that WIKA Group, a global leader in pressure, temperature and level measurement technology, has placed an EVG HERCULES lithography track system into production for manufacturing pressure sensor devices. The HERCULES system has already been installed and is in operation at WIKA’s fabrication headquarters in Klingenberg, Germany.

The EVG HERCULES system combines spray coat, development, wafer prime and bake/chill modules with a mask alignment and exposure tool in a fully automated production platform. To meet WIKA’s unique high-product-mix manufacturing needs, EVG has implemented several new features to this highly customized system. These include fully automated mask selection, handling and alignment capabilities, which allow users to keep the system in continuous operation while switching out substrate lots that require different geometry masks and carrier sizes for variable customer demands. This mode is also supported by optimized smart scheduling software, which automatically manages process recipes and ensures optimal process flow by pre-calculating the estimated process duration and time of transfer between process steps for each carrier substrate or lithography mask. The smart scheduling software ensures that critical process steps are carried out with repeatable, fixed durations, and can adjust to changes in material or process flow in real time. Benefits include improved process control, throughput optimization and productivity.

“Our business involves the lean production of a wide variety of specialized sensors that include many different materials and design features for customized requirements. As a result, we need manufacturing solutions that are stable, flexible and can be easily adapted to our diverse production needs,” stated Dr. Lorenz A. Kehrer, Sensor Development at WIKA. “EV Group has been our supplier of choice for lithography track systems, and adding their fully automated HERCULES system to our production flow allows us to increase manufacturing capacity and yield to meet the growing demand for our high-quality products from our versatile customers. EV Group’s expertise in providing world-class automated process solutions for MEMS and sensor manufacturing makes them an ideal partner to support our premium production needs.”

“EV Group’s integrated HERCULES system is a key component in our lithography product portfolio not only in the field of nanoimprint lithography but also for our MEMS customers applying photolithography processes,” stated Hermann Waltl, executive sales and customer support director at EV Group. “HERCULES leverages our expertise in mask alignment, resist processing, automation and software engineering to provide customers with a comprehensive future-proof lithography track solution for their volume production needs. Adoption of our lithography solutions, including HERCULES, has been driven not only by commercial applications such as advanced packaging and MEMS, but also by highly specialized applications where the customizable nature of our products coupled with our process and engineering expertise allows us to tailor our solutions to meet each of our customer’s unique requirements.”

At this week’s SPIE Photonics West, imec will present a new set of hyperspectral sensor and camera solutions with extended spectral range, going from the visible light (VIS) up to near infrared (NIR). The new line-scan VNIR (visible to near-infrared) sensor and snapshot mosaic VNIR camera outperform current solutions in spectral range and compactness.

Example applications for the line-scan sensor are machine vision and remote sensing applications, e .g. precision agriculture using UAVs and satellites. It features 140+bands in the 470-900nm range. Its small form factor is the result of extreme integration of the hyperspectral filter onto the CMOS sensor.

Imec’s 450-875nm snapshot dual-sensor camera targets applications where dynamc effects are imaged: especially medical, machine vision and security surveillance. By integrating, within one single unified dual-sensor camera architecture, a 16-bands 4×4 mosaic sensor covering the 450-600nm range together with a 25-bands 5×5 mosaic sensor covering the 600-875nm range, imec realized a solution that covers a broad spectral range from visible to near-infrared while maintaining high spatial and spectral resolution tradeoffs.

“Working closely with two of our camera partners, VRmagic and Cubert Gmbh, we have realized one of the most advanced snapshot hyperspectral imaging cameras. It captures 40+ bands ranging from 450-875 m, at video-rate speed acquisition. This achievement clearly sets a new milestone for the real-time snapshot hyperspectral imaging camera market;” explains Jerome Baron, business development manager integrated imaging at imec.

Imec’s new line-scan (visible to near infrared) VNIR sensor and snapshot mosaic VNIR camera will be demonstrated at Booth 4144 at SPIE Photonic West exhibition and will be available for early sampling to strategic partners from April 2016.

Renesas Electronics Corp. reported the development of 90-nanometer (nm) one-transistor MONOS (1T-MONOS) flash memory technology that can be used in combination with a variety of processes, such as CMOS and bipolar CMOS DMOS (BiCDMOS), and provides high program/erase (P/E) endurance and low rewrite energy consumption.

Renesas said that it anticipates that the new flash memory circuit technology will enable it to add flash memory to automotive analog devices with improved performance and reliability.
In a release, the Company noted that this circuit technology makes possible the industry’s first P/E endurance of over 100 million cycles under a high junction temperature (Tj) (Note 2) 175 degrees C, while also delivering low rewrite energy of 0.07 mJ/8 KB (millijoule: one thousandth of a joule) for low energy consumption.

Renesas reported that the newly developed flash memory technology restrains additional process costs while providing an easy way to add flash memory to automotive analog and power devices. This means that analog circuits for connecting sensors and motors can employ devices that mix microcontroller (MCU) logic and flash memory based on the new technology. It has the potential to substantially reduce the number of chips used in motor control systems, while helping to make them more compact, lightweight, and power efficient.

Additionally, the new flash memory technology achieves over 100 million P/E cycles, making it suitable for applications such as automatic calibration or status recording using high-frequency sampling under actual usage conditions in the field.

Renesas Electronics Corp. is a supplier of microcontrollers.

Worldwide silicon wafer area shipments increased 3 percent in 2015 when compared to 2014 area shipments according to the SEMI Silicon Manufacturers Group (SMG) in its year-end analysis of the silicon wafer industry. However, worldwide silicon revenues decreased by 6 percent in 2015 compared to 2014.

Silicon wafer area shipments in 2015 totaled 10,434 million square inches (MSI), up from the previous market high of 10,098 million square inches shipped during 2014. Revenues totaled $7.2 billion down from $7.6 billion posted in 2014. “Semiconductor silicon shipment levels remained strong throughout most of the year, resulting in record volume shipments,” said Dr. Volker Braetsch, chairman SEMI SMG and senior vice oresident of Siltronic AG. “The strength in shipments was not enough to compensate headwinds from further price decline and some exchange rate impact; silicon revenues for the year decreased yet again and are significantly below their market high set in 2007.”

Annual Silicon* Industry Trends

2007

2008

2009

2010

2011

2012

2013

2014

2015

Area Shipments (MSI)

8,661

8,137

6,707

9,370

9,043

9,031

9,067

10,098

10,434

Revenues ($B)

12.1

11.4

6.7

9.7

9.9

8.7

7.5

7.6

7.2

*Shipments are for semiconductor applications only and do not include solar applications

Silicon wafers are the fundamental building material for semiconductors, which in turn, are vital components of virtually all electronics goods, including computers, telecommunications products, and consumer electronics. The highly engineered thin round disks are produced in various diameters (from one inch to 12 inches) and serve as the substrate material on which most semiconductor devices or “chips” are fabricated.

All data cited in this release is inclusive of polished silicon wafers, including virgin test wafers and epitaxial silicon wafers, as well as non-polished silicon wafers shipped by the wafer manufacturers to the end-users.

The Silicon Manufacturers Group acts as an independent special interest group within SEMI and is open to SEMI members involved in manufacturing polycrystalline silicon, monocrystalline silicon or silicon wafers (e.g., as cut, polished, epi, etc.). The purpose of the group is to facilitate collective efforts on issues related to the silicon industry including the development of market information and statistics about the silicon industry and the semiconductor market.

IC Insights recently released its new Global Wafer Capacity 2016-2020 report that provides in-depth detail, analyses, and forecasts for IC industry capacity by wafer size, by process geometry, by region, and by product type through 2020.

Researchers estimate that there are about 80,000 earthquakes globally each year, but most are too minor to notice. The Great East Japan Earthquake (a.k.a., 2011 Tohoku Earthquake) and subsequent tsunami that struck east of Sendai on March 11, 2011 caused substantial loss of life and destruction to infrastructure. It was the most powerful earthquake ever to hit Japan and the fifth most powerful in the world since records started being kept in 1900. Many semiconductor fabs, as well as other facilities that support the industry, were significantly damaged by the quake (some were shut down permanently as a result).

Since the earliest days of IC production in Silicon Valley, the IC industry has always had much of its fabrication facilities located in seismically active regions. Moreover, as of December 2015, roughly half of the world’s total IC wafer production capacity was located in seismically active areas (defined as areas having moderate to high risk of being significantly impacted by earthquake tremors).

  • Taiwan and Japan accounted for 39% of global IC capacity in December of 2015. Both countries are considered entirely seismically active, and have large amounts of IC capacity exposed to potential earthquake damage.
  • Even though Southeast Asia is generally considered very active seismically, Singapore and Malaysia are actually considered relatively safe from earthquake damage. In China, Beijing is considered to have moderate-to-high seismic risk, but other cities such as Shanghai, Shenzhen, and Wuxi are considered to be “on solid ground.” Similarly, while the Southern part of France has moderate seismic risk, the Central and Northern areas do not.

As shown in Figure 1, 64% of pure-play IC foundry capacity is located in seismically active regions. Since two of the largest pure-play IC foundries in the world (TSMC and UMC) have such a significant presence in Taiwan, a disastrous earthquake or typhoon in that country would have serious ramifications for the entire electronics supply chain. In fact, because IC foundries have so many different customers and are sole-source producers for such a wide variety of part types, the ramifications of damage to IC foundry fabrication facilities would be much greater than damage done to individual IDM IC fabs.

Figure 1

Figure 1

A few years ago, IC Insights was contracted to perform a proprietary market research report for a large insurance company.  This company wanted to develop a model that showed how much in electronic system sales would be lost if the fabs in Taiwan were shut down for one, two, or three months due to damage caused by an earthquake or typhoon.  When considering only the Hsinchu Science Park, which is home to about 45% of the island nation’s total wafer capacity, it was determined that, for each month of net loss resulting from the Hsinchu fabs being out of operation, a $9.3 billion net negative effect would be exerted on worldwide electronic system sales!

Although the IC industry has always had the majority of its fabrication capacity located in “dangerous” areas, most buyers of ICs don’t give this a second thought.  Ultimately, all that really can be said about the ability to predict devastating natural disasters is that everything is just “fine” until one day it isn’t. However, while these tragic events are impossible to predict, they are not impossible to plan for.  The Great East Japan Earthquake should have been a wake-up call to spur the entire electronics supply chain to create new contingency plans, just in case.

Reforms to revitalize the Russian electronics industry continue to create opportunities in the region. SEMICON Russia 2016 on 7-9 June will provide insights into market developments, technology, and business opportunities, short and long-term. SEMICON Russia 2016 is a forum for microelectronics manufacturing in Russia, connecting the full complete electronics supply chain – from material and equipment to manufacturing, services, components and applications.

Investment opportunities in Russia are largely driven by government strategy to develop domestic industries and public funding programs and present significant potential for companies. State support for the electronics industry is expected to grow, following the industrial policy law adopted at the end of 2014 that forecasts state investment, incentives and tax advantages for developing and manufacturing competitive products in Russia. State investment programs for the period 2014-2020 project a total of 130 new plants and renovated manufacturing sites, with an estimated total investment of $13 billion in R&D and infrastructure, including equipment renovation.

As a kick-off event for SEMICON Russia 2016, SEMI will host the first Hi-Tech Strategy Symposium Russia on the 7 June in Moscow.  Based on SEMI’s successful business symposiums, such as Industry Strategy Symposium (ISS) U.S. and ISS Europe, this will be the inaugural year for this program in Russia.  The TechARENA program this year will focus on a wide range of applications including: MEMS for the Internet of Everything, Medical Technology, Smart City, Industry 4.0, Aerospace Electronics, Power Electronics, and Plastic Electronics.  In addition, there will be a focus on innovation with a StartUp Zone which features regional innovation clusters.

The Call for Papers for SEMICON Russia is now open. Submit an abstract to present at SEMICON Russia conferences: MEMS for the Internet of Everything, Medical Technology Conference, Smart City, Industry 4.0, Aerospace Electronics, Power Electronics, and Plastic Electronics.  Visit our Call for Papers page to learn how to become a presenter. To exhibit at SEMICON Russia 2016, visit the exhibitor webpage.

The road to more versatile wearable technology is dotted with iron. Specifically, quantum dots of iron arranged on boron nitride nanotubes (BNNTs). The new material is the subject of a study to be published in Scientific Reports later this week, led by Yoke Khin Yap, a professor of physics at Michigan Technological University.

Yap says the iron-studded BNNTs are pushing the boundaries of electronics hardware. The transistors modulating electron flow need an upgrade.

“Look beyond semiconductors,” he says, explaining that materials like silicon semiconductors tend to overheat, can only get so small and leak electric current.

The key to revamping the fundamental base of transistors is creating a series of stepping-stones that use quantum tunneling.

The nanotubes are the mainframe of this new material. BNNTs are great insulators and terrible at conducting electricity. While at first that seems like an odd choice for electronics, the insulating effect of BNNTs is crucial to prevent current leakage and overheating. Additionally, electron flow will only occur across the metal dots on the BNNTs.

In past research, Yap and his team used gold for quantum dots, placed along a BNNT in a tidy line. With enough energy potential, the electrons are repelled by the insulating BNNT and hopscotch from gold dot to gold dot. This electron movement is called quantum tunneling.

“Imagine this as a river, and there’s no bridge; it’s too big to hop over,” Yap says. “Now, picture having stepping stones across the river–you can cross over, but only when you have enough energy to do so.”

Unlike with semiconductors, there is no classical resistance with quantum tunneling. No resistance means no heat. Plus, these materials are very small; the nanomaterials enable the transistors to shrink as well. An added bonus is that BNNTs are also quite flexible, a boon for wearable electronics.