Category Archives: MEMS

Worcester, MA — November 3, 2015 — Allegro MicroSystems, LLC announced the release of a unique dual-channel Hall-effect latch featuring two-dimensional (2D) sensing via a combination of vertical Hall and planar Hall elements. The quadrature outputs of the A1262 allow rotation direction and position to be determined, such as when sensing a rotating ring-magnet target. The unique 2D operation of the combined planar and vertical Hall elements allows the end user to achieve an ideal 90° of phase separation between channels that is inherently independent of ring magnet geometry (pole pitch). This enables system designers to achieve new mechanical configurations not feasible with traditional planar Hall sensors, including replacing through-hole SIP devices with tiny surface-mount SOT23 ICs, saving space and cost. This new device is targeted at applications in the automotive, industrial, and consumer markets such as motor commutation and rotary position sensing, e.g., window blinds, garage door openers, scroll wheels, power window lifts, sunroof/sliding door/trunk/tailgate motors, white goods, etc.

Allegro’s A1262 is available in two options that allow flexibility in end-system magnetic design. Both options feature a planar Hall element that is sensitive to magnetic fields perpendicular to the face of the package (Z). The other channel comes from a vertical Hall element that is sensitive in either the X or Y direction. The Y option features a vertical Hall plate that is sensitive to magnetic fields parallel with the face of the package across the leaded edges of the package. The X option features a vertical Hall plate that is sensitive to magnetic fields parallel with the face of the package across the leadless edges of the package, resulting in lower total effective air gap than can be achieved with competing solutions.

On a single silicon chip, the device includes: two Hall plates (one planar and one vertical), a multiplexer, a small-signal amplifier, chopper stabilization, a Schmitt trigger, and two short-circuit-protected NMOS output transistors to sink up to 20 mA. The on-board regulator permits operation with supply voltages of 3 to 24 V and adds EMC robustness such as greater protection against high voltage transient events. The A1262 is qualified to AEC-Q100 standards and includes Zener clamps, output short-circuit protection, and reverse-battery protection. Superior high-temperature performance is made possible through dynamic offset cancellation, which reduces the residual offset voltage normally caused by device overmolding, temperature dependencies, and thermal stress.

The device is highly sensitive (BOP = 17 G typical) and its magnetic operating characteristics are specified across the operating voltage and temperature ranges. Package designator “LH5” is a modified SOT23-W surface-mount package, magnetically optimized for a variety of orientations. This package is lead (Pb) free, with 100% matte-tin leadframe plating.

Innovative Micro Technology (IMT), the largest pure-play MEMS manufacturer in the USA, announced today the signing of a partner agreement with Silicon Catalyst, the world’s only startup incubator focused exclusively on semiconductor solutions. The partnership with Silicon Catalyst offers the opportunity for IMT to provide MEMS-related technical consulting, manufacturing expertise and prototypes to the Silicon Catalyst portfolio of startup companies that are considering MEMS sensors and solutions.

“MEMS (micro-electromechanical systems) technology provides the sensing interface to advanced semiconductor devices that are the core of the ‘Internet of Things.’ We believe the infrastructure Silicon Catalyst is establishing to enable the incubation of semiconductor devices provides numerous links with MEMS devices for the sensing of personal health, environment, energy consumption, agriculture and medical treatment. Additional applications for MEMS technologies also improve cellular phone performance, GPS navigation and smart phone battery consumption. We are pleased to partner with Silicon Catalyst to provide these fundamental sensing technologies to their portfolio companies,” said Craig Ensley, CEO of IMT.

The two organizations plan to work together to provide startup companies that are focused on solutions that require MEMS technology with design and process expertise, prototyping, shuttle wafers and office facilities. IMT has a broad range of expertise in the area of MEMS technology. For more than 15 years, IMT has worked with hundreds of companies to assist them with early stage planning, process integration and volume manufacturing. More than 450 MEMS designs have been implemented and run in the IMT manufacturing facilities. Portfolio companies can benefit from the IMT manufacturing experience and participate in various wafer shuttle opportunities for quick turn prototypes and accelerated market introduction of new MEMS devices.

“As we move into the era of IoT, sensors and other innovative MEMS devices become critical for new applications,” said Dan Armbrust, CEO of Silicon Catalyst. “IMT’s impressive MEMS development capability is the ideal resource for our portfolio companies as they innovate in IoT. We look forward to a long and exciting partnership with IMT.”

11/3/2015 Update: The deadline for papers has been extended to November 11, 2015

SEMI announced today that the deadline for presenters to submit an abstract for the 27th annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) is November 2. ASMC, which takes place May 16-19, 2016 in Saratoga Springs, New York, will feature technical presentations of more than 90+ peer-reviewed manuscripts covering critical process technologies and fab productivity. This year’s event features keynotes, a panel discussion, networking events, technical sessions on advanced semiconductor manufacturing, as well as educational tutorials.

ASMC continues to fill a critical need in our industry and provides a venue for industry professionals to network, learn and share knowledge on new and best-method semiconductor manufacturing practices and concepts. Selected speakers have the opportunity to present in front of IC manufacturers, equipment manufacturers, materials suppliers, chief technology officers, operations managers, process engineers, product managers and academia. Technical abstracts are due November 2, 2015. 

This year SEMI is including two new technology areas: 3D/TSV/Interposer and Fabless Experience. SEMI is soliciting technical abstracts in these key technology areas:

  • 3D/TSV/Interposer
  • Advanced Metrology
  • Advanced Equipment Processes and Materials
  • Advanced Patterning / Design for Manufacturability
  • Advanced Process Control (APC)
  • Contamination Free Manufacturing (CFM)
  • Data Management and Data Mining Tools
  • Defect Inspection and Reduction
  • Discrete Power Devices
  • Enabling Technologies and Innovative Devices
  • Equipment Reliability and Productivity Enhancements
  • Fabless Experience
  • Factory Automation
  • Green Factory
  • Industrial Engineering
  • Lean Manufacturing
  • Yield Methodologies

Complete descriptions of each topic and author kit can be accessed at http://www.semi.org/en/node/38316. If you would like to learn more about the conference and the selection process, please contact Margaret Kindling at [email protected] or call 1.202.393.5552.   

Papers co-authored between device manufacturers, equipment or materials suppliers, and/or academic institutions that demonstrate innovative, practical solutions for advancing semiconductor manufacturing are highly encouraged. To submit an abstract, visit http://semi.omnicms.com/semi/asmc2016/collection.cgi

Technical abstracts are due November 2, 2015. To learn more about the SEMI Advanced Semiconductor Manufacturing Conference, visit http://www.semi.org/asmc2016.

Plasma-Therm announced that it has acquired an innovative High Density Radical Flux plasma technology, which enables low-temperature Bosch polymer removal.

High Density Radical Flux — HDRF® —was developed by Nanoplas France as a superior plasma process for low-temperature removal of photoresists and organic polymer residues. These capabilities are especially important for device fabrication steps in the MEMS, LED, and advanced packaging markets.

Plasma-Therm is integrating HDRF technology into its existing suite of plasma etching, deposition, and wafer-dicing products. The Nanoplas-developed HDRF low-temperature photoresist stripping capability is also applicable to Bosch polymer removal after DRIE processing.

“We are eager to make the HDRF technology available to our existing customers and potential customers,” said Ed Ostan, vice president of marketing for Plasma-Therm. “HDRF fits very well into our etch and deposition product line, because this will allow Plasma-Therm to provide multi-step solutions to specialized device manufacturers for both R&D and production use.”

Plasma-Therm will also offer ongoing support to Nanoplas customers. The Nanoplas installed baseis primarily made up of DSB 6000 and DSB 9000 HDRF systems.

HDRF enables removal of photoresist, as well as organic polymers left on trench sidewalls following DRIE processes. These applications are sought for advanced packaging, MEMS, and power devices.

HDRF systems incorporate a multi-zone, remote, inductively coupled plasma (ICP) source, which produces up to 1,000 times greater chemical concentration than a conventional ICP source.

HDRF provides better performance than wet processing and regular plasma processing in terms of selectivity, low damage, flexibility, and high-aspect-ratio efficiency. HDRF provides superior polymer removal efficiency for high-aspect-ratio (greater than 50:1) structures.

With operating temperatures lower than 80° C., and with high selectivity to TiN, Al, Au, SiO2, and Si3N4, HDRF provides damage-free residue removal for ultra-sensitive devices.

Nanoplas introduced the semi-automatic DSB 6000 system in 2008. It was followed in 2011by the fully automatic 200mm DSB 9000 system, which accommodates one or two process modules. Both systems are capable of chemical downstream etching, stripping and cleaning applications. The company also designed the HDRF300 system for advanced cleans for 3D-IC fabrication. Nanoplas customers include global companies utilizing the systems in volume production, and also R&D and pilot line facilities, company officials said.

According to a report from IC Insights, the worldwide market for optoelectronics, sensors and actuators, and discrete semiconductors (O-S-D) has turned into a mixed bag of double-digit growth for several major product categories (lamp devices, infrared circuits, and CMOS image sensors) combined with single-digit declines in sales for nearly a dozen other categories (including most sensors, diodes, rectifiers, and power transistors). Combined revenues for O-S-D products are expected to grow 3% in 2015 to a new record-high $66.4 billion from the current peak of $64.4 billion set in 2014, when sales increased by 9%  (Figure 1). With integrated circuit sales on track to decline by 1% this year, the marketshare of O-S-D products is projected to reach nearly 19% of total semiconductor revenues in 2015, which are now expected to drop by less than a half percent to $354.1 billion.

Figure 1

Figure 1

IC Insights expects growth in the sensor/actuator market segment to slightly strengthen in 2016 with revenues projected to rise 4% to $10.5 billion after increasing just 2% in 2015 to $10.1 billion due to significant price erosion in many sensor product categories.  The commodity-filled discretes segment is expected to recover and grow 3% in 2016 to $22.2 billion after being knocked down 6% in 2015 to $21.5 billion because of a slowdown in equipment manufacturing and weakness in the global economy during the second half of this year.

Optoelectronics is expected to continue to be the strongest growing segment in the O-S-D marketplace during the second half of this decade, primarily because of increasing demand for CMOS image sensors in a wide range of embedded applications (such as automotive, medical, video-surveillance networks, and image recognition systems) along with the spread of solid-state lighting products built with high-brightness light-emitting diodes (LEDs), and the need for more laser transmitters in high-speed optical communication networks.

The other two O-S-D segments — sensors/actuators and discretes — have struggled to maintain consistent growth after rebounding in 2014 from slumps in 2012 and 2013. Discretes semiconductor sales continue to be whipsawed by volatility in product purchases, which have quickly switched on or off depending upon changes in the economic outlook or end-use market demand. Power transistors, which account for more than half of discrete sales, have also seen tremendous swings in demand since 2010.

Additional information regarding market growth trends for optoelectronics, sensors/actuators, and discretes is provided in the October Update to The McClean Report—A Complete Analysis and Forecast of the Integrated Circuit Industry. Expanded coverage and detailed analysis of trends and growth rates in the optoelectronics, sensors/actuators, and discretes market segments is offered in IC Insights’ O-S-D Report—A Market Analysis and Forecast for Optoelectronics, Sensors/Actuators, and Discretes.

SAN JOSE, Calif. — InvenSense, Inc., a leading provider of MEMS sensor platforms, today announced it has released for OEM review UltraPrint™, its ultrasonic fingerprint imaging solution, manufactured on the proprietary InvenSense CMOS-MEMS Platform (ICMP), offering ramp to production in calendar year 2017. As the world’s largest fabless MEMS SOC innovator and source for the eutectically bonded ICMP, InvenSense ships, on average, over twelve million motion or audio sensor SOCs each week to leading global mobile and IoT OEMs.

By adding aluminum nitride-based piezoelectric capacity to its platform, InvenSense is enabling, for the first time, mass manufacture of unique piezoelectric Micromachined Ultrasonic Transducers (pMUT) and transducer arrays, with each transducer element individually controllable through direct wafer-level interconnect to the CMOS ASIC.

This dramatic advancement in acoustic imaging technology will allow manufacturers to seamlessly integrate, on a platform proven capable of accommodating exceptionally high volumes, detailed fingerprint images from the epidermal to dermal layers, and to do so directly through glass or metal, even in the presence of oil, lotions, perspiration or other moisture, and other common contaminants that can easily undermine legacy capacitive solutions. These critical factors enhance live finger authentication and guard against spoofing, thereby increasing security.

Fari Assaderaghi, InvenSense’s Vice President Advanced Technology, commented: “Our proprietary UltraPrint technology is expected to enable, for the first time, deployment of ultrasonic fingerprint solutions under glass, as well as a myriad of other surfaces. This flexibility in sensor placement without cutting a hole in display glass, aluminum, steel or plastic case material is highly valued by mobile and other OEMs. Our innovative team is excited to work with equally motivated partners to quickly bring this new technology to market.”

Mo Maghsoudnia, InvenSense’s Vice President Worldwide Manufacturing, added: “As a leading innovator in MEMS and sensor technology globally, and the world’s only fabless MEMS SOC vendor selling hundreds of millions of motion and audio sensors each year, we have a proven track record of rapidly ramping up innovative new MEMS solutions into mass production. We’re excited to extend the InvenSense CMOS-MEMS Platform to pMUT devices and enable a breakthrough authentication solution for leading mobile and IoT products.”

SAN JOSE, Calif. — mCube, provider of MEMS motion sensors, today announced the industry’s first 3-axis accelerometer which is less than a cubic millimeter in total size (0.9mm3). The MC3571 is only 1.1×1.1×0.74mm in size making it 75% smaller than current 2x2mm accelerometers on the market today, enabling developers to design high-resolution 3-axis inertial solutions for products that require ultra-small sensor form factors.

mCube_MC3571_AccelerometerThe MC3571 features a Wafer Level Chip Scale Package (WLCSP), making it smaller than a grain of sand. This achievement marks a major innovation milestone in the MEMS sensor industry and opens up new design possibilities for the next generation of sleek new mobile phones, surgical devices, and consumer products.

“The new MC3571 truly represents mCube’s vision of delivering a high-performance motion sensor in less than a cubic millimeter size,” said Ben Lee, president and CEO, mCube. “This advancement demonstrates how our monolithic technology can unleash amazing possibilities for designers to create exciting new products that could never be possible with today’s standard 2x2mm sensors.”

“mCube is the first company we’ve seen with a 1.1×1.1mm integrated MEMS+CMOS accelerometer and stretches once again the limits of miniaturization establishing new standards for the industry,” said Guillaume Girardin, Technology & Market Analyst MEMS & Sensors at Yole Développement (Yole). And his colleague, Thibault Buisson, Technology & Market Analyst, Advanced Packaging added: “Clearly, there is a growing trend among consumer companies to transition to wafer-level CSP packaging designs and with the MC3571 inertial motion sensor, mCube is at the forefront of this market evolution and at Yole, we are curious to see how competition will react.”

The high-resolution 14-bit, 3-axis MC3571 accelerometer is built upon the company’s award-winning 3D monolithic single-chip MEMS technology platform, which is widely adopted in mobile handsets with over 100 million units shipped. With the mCube approach, the MEMS sensors are fabricated directly on top of IC electronics in a standard CMOS fabrication facility. Advantages of this monolithic approach include smaller size, higher performance, lower cost, and the ability to integrate multiple sensors onto a single chip.

About the MC3571 Accelerometer

MC3571 is a low-noise, integrated digital output 3-axis accelerometer, which features the following:

  • 8, 10, or 14-bit resolution;
  • Output Data Rates (ODR) up to 1024Hz;
  • Selectable interrupt modes via an I2C bus;
  • Requires only a single external passive component, compared to competitive offerings requiring 2 or more.

Samples of the world’s smallest 1.1×1.1mm WLCSP accelerometer are available to select lead customers now with volume production scheduled for the second quarter of 2016.

 

Mentor Graphics Corporation today announced an update to the Mentor (R) Embedded Nucleus (R) real time operating system (RTOS) targeting low power, next-generation applications for connected embedded and internet of things (IoT) devices. The Nucleus RTOS supports the development of safe and secure applications utilizing the ARM (R) TrustZone (R) in Cortex (R)-A processors. The ARM TrustZone technology provides a system approach to create processor partitioning that isolates both hardware resources and software to help create a “secure” world that is protected from software attacks.

Non-secure applications are executed in the non-isolated domain – the “normal” world- without the ability to impact the applications executing in the secure world. Devices with safety and security operating requirements can isolate and execute secure applications on the Nucleus RTOS in a trusted environment with priority execution over the non-secure applications in the normal world.  Devices requiring a safe domain with dedicated peripherals for trusted applications to support secure software updates, digital rights management, and trusted payments will benefit from the hardware partitioning technology provided by the ARM TrustZone. This release of the Nucleus RTOS also includes support for low power, resource constrained IoT devices with 6LoWPAN and 802.15.4 wireless connectivity.

The explosive growth of smart IoT connected devices with the proliferation of cloud-based services places new requirements on developers to protect assets from software attacks. The ARM TrustZone enables embedded system developers to allocate system peripherals such as secure memory, crypto blocks, wireless devices, LCD screens, and more to a secure operating domain that is isolated from the remaining system. This hardware separation allows for the development of separate, secure applications on Nucleus RTOS in a trusted environment.

“For IoT and other connected applications, the expanded security and low-power connectivity features in Mentor’s Nucleus RTOS provide many of the capabilities needed for the creation of complex heterogeneous IoT systems,” stated Markus Levy, founder and president of EEMBC and The Multicore Association. “These features complement leading-edge hardware capabilities to meet the needs of today’s advanced IoT embedded systems.”

The applications in the secure world have access to all the system resources while a secure monitor acts to ensure the priority execution over the non-secure normal world applications. The secure monitor provides complete isolation to allow for the execution of bare-metal, Linux (R) or Nucleus RTOS-based applications in the normal world without impacting the safe Nucleus RTOS-based applications in the secure world.  The Nucleus RTOS with ARM TrustZone makes it possible to selectively secure peripherals and applications for system isolation to meet safety and security requirements.

“Nucleus RTOS support for ARM TrustZone provides system developers with the ability to meet the highest levels of safety and security for critical applications for heterogeneous OS-based systems,” states Scot Morrison, general manager of runtime solutions, Mentor Graphic Embedded Systems Division, “ARM TrustZone isolates the general purpose operating system, bare metal or Nucleus RTOS in the normal world from the secure application running in Nucleus RTOS in the secure world.”

IoT wearables, portable medical devices, home automation systems, and other smart connected devices are routinely designed with limited system resources to reduce power consumption and extend battery life. Designed for low data rate IP-driven communication, IPv6 over Lower Power Wireless Personal Area Network (6LoWPAN) is an adaptation layer that can be used to connect resource-limited IoT devices to the internet using IP network links like Ethernet, WiFi, or low power wireless connections. The Nucleus RTOS enables the development of IoT devices with 6LoWPAN to allow the low power exchange of data using TCP, UDP, CoAP transport protocols with compatible application layer security protocols such as DTLS. The use of IPv6 addressing allows every IoT device to have a routable IP address to facilitate internet and cloud access using the standard IP network infrastructure. For low power devices, embedded IoT developers can use 6LoWPAN over 802.15.4 wireless communication. With the Nucleus RTOS, IoT end nodes can be connected, monitored and updated using cloud-based services.

Electrons are so 20th century. In the 21st century, photonic devices, which use light to transport large amounts of information quickly, will enhance or even replace the electronic devices that are ubiquitous in our lives today. But there’s a step needed before optical connections can be integrated into telecommunications systems and computers: researchers need to make it easier to manipulate light at the nanoscale.

Researchers at the Harvard John A. Paulson School of Engineering and Applied Sciences (SEAS) have done just that, designing the first on-chip metamaterial with a refractive index of zero, meaning that the phase of light can travel infinitely fast.

In this zero-index material there is no phase advance, instead it creates a constant phase, stretching out in infinitely long wavelengths. (Credit: Peter Allen, Harvard SEAS)

In this zero-index material there is no phase advance, instead it creates a constant phase, stretching out in infinitely long wavelengths. (Credit: Peter Allen, Harvard SEAS)

This new metamaterial was developed in the lab of Eric Mazur, the Balkanski Professor of Physics and Applied Physics and Area Dean for Applied Physics at SEAS, and is described in the journal Nature Photonics.

“Light doesn’t typically like to be squeezed or manipulated but this metamaterial permits you to manipulate light from one chip to another, to squeeze, bend, twist and reduce diameter of a beam from the macroscale to the nanoscale,” said Mazur. “It’s a remarkable new way to manipulate light.”

Although this infinitely high velocity sounds like it breaks the rule of relativity, it doesn’t. Nothing in the universe travels faster than light carrying information — Einstein is still right about that. But light has another speed, measured by how fast the crests of a wavelength move, known as phase velocity. This speed of light increases or decreases depending on the material it’s moving through.

When light passes through water, for example, its phase velocity is reduced as its wavelengths get squished together. Once it exits the water, its phase velocity increases again as its wavelength elongates. How much the crests of a light wave slow down in a material is expressed as a ratio called the refraction index — the higher the index, the more the material interferes with the propagation of the wave crests of light. Water, for example, has a refraction index of about 1.3.

When the refraction index is reduced to zero, really weird and interesting things start to happen.

In a zero-index material, there is no phase advance, meaning light no longer behaves as a moving wave, traveling through space in a series of crests and troughs. Instead, the zero-index material creates a constant phase — all crests or all troughs — stretching out in infinitely long wavelengths.  The crests and troughs oscillate only as a variable of time, not space.

This uniform phase allows the light to be stretched or squished, twisted or turned, without losing energy. A zero-index material that fits on a chip could have exciting applications, especially in the world of quantum computing.

“Integrated photonic circuits are hampered by weak and inefficient optical energy confinement in standard silicon waveguides,” said Yang Li, a postdoctoral fellow in the Mazur Group and first author on the paper. “This zero-index metamaterial offers a solution for the confinement of electromagnetic energy in different waveguide configurations because its high internal phase velocity produces full transmission, regardless of how the material is configured.”

The metamaterial consists of silicon pillar arrays embedded in a polymer matrix and clad in gold film. It can couple to silicon waveguides to interface with standard integrated photonic components and chips.

“In quantum optics, the lack of phase advance would allow quantum emitters in a zero-index cavity or waveguide to emit photons which are always in phase with one another,” said Philip Munoz, a graduate student in the Mazur lab and co-author on the paper.  “It could also improve entanglement between quantum bits, as incoming waves of light are effectively spread out and infinitely long, enabling even distant particles to be entangled.”

“This on-chip metamaterial opens the door to exploring the physics of zero index and its applications in integrated optics,” said Mazur.

The paper was co-authored by Shota Kita, Orad Reshef, Daryl I. Vulis, Mei Yin and Marko Loncar, the Tiantsai Lin Professor of Electrical Engineering.

Caen, Oct. 22, 2015 – Two years after the launch of the PICS project (funded by the FP7 funding instrument dedicated to research for the benefit of SMEs), three European SMEs, IPDiA, Picosun, and SENTECH Instruments along with CEA-Leti and Fraunhofer IPMS-CNT announce the major technological results achieved during this program.

Started in September 2013, the PICS project was focused on developing innovative dielectric materials deposited by atomic layer deposition (ALD) and related tools (ALD batch tool and etching tool) to bring to mass production a new technology of high- density and high-voltage 3D trench capacitors targeting high-end markets like medical or aeronautics. Capacitors are key components presented in every electronic module. The integrated silicon capacitors technology offered by the SME IPDiA outperforms current technologies (using ceramic or tantalum substrates) in stability in temperature, voltage, aging and reliability and enables to build highly integrated and high-performance electronic modules.

The consortium’s three major technological results are:

  • A novel ALD batch tool was developed by Picosun and Fraunhofer IPMS-CNT. It enables to reduce cost-of-ownership and deliver better uniformity and step coverage for high-K dielectrics into 3D structures. With its demonstrated, optimized, and production-proven ALD processes, Picosun is solidifying its position as a technological leader in the IC, Semiconductor, MEMS markets, from R&D to production systems.
  • A new process for accurately etching high-K dielectrics, which are very specific materials, was demonstrated by SENTECH with the help of Fraunhofer IPMS-CNT. As a result, SENTECH has the potential to gain market share in the field of high-k materials, which have high interest for different applications, e.g. LED, MEMS, magnetic data storage.
  • Two new dielectric stacks were developed and integrated into the IPDiA 3D trench capacitors by IPDiA, CEA-Leti and Fraunhofer IPMS-CNT. The initial specifications were fulfilled and proven by electrical measurements. A new record on capacitance density (>500nF/mm² at 3.3V) and an extended operation voltage (10V with 150nF/mm²) were obtained, which expands IPDiA’s ability to meet current market requirements particularly in the field of medical or aeronautics. Qualification procedure was initiated during the project by launching preliminary reliability studies and it will continue in the coming months.

On top of these R&D results, the other main objective of PICS was the industrialization of this new integrated capacitors technology. Thanks to the partnerships set up, the manufacturability and financial viabilities were ensured by developing adequate industrial tools targeting mass production.

The PICS project is a success for all three SMEs and a good example of the benefits brought by the EU funding instrument “Research for the benefit of SMEs”. The SMEs were able to outsource a part of their research to get from RTD performers innovative know-how and cutting-edge technological processes. The project was built to answer the SMEs’ specific needs and a common goal was set up around the new IPDiA capacitors technology and the specific tools (ALD batch tool and etching) required for its commercial exploitation.