Category Archives: MEMS

With the introduction of the Galaxy S4, Samsung Electronics continues to lead the market in the adoption of pressure sensors in smartphones, paving the way for massive growth in the market for these devices in the coming years.

Global shipments of microelectromechanical system (MEMS) pressure sensors in cellphones are set to rise to 681 million units in 2016, up more than eightfold from 82 million in 2012, according to the IHS iSuppli MEMS & Sensors Service at information and analytics provider IHS (NYSE: IHS). Shipments this year are expected to double to 162 million units, as presented in the attached figure, primarily due to Samsung’s usage of pressure sensors in the Galaxy S4 and other smartphone models.

“Samsung is the only major original equipment manufacturer (OEM) now using pressure sensors in all its flagship smartphone models,” said Jérémie Bouchaud, director and senior principal analyst for MEMS and sensors at IHS. “The company appears to be slightly ahead of its time in its adoption of pressure sensors, even though the most compelling application—indoor navigation—is still not ready for deployment. However, Samsung seems to want to anticipate the start of this market and get a jump on the competition for pressure sensors. The pressure device represents just one component among a wealth of different sensors used in the S4.”

Pressure’s rising

Besides Samsung, few other OEMs have been using pressure sensors in smartphones. The only other smartphone OEMs to use pressure sensors in their products are Sony Mobile in a couple of models in 2012, and a few Chinese vendors, like Xiaomi.

Apple Inc., which pioneered the use of MEMS sensors in smartphones, does not employ pressure sensors at the moment in the iPhone. However, IHS expects Apple will start them in 2014, which will contribute to another doubling of the market in 2014 to 325 million units.

Applying pressure

Although pressure sensors aren’t very useful currently in smartphones, they hold strong potential for the future.

The most interesting application now is the fast Global Positioning System (GPS) lock, wherein the GPS chipset can lock on to a satellite signal and calculate positions more quickly by using the pressure sensor to determine the smartphone’s altitude.

However, the most exciting use for pressure sensors in the future will be indoor navigation, an area with massive potential growth in retail and travel applications. Pressure sensors will provide the floor accuracy required to determine which level a user is on within a structure.

While the ecosystem is not yet fully in place for indoor location/navigation, IHS anticipates this market will reach a breakthrough in growth during the next 12 to 18 months.

By this time, Samsung will have a considerable lead over Apple and other competitors in the installed base of pressure sensors in smartphones.

Samsung takes lead in smartphone MEMS sensors

Although Apple pioneered the usage of MEMS sensors in smartphones, and was the top consumer of these devices for many years, Samsung in 2012 took the lead from Apple for the first time. With Samsung expected to maintain hegemony in smartphone shipments in 2013 and the company loading up on the number of MEMS and other sensors in each smartphone that it ships, its lead in this area is is likely to continue to grow.

Given its emphasis on detecting and adapting to consumer lifestyles, the Galaxy S4 integrates a wealth of different sensors, including the accelerometer, RGB light, geomagnetic, proximity, gyroscope, barometer, gesture and even temperature and humidity varieties.

Sensor suppliers

While IHS has not yet conducted a physical teardown of the Galaxy S4, the IHS iSuppli MEMS and Sensors Service is able to anticipate the likely suppliers of these devices for the smartphone.

The pressure sensor in the S4 is made either by STMicroelectronics, as it was in the Galaxy S III; or by Bosch, like what was used in the Galaxy Note 1 and 2. Both companies are the only mass producers of these devices today for handsets.

And just as in the Samsung Galaxy S III, STMicroelectronics and yet another supplier, InvenSense, are expected to share the supply of the S4’s inertial measurement unit (IMU), which combines the accelerometer and gyroscope.

Meanwhile, the S4’s compass could be supplied by any one of three entities: by AKM—the same as the Galaxy S III; or by Yamaha—as was used in a previous member of the Galaxy smartphone line; or by Alps—which is an up-and-coming manufacturer in this area.

Maximum RGB

IHS expects that Samsung will continue to use an RGB sensor in the S4, as part of a combo device that aggregates RGB, proximity, and IR LED emitter, as it did in the Galaxy Note 2 and the Samsung S III. Samsung was the only user of such combo sensors in smartphones in 2012.

If the RGB sensor is installed on the side of the S4 display, it will be used to sense the color temperature of the room where it’s located, and adapt the contrast and colors on the display to enhance the viewing experience. Such RGB sensors are useful for high-end displays. Since the Galaxy S4 is expected to have full high-definition display—unlike the S3—the added value of having an RGB sensor might be more obvious and noticeable in the S4.

The RGB sensor also could be installed on the back the Galaxy S4 in conjunction with the camera module. This can help in taking better pictures by correcting the white balance.

Capella Microsystems is likely to be the RGB supplier, just as in the Galaxy S III. Other potential suppliers are ams-TAOS, Maxim and Hamamatsu.

Dynamic changes to R&D processes, tools, technical challenges, and funding/business models will be highlighted at SEMICON West 2013, along with product displays of the latest semiconductor manufacturing technology, components and subsystems. SEMICON West, the Western Hemisphere’s largest micro- and nano-electronics exhibition and conference, will be held July 9-11 at the Moscone Center in San Francisco. The event will feature over 500 exhibitors, 50 hours of conference programs and more than 30,000 industry attendees.  Registration is now open at www.semiconwest.org without charge until May 15; registration fees apply starting May 16.

The semiconductor industry is simultaneously addressing the most complex challenges in its history: EUV lithography, new transistor architectures, stacked 3D-ICs, and 450mm wafer transition.  At the same time, adjacent markets in LED, MEMS and printed/flexible electronics are approaching technology crossroads — and new, post-CMOS alternatives to extend Moore’s Law are in the early stages of development.  Reconciling these multiple R&D demands are transforming old R&D strategies and accelerating new organizational models, skill set requirements, consortia options, partnership strategies, global sourcing tactics, and other approaches to managed innovation.

SEMICON West addresses these new R&D approaches through a variety of keynote presentations, panel discussions, technical presentations, and collaboration sessions including:

  • Silicon Innovation Forum: Organized by the industry’s leading strategic investment groups, this first-time forum provides a platform to connect new and emerging companies with strategic investors, venture capitalists and industry leaders.
  • Consortia Views:  For the first time anywhere, leaders from the industry’s top consortia — SEMATECH, imec and CEA-Leti — will share their views on collaborative R&D and the future of semiconductor technology.
  • Keynote Perspectives:  Ajit Manocha, CEO, GLOBALFOUNDRIES
  • Essential R&D Process Sessions:  Nano-Defect Detection and Lab-to-Fab Solutions
  • Latest Technology Updates:  Industry leaders will share the latest updates on lithography scaling and productivity, processing requirements for nonplanar transistors, 2.5/3D stacked ICs, and 450mm wafer processing.
  • ITRS Public Sessions:  The most critical technology innovation targets as identified the International Technology Roadmap for Semiconductors.
  • New Technology Sessions:  Learn about the latest R&D opportunities and challenges in LEDs, MEMS, printed/flexible electronics, silicon photonics, and more.

SEMICON West is the annual tradeshow for the micro- and nano-electronics manufacturing industries. Last year, over 30,000 attended the event and over 500 companies exhibited the latest innovations and solutions for advanced manufacturing.  For the sixth year, SEMICON West will be co-located with Intersolar North America, the leading solar technology conference and exhibition in the U.S. Every major semiconductor manufacturer, foundry, fabless company, equipment and materials supplier — plus leading companies in LEDs, MEMS, displays, printed/flexible electronics, PV, and other emerging technologies — attend SEMICON West.

SEMI is the global industry association serving the nano- and microelectronics manufacturing supply chains.  SEMI maintains offices in Beijing, Bengaluru, Berlin, Brussels, Grenoble, Hsinchu, Moscow, San Jose, Seoul, Shanghai, Singapore, Tokyo, and Washington, D.C. 

STMicroelectronics and CMP today announced that ST’s THELMA MEMS manufacturing process, the process ST uses for its industry-leading accelerometers and gyroscopes, which have shipped in billions of units, is now available for prototyping to universities, research labs and design companies through the silicon brokerage services provided by CMP. ST is releasing this process technology to third parties as a prototyping and foundry service to encourage new developments in motion-sensing applications for consumer, automotive, industrial and healthcare markets.

The 0.8-micron, surface micro-machining THELMA (Thick Epitaxial Layer for Micro-gyroscopes and Accelerometers) process combines variably thick and thin poly-silicon layers for structures and interconnections. This enables the integration of linear and angular mechanical elements in a single chip, delivering significant cost and size benefits to customers.

The CMP multi-project wafer service allows organizations to obtain small quantities — typically from a few dozens to a few thousand units — of advanced ICs manufactured using the same process technologies as would be used on much higher-volume products. The THELMA process design rules and design kits are now available for universities and microelectronics companies and the first requests are already being answered.

The introduction of ST’s MEMS manufacturing process in CMP’s catalogue builds on the collaboration that has allowed universities and design firms to access ST’s semiconductor manufacturing processes from the 130nm CMOS, introduced in 2003, up to the 28nm FD-SOI technology, released for prototyping in late 2012, which enables the efficient design of next-generation mobile devices that simultaneously require high performance and low power consumption.

"The small-scale availability of our industry-leading MEMS process alongside CMOS technologies including the game-changing FD-SOI, complemented with CMP’s advanced service capabilities, offers unprecedented access to state-of-the-art in chip manufacturing for start-ups and R&D labs looking to design intelligent sensor systems," said Benedetto Vigna, Executive Vice President, General Manager, Analog, MEMS & Sensors Group, STMicroelectronics. "With leading-edge industrialized processes at their fingertips, innovators can now concentrate on developing new products rather than investing time and resources in developing technologies."

"Anticipating huge development in MEMS, CMP was the first silicon brokerage service in the world to offer MEMS technologies as early as in 1995," said Bernard Courtois, Director of CMP. "Today, CMP is expanding the very successful ST partnership to the THELMA process, offering both the CMOS part and the MEMS part from a single manufacturer. Going beyond inertial sensors, pressure sensors, microphones, e-compasses etc., the ST-CMP partnership will allow CMP customers to move towards complex, embedded systems, addressing more and more societal needs, as components of the Internet of Things."

A joint industry/academia consortium, supported by the European Union’s Seventh Framework Programme, has reported the successful conclusion of a three-year project and the release of its design-synthesis tool flow and related litho-friendly cell libraries and evaluation metrics.

The SYNAPTIC research project included eight partner organizations from across Europe and Brazil who worked together to develop innovative regularity-centric design methods and Electronics Design Automation (EDA) tools. The goal of the project was to reduce limitations in both logical and physical implementation effectiveness associated with technology scaling and advanced sub-wavelength lithography.

Through the development of new pattern-aware logic synthesis and implementation techniques, SYNAPTIC addressed critical problems such as systematic variability reduction, DFM (Design for Manufacturing) and yield improvement (at the cell, IP/macro, and system levels), sophisticated area/performance trade-offs, and system-level/architectural predictability and sign-off, for the European semiconductor industry. The goal has been to sustain the scaling predicted by Moore’s Law into advanced nanometer technologies.

The libraries, tools, and methodologies developed within the SYNAPTIC project can enable synthesis and implementation of several designs based on a reduced set of regular layout patterns with similar area, power consumption, and timing performance. These efforts have demonstrated that the beneficial impact of regularity on variability and manufacturability does not have detrimental effects on the other metrics. The yield metric and models developed in SYNAPTIC show that a significant yield improvement can be achieved for large process windows, which immediately translate into cost benefits, increased productivity, and faster time-to-market by reducing the effort on OPC (Optical Proximity Correction) before fabrication. The process flow developed by SYNAPTIC is stable and delivers consistent results, and is ready for an evaluation on industrial designs.

By successfully reaching all the milestones and enabling the exploitation of the regularity concept at different stages of design development and implementation, and in a new class of innovative synthesis and automatic library generation tools, the SYNAPTIC project has been instrumental in aligning the European semiconductor industry to global Integrated Device Manufacturers (IDMs) and Far East foundries, increasing the competitiveness of semiconductor and EDA companies in Europe.

Moreover, by thoroughly disseminating its activities throughout the project, SYNAPTIC has also contributed to making the European academic research in this field more visible worldwide.

The SYNAPTIC Consortium partners include design optimization company Nangate; Europe’s largest IDM, STMicroelectronics; Thales (France), which is the European global technology leader for the aerospace, space, defense, security and transportation markets; and imec (Belgium), which performs world-leading research in nanoelectronics. Three leading universities, Politecnico di Milano (Italy), Universitat Politècnica de Catalunya (Spain) and Universidade Federal do Rio Grande do Sul (Brazil) brought significant and highly specialised technology contributions to the joint research. The final partner, Leading Edge, participated as a consultancy company specializing in the introduction of innovative EDA technologies to the European marketplace.

American Graphite Technologies Inc. announced today the successful production of test samples of a graphene paper product by its development and manufacturing partner, CTI Nanotechnologies LLC.

CTI Nanotechnologies reported it had successfully developed test samples and reproducible test results of a highly flexible membrane of nano-particles from 50-150um thick that is highly conductive showing about 2-3ohms resistivity across a 2 inch area.

The next phase of development is to work to continue improvements to the size, conductivity and scalability resulting in a low cost continuous "roll to roll" production operation at industrial specifications. In parallel with this work, CTI Nanotechnologies is working to upgrade its Vermont development facility.

Graphene Paper has the potential to revolutionize the automotive, aviation, electrical and optical industries. Currently Graphene Paper is available only in limited sizes, is relatively expensive and is very time consuming to make.

"This is an important early milestone, we are still engineering the drying, curing, and reduction process but most importantly we have thus far shown that our technology is capable of producing small scale graphene products," said Rick Walchuk, CEO of American Graphite Technologies. "This milestone is an important step towards AGIN’s goal of the development of a proprietary process for the production of high quality, low cost, large area Graphene Paper at a commercial scale."

  • Potential applications for Graphene paper include:
  • Computer and television displays
  • Electrical shielding
  • Reinforcing Material for manufacturing cars, boats, airplanes and machinery
  • Lightning Strike Dissipation
  • Heat Dissipation
  • Protection against electromagnetic pulses (EMP)
  • Armor plating
  • Reinforcement of plastics and polymers
  • Electrodes for batteries, fuel cells, solar cells and capacitors
  • Thermal heatsinks for electronic and computer equipment
  • Artificial limbs

American Graphite Technologies Inc. is focused on developing North American graphite mining opportunities along with the commercialization of graphene specific proprietary technology methods to maximize shareholder value.

Ericsson and STMicroelectronics today announced an agreement on the way forward for the joint venture ST-Ericsson. As communicated by the parent companies in December 2012, both have been working together toward a strategic solution for the JV. After months of intensive joint work, the parent companies have selected the strategic option which maximizes their respective future prospects and growth plans.

The main steps agreed upon to split up the JV are the following:

  • Ericsson will take on the design, development and sales of the LTE multimode thin modem products, including 2G, 3G and 4G multimode
  • ST will take on the existing ST-Ericsson products, other than LTE multimode thin modems, and related business as well as certain assembly and test facilities
  • Starting the close down of the remaining parts of ST-Ericsson.

The formal transfer of the relevant parts of ST-Ericsson to the parent companies is expected to be completed during the third quarter of 2013, subject to regulatory approvals.

After the split up, it is proposed that Ericsson will assume approximately 1,800 employees and contractors, with the largest concentrations in Sweden, Germany, India and China.

It is also proposed that ST will assume approximately 950 employees, primarily in France and in Italy, to support ongoing business and new products development within ST.

Today, it is also announced that Carlo Ferro is appointed President and Chief Executive Officer of ST-Ericsson, effective April 1, 2013. Ferro is currently Chief Operating Officer of ST-Ericsson and succeeds Didier Lamouche who, as previously announced, will pursue opportunities outside the company. Ferro will lead the work in securing both business continuity of ST-Ericsson and effective completion of the transition phase.

"I welcome Carlo Ferro as the new President and CEO of ST-Ericsson. Carlo has over twenty years of experience in the semiconductor industry and a strong track record in driving and managing complex transformation projects,” Hans Vestberg, President and CEO, Ericsson and Chairman of the Board of Directors, ST-Ericsson said. “He has been a contributor to the solid progress ST-Ericsson has made the past year in terms of strategy execution and significantly lowering the breakeven point."

"In line with what we announced in December last year, we have now moved to the next step of our exit process and found a solution with Ericsson that fully aligns with our new strategy," said Carlo Bozotti, President and CEO of ST. "The agreement made with Ericsson represents a major step forward in reaching our new financial model target and allows us to further strengthen the skillsets of our company, by welcoming in ST, at completion, additional strong competences to fuel growth in specific key product areas. Moreover, it protects and leverages the ongoing ST-Ericsson’s business, allowing us to reinforce our relationships with key customers, both of ST and of ST-Ericsson."

With the proposed transfer of competencies from ST-Ericsson, ST will further strengthen its capabilities in the areas of application processors, RF, analog and power as well as software and complex system integration. In addition, ST-Ericsson’s portfolio includes devices that are complementary to ST’s focus on the fastest growing segments of the wireless semiconductor market, such as system-optimized analog mixed signal and power management devices, high-quality, low-power audio and video enhancements and innovative energy harvesting solutions.

The agreement is fully in line with ST’s financial model target of an operating margin of 10 percent or more and with plans to reduce quarterly net operating expenses to an average quarterly rate in the range of $600 million to $650 million by the beginning of 2014.

In addition, as a result of the agreement, ST expects to incur cash costs, including the covering of ST-Ericsson’s ongoing operations during the transition period and its restructuring costs, in the range of approximately $350 million to $450 million, narrower than the range provided at the end of January 2013.

Brewer Science, a developer of lithography enhancement materials for semiconductor manufacturing, announces the installation of a scale-up reactor to increase production of its CNTRENE C100 family of electronics-grade CNT materials by tenfold. Such materials are used in chemical and biological sensors and nanotube-based nonvolatile random access memory device applications, which require extremely low levels of metal ion contaminants with concentration limits in parts per billion. 

“Small-scale reaction equipment can only take manufacturing so far with respect to quality and delivery time. This new scale-up reactor will provide the capability to complete weeks of reactions in three days while producing materials that meet stringent microelectronics specifications,” said Dr. Stephen Gibbons, Director of Technology of Brewer Science’s Carbon Electronics Center.

“With increasing customer usage and the move toward commercial adoption in devices, we needed to implement our third round of scale-up to support market demand,” Jim Lamb, director of business development for the Carbon Electronics Center, said. “Growth of our CNTRENE C100 family of products is driven by their use in nanotube-based nonvolatile random access memory devices, a universal CNT memory structure developed by Nantero, Inc., sold under the name NRAM, which could replace embedded memory, DRAM, SRAM, and flash memory devices. This structure allows flexible placement of memory in the device stack and can be stacked for vertically placed memory cells. NRAM devices provide other key benefits including robustness, 3-nanosecond write speeds, low operating power, radiation-hardened memory cells, and the ability to perform at high operating temperatures.”

Jim Lamb from Brewer Science will be presenting at the upcoming Applied Power Electronics Conference (APEC). He will speak about “Carbon Nanotubes Solutions for Packaging and Wireless Sensors” on Thursday, March 21, at the industry session on Nanotechnology Applications in Power Electronics.

 

smallest vibration sensor in the quantum world

The spin of a molecule (orange) changes and deforms the nanotube (black) mounted between two electrodes (gold).

(Figure: C. Grupe/KIT)

Carbon nanotubes and magnetic molecules are considered building blocks of future nanoelectronic systems. Their electric and mechanical properties play an important role. Researchers of Karlsruhe Institute of Technology and French colleagues from Grenoble and Strasbourg have now found a way to combine both components on the atomic level and to build a quantum mechanical system with novel properties. It is reported now in the print version of nature nanotechnology journal (DOI: 10.1038/nnano.2012.258).

In their experiment the researchers used a carbon nanotube that was mounted between two metal electrodes, spanned a distance of about 1 µm, and could vibrate mechanically. Then, they applied an organic molecule with a magnetic spin due to an incorporated metal atom. This spin was oriented in an external magnetic field.

“In this setup, we demonstrated that the vibrations of the tube are influenced directly when the spin flips parallel or antiparallel to the magnetic field,” explains Mario Ruben, head of the working group at KIT. When the spin changes, the resulting recoil is transferred to the carbon nanotube and the latter starts to vibrate. Vibration changes the atomic distances of the tube and, hence, its conductance that is used as a measure of motion.

The strong interaction between a magnetic spin and mechanical vibration opens up interesting applications apart from determining the states of motion of the carbon nanotube. It is proposed to determine the masses of individual molecules and to measure magnetic forces within the nano-regime. Use as a quantum bit in a quantum computer might also be feasible.

According to the supplementary information published in the same issue of nature nanotechnology such interactions are of high importance in the quantum world, i.e. in the range of discrete energies and tunnel effects, for the future use of nanoscopic effects in macroscopic applications. Combination of spin, vibration, and rotation on the nanoscale in particular may result in entirely new applications and technologies.

Cisco Systems is preparing for a major shift in the industry, as the Internet of Things starts to become a reality. At an annual press event in San Jose, California this week, Cisco officials claimed that the much-anticipated IoT industry could be a $14 trillion opportunity, and they are ready to embrace the change.

Rob Lloyd, president of sales and development at Cisco, told the press that he believes as many as 50 billion devices will be connected to the Internet by 2020, from which, he believes, the $14 trillion business opportunity will stem. The trend will create business opportunities initially in manufacturing, but extend into government, energy and health care, he said, as sensors will become part of traffic systems, hospitals, refineries and other civil and business infrastructures. These opportunities will extend far beyond today’s budgets for computer and communication systems.

An ambitious plan for Cisco, though some might recall that Cisco’s CEO has announced this plan before. Last year, John Chambers, Cisco’s chairman and chief executive, told the press that he expects the company will experience a shift in customers, handling government and large businesses’ projects such as designing and managing systems for clean water or efficient traffic.

“The first 10 years (of the commercial Internet) were really about transactions, and the last 10 were about interactions,” Padmasree Warrior, Cisco’s chief technology and strategy officer, told the press this week. “The next 10 is about processes being more efficient.”

However, the IoT space is already presenting plenty of challenges. Cisco is working with utilities worldwide in the hopes that 10 million smart meters will be deployed by the end of the year, supporting IoT protocol. Cisco has already deployed about $180 billion worth of network equipment into the world, Warrior said, and will build hardware and software that interacts efficiently with the legacy gear, so new kinds of intelligent systems can be quickly deployed.

What do you know about the Internet of Things? Do you think it’s all hype or a real opportunity? Let us know what you think in the comment section below. Comments posted on Solid State Technology articles will not automatically be posted to your social media account unless you select to share.

 

Imec announced today the launch of its fully integrated silicon photonics platform through a cost-sharing Multi-Project Wafer (MPW) service via ePIXfab. The platform enables cost-effective R&D of silicon photonic ICs for high-performance optical transceivers (25Gb/s and beyond) and optical sensing and life science applications. The offered integrated components include low-loss waveguides, efficient grating couplers, high-speed silicon electro-optic modulators and high-speed germanium waveguide photo-detectors.

Since 2007, imec and its associated laboratory at Ghent University have been offering a platform for passive silicon photonic components via ePIXfab, for R&D under shared cost conditions. Now, imec extends its silicon photonics offering, using a standard130nm CMOS toolset, with active components such as high-speed optical modulators and integrated germanium photo-detectors.

“Imec’s Silicon Photonics platform provides robust performance and solutions to integrated photonics products in medical diagnostics, telecom and datacom industries. Companies can benefit from our silicon photonics capability through established standard cells, or explore the functionality of their own designs in MPW,” stated Philippe Absil, program director at imec. “This Silicon Photonics MPW offer provides a cost-efficient solution, with state-of-the-art performance, design flexibility and superior CD and thickness control”.

The first run opens for registration with tape-in on 9th of Oct 2013 and first devices will be out in May 2014. Support, registration and design kit access will be organized by Europractice IC service, in collaboration with world-wide MPW partners.

Imec’s Si Photonics 200mm wafer platform offers extensive design flexibility and includes –

  • Tight within-wafer silicon thickness variation 3 < 2.5nm
  • 3-level patterning of 220nm top Si layer (193nm optical lithography)
  • poly-Si overlay and patterning (193nm optical lithography)
  • 3-level n-type implants and 3-level p-type implants in Si
  • Ge epitaxial growth on Si and p-type and n-type implants in Ge
  • Local NiSi contacts, Tungsten vias and Cu metal interconnects
  • Al bond pads
  • Validated cell library with fiber couplers, polarization rotators, highly efficient carrier depletion modulators and ultra-compact Ge waveguide photo-detectors with low dark current.
  • Design kit support for Ipkiss, PhoeniX and Mentor Graphics software