Category Archives: MEMS

SurplusGLOBAL, Inc. participated in Semicon West 2013. SurplusGLOBAL CEO, Bruce Kim forecasted the increase in demand in the Asia Secondary Equipment Market.

Bruce Kim, CEO  of SurplusGLOBAL, has participated in Semicon West for the past 7 years and stated, “We are more optimistic about the growth in the Asian Secondary Semiconductor Equipment Market in the years to come.”

Secondary semiconductor equipment addresses both environmental and cost concerns within the industry. The secondary equipment market size has experienced continuous growth over the past three years. In 2012 the market size was estimated to be around 3 billion US dollars, with 200mm wafer capturing 90% of this market. In 2013, demand of 300mm wafer equipment is expected to capture an increased share of the demand.

With the growth in demand, distribution and services are becoming more critical every year. The number of Fab facilities in the United States and Europe continues to experience decline, while in Asia there has been continued investment in the China, Taiwan and South Korean markets. The Asian market accounts for approximately 80% of the semiconductor equipment market. The Asian secondary equipment market has been experiencing continued growth and global, financially stable traders such as SurplusGLOBAL are well positioned to lead the supply of this equipment.

The market has been very slow for last two years in Asia since the second half of 2011.  Most of the Asian players enjoyed the market recovery in Year 2010 and the 1st half of 2011.  After then, utilization rates at Foundries plummeted to levels, LED fabs suffered from slow demands and price pressures. The sales revenues of Asian dealers and refubishers have declined up to 70 percent.  These days we can see several ongoing expansion plans mainly from Taiwan and China Foundries as well as a few new Fab plans in China.  LED Fabs are resuming the purchase of tools.  Analog and Power device makers are adding bottleneck tools.  The demands of Fab tools from packaging companies are increasing.   

Bruce Kim commented “The major market drives are Foundries who want to expand their capacity or build new Fabs mainly in Taiwan and China. There are increasing demands of secondary equipment in mature technology including not only 8 inch silicon wafer, but also LED, packaging and MEMS."

To date, this demand has been driven by both 200mm FAB front and backend tools. We project starting growth of 300mm FABs in Asia. Powerchip sold hundreds of 300MM tools in the 1st Half to many Asian Fabs.  GLOBALFoundries acquired a thousand of Fab tools from Promos and sold many of them to China new fab recently. Bruce Kim mentioned,   “300mm Fabs have difficulty in purchasing secondary equipment because of insufficient support from equipment suppliers, so SurplusGLOBAL expects it will take considerable time for the  300mm secondary equipment market to take off.”

SurplusGLOBAL locates, sells and stocks thousands of systems annually and has established an extensive global network of end users, refurbishers and brokers. SurplusGLOBAL specializes in semiconductor manufacturing equipment acquired from the leading chip manufacturers in the United States, Europe and Asia covering Fab, ATE and PCB/SMT capital equipment segments.

Battered by the nonstop onslaught of media tablets, the mobile PC market in 2013 delivered the worst second-quarter performance in 11 years, according to preliminary data provided by a PC Dynamics Market Brief from information and analytics provider IHS (NYSE: IHS).

Worldwide mobile PC shipments in the second quarter shrank a steep 6.9 percent compared to the first three months of the year, based on initial findings. This represented the first time the industry experienced a sequential decline since the second quarter of 2002. At that time, mobile PC shipments contracted 3.7 percent after the dot.com bust flattened global demand.

In the 10 years between those two low points, the mobile PC space had always strengthened in the second quarter as shipments recovered from a normally soft start to the year. Excluding 2002 and this year, growth for every second quarter during the intervening years had ranged from 0.5 percent to as much as 6.5 percent, as shown in the attached figure. Just last year, the industry enjoyed a 3.9 percent increase for the period.

The depressed results are not confined to the second quarter alone. When the overall first half is considered, 2013 has made history as having the poorest performance since 2003, posting a harsh 11.2 percent contraction compared to the same six-month period a year ago. How much the market has fallen can be seen by the magnitude of growth attained in the previous years. Only three years ago in 2010, mobile PC shipments surged by 41.7 percent in the first half.

“Representing devices such as traditional notebook PCs as well as the new thinner ultrathin/Ultrabook laptops, the mobile PC industry on the whole is struggling to find any momentum for growth as upheavals rock the market,” said Craig Stice, senior principal analyst for compute platforms at IHS. “In particular, more nimble devices like media tablets have taken over among consumers given their ease of use and unique form factor. Meanwhile, innovation in PCs has stagnated, and the recent influx of low-cost tablets has further eaten into an already decimated mobile PC space. With such dire numbers, many are wondering whether this signifies the start of more record declines for mobile PCs, or if the industry has hit rock-bottom.”

High hopes for low costs

An infusion of lower-cost PCs that deliver higher performance but consume less power than current laptops could save the market, IHS believes. Processors like Bay Trail from Intel Corp. and Temash from rival chipmaker Advanced Micro Devices Inc. can go beyond what traditional entry-level processors have been able to provide, and PC makers are contemplating a new class of performance PCs that would incorporate the new processors at affordable prices.

Hopes also remain alive within the industry on prospects for the much more expensive ultrathin and Ultrabook PC models, where growth could still be expected if their prices come down and if consumers can get used to the new Windows 8 operating system after a rocky launch.

The PC that refreshes

With everything considered, a PC refresh buying cycle is more than likely to occur, IHS believes.

‘Despite the broad appeal of media tablets, the devices won’t be able to fully replace PCs, and consumers will continue to need the computational power of personal computers,” Stice said. “If a new low-cost PC offering strong performance can become available on the market and meet consumer expectations, then PCs could be set for more growth—not like the glory days of the 2000s—but growth nonetheless.”

A year to forget

Despite this, 2013 is very likely a write-off at this point. Even with growth expected to occur in the second half, it’s too late given the depressed first-half results that any positive expansion could occur in both the mobile PC segment and the overall PC market.

A full downturn is projected for total PC shipments in 2013, which would make this the second consecutive year of decline, after the contraction of the market last year for the first time since 2001.

SEMI honored 14 industry leaders for their outstanding accomplishments in developing standards for the microelectronics and related industries. The SEMI Standards awards were announced at a reception held during SEMICON West 2013.

The 2013 SEMI International Standards Excellence Award, inspired by Karel Urbanek, is the most prestigious award in the SEMI Standards Program. Yesterday, it was awarded to Dr. Larry Hartsough of UA Associates.  Hartsough has been actively involved in SEMI Standards for over 20 years, serving in a variety of leadership positions. With over 30 years’ experience in the industry in the areas of thin-film deposition, equipment design and plasma processing of materials, he was instrumental in the development of cluster tool and 300mm interface Standards for semiconductor equipment. Additionally, Hartsough’s expertise in patent litigation was invaluable in guiding the Physical Interfaces and Carriers Committee on intellectual property issues. Long-term, committed leaders like Hartsough provide continuity and excellence to the SEMI Standards Program. The Award recognizes the leadership of Karel Urbanek, a SEMI Board of Directors member who was a key figure in the successful globalization the Standards Program.

In addition, the recipients of four major North American SEMI Standards awards were announced:

The Merit Award recognizes Standards Program Member major contributions to the semiconductor, PV, and related industries through the SEMI Standards Program.  Award winners typically take on a very complex problem at the task force level, gain industry support, and drive the project to completion. This year, seven Program Members were presented with the Merit Award for their contributions to the semiconductor, PV, 3D-IC, and HB-LED industries: 

  • Contribution to the PV Industry: Existing SEMI test methods did not provide the ability to measure a broad range of trace elemental impurities in silicon feedstock for solar cells. Through the International PV Analytical Test Methods Task Force, Hugh Gotts (Air Liquide Electronics U.S.) led the development of SEMI PV49-0613, Test Method for the Measurement of Elemental Impurity Concentrations in Silicon Feedstock for Silicon Solar Cells by Bulk Digestion, Inductively Coupled-Plasma Mass Spectrometry.
  • Contribution to the HB-LED Industry: The 150mm sapphire wafers used for manufacturing HB-LED devices are thicker than standard silicon wafers used in the semiconductor industry— making it difficult to use the same cassettes and standards. SEMI HB-LED Equipment Automation Task Force leaders, Jeff Felipe (Entegris) and Daniel Babbs (Brooks Automation) led the development of SEMI HB2-0613, Specification for 150mm Open Plastic and Metal Wafer Cassettes Intended for Use for Manufacturing HB-LED Devices. This cassette standard also enables standardization of load ports and transport systems, resulting in both direct and indirect cost savings throughout the whole supply chain.
  • Contributions to the 3DS-IC Industry: Establishing common understanding and precise communication between stakeholders is important in any manufacturing supply chain, including 3DS-IC. North America 3DS-IC Inspection & Metrology Task Force leaders, David Read (NIST) and Victor Vartanian (SEMATECH), led the successful development of the first 3DS-IC standard published by SEMI, SEMI 3D1-0912: Terminology for Through Silicon Via Geometrical Metrology. It provides consistent terminology for metrology issues important to through silicon vias (TSV), including: pitch, top CD, top diameter, top area, and more. Read and Vartanian were also responsible for the successful development of two other 3DS-IC SEMI Standards — SEMI 3D4 (Bonded Wafer Stack Metrology) and SEMI 3D5 (TSV Metrology).
  • Ilona Schmidt (Corning) was the key developer of SEMI 3D2-0113, Specification for Glass Carrier Wafers for 3DS-IC Applications.  SEMI 3D2 describes dimensional, thermal, and wafer preparation characteristics for glass starting material that will be used as carrier wafers in a temporary bonded state.
  • Contribution to the Semiconductor Industry: Manufacturing equipment is complex, which makes it susceptible to operating errors due to electromagnetic interference (EMI).  SEMI E33 provides recommendations to help assure that manufacturing equipment will operate reliably without failures caused by electromagnetic interference (EMI).  This desired characteristic is generally known as electromagnetic compatibility (EMC). Last year SEMI E33 went through an extensive revision led by technical expert Vladimir Kraz (BestESD Technical Services).

The Leadership Award recognizes Program Members’ outstanding leadership in guiding the SEMI Standards Program.  Since the formation of the HB-LED Technical Committee in late 2010, Julie Chao (Silian Sapphire) and David Joyce (GT Advanced Technologies) have led the Wafer Task Force in defining the physical geometry of wafers used in HB-LED manufacturing.  Their efforts resulted in SEMI HB1-0113, Specifications for Sapphire Wafers Intended for Use for Manufacturing High Brightness-Light Emitting Diode Devices— SEMI’s first HB-LED standard. As task force leaders, Chao and Joyce fostered industry collaboration, travelling to global SEMI events and attracting new key stakeholders, ensuring global input and consensus.

The Honor Award, given to an individual who has demonstrated long-standing dedication to the advancement of SEMI Standards, recognized Richard Allen (NIST/SEMATECH). From his involvement in the Microlithography/Micropatterning Committee to his current leadership in the 3DS-IC and MEMS/NEMS Committees, Allen has been a long-standing and active participant in the SEMI Standards Program.  He joined the 3DS-IC committee shortly after it was formed in late 2010 as serves as committee chairman. He also leads the Bonded Wafer Stacks Task Force, Inspection & Metrology Task Force and Thin Wafer Handling Task Force). His contributions have been instrumental in the publication of four SEMI 3DS-IC Standards to date.

The Corporate Device Member Award recognizes the participation of the user community. This year, three Program Members were presented with the Corporate Device Member Award for their contributions to EHS and 3DS-IC. This year’s Corporate Device Member Awards were presented to Paul Schwab (Texas Instruments), Urmi Ray (Qualcomm), and Raghunandan Chaware (Xilinx).  The award is presented to individuals from device manufacturers.

As co-leader of the S8 Ergonomics Task Force, Paul Schwab (Texas Instruments) provided end-user perspective in the revision of SEMI S8, Safety Guideline for Ergonomics Engineering of Semiconductor Manufacturing Equipment. Schwab significantly improved the Supplier Ergonomics Success Criteria (SESC) checklist criteria, making the Document easier to use by the industry.

Another example of the importance of end-user input was in the development of SEMI’s third 3DS-IC Standard – SEMI 3D3-0613, Guide for Multiwafer Transport and Storage Containers for 300mm, Thin Silicon Wafers on Tape Frames. North America 3DS-IC Thin Wafer Handling Task Force Leaders Urmi Ray (Qualcomm) and Raghunandan Chaware (Xilinx) played integral roles in the development of SEMI 3D3-0613, providing vital end-user perspective for shipping thin wafers on tape frames so that they arrive undamaged at their final destination.

The SEMI Standards Program, established in 1973, covers all aspects of microelectronics process equipment and materials, from wafer manufacturing to test, assembly and packaging, in addition to the manufacture of photovoltaics, flat panel displays and micro-electromechanical systems (MEMS). Over 3,700 volunteers worldwide participate in the program, which is made up of 23 global technical committees. Visit www.semi.org/standards  for more information about SEMI Standards.

 

 

SEMI forecasts semiconductor equipment sales will reach $43.98 billion in 2014, a 21 percent increase over estimated 2013 equipment spending, according to the mid-year edition of the SEMI Capital Equipment Forecast, released here today at the annual SEMICON West exposition.

Following two years of conservative capital investments by major chip manufacturers, semiconductor equipment spending is forecast to grow to $43.98 billion in 2014, up from $36.29 billion projected this year.  Key drivers for equipment spending are significant NAND Flash fab investments by Samsung in China and Toshiba/Sandisk in Japan, and investments by Intel, including its fabs in Ireland.  Most major regions of the world will see significant equipment spending increases.  Front-end wafer processing equipment will grow 24 percent in 2014 to $35.59 billion, up from $28.70 billion in 2013.  Test equipment and assembly and packaging equipment will also experience growth next year, rising to $3.18 billion (+6 percent) and $2.9 billion (+14 percent), respectively. The forecast indicates that next year will be the second largest spending year ever, surpassed only by $47.7 billion spent in 2000.

"Continued strong demand by consumers for smart phones and tablet computers is driving chip manufacturers to expand capacity for memory, logic and wireless devices,” said Denny McGuirk, president and CEO of SEMI. “To meet the pent-up demand for capacity, particularly for leading-edge devices, we expect capital spending to increase throughout the remainder of this year and continue through 2014 — to post one of the highest rates of global investment for semiconductor manufacturing ever.”

Growth is forecast in China (82 percent), Europe (79 percent), South Korea (31 percent), Japan (21 percent), North America (9 percent), and Taiwan (2 percent). Taiwan will continue to be the world’s largest spender with $10.62 billion estimated for 2014, followed by North America at $8.75 billion and Korea with $8.74 billion. The following results are given in terms of market size in billions of U.S. dollars and percentage growth over the prior year:

 

 

 

 

 

By Equipment Type

 

 

yr-over-yr

 

yr-over-yr

 

2012

2013F

%Chg

2014F

%Chg

Wafer Processing

28.15

28.70

1.9

35.59

24.0

Test

3.55

3.00

-15.5

3.18

6.0

Assembly & Packaging

3.08

2.55

-17.2

2.90

13.7

Other

2.15

2.04

-5.1

2.32

13.7

Total Equipment

36.93

36.29

-1.7

43.98

21.2

 

 

 

 

 

 

By Region

 

 

yr-over-yr

 

yr-over-yr

 

2012

2013F

%Chg

2014F

%Chg

Korea

8.67

6.69

-22.8

8.74

30.6

Taiwan

9.53

10.43

9.4

10.62

1.8

North America

8.15

8.04

-1.3

8.75

8.8

Japan

3.42

3.80

11.1

4.61

21.3

Europe

2.55

2.35

-7.8

4.21

79.1

China

2.50

2.81

12.4

5.11

81.9

Rest of World

2.10

2.17

3.3

1.94

-10.5

Total Equipment

36.93

36.29

-1.7

43.98

21.2

* Totals may not add due to rounding

 

 

 

 

Source: Equipment Market Data Subscription (EMDS), SEMI

 

Dow Corning announced Monday that it is among the newest member organizations to join imec, a leading research center for the advancement of nano-electronics. The announcement signals expanded opportunities for both organizations to combine their expertise toward the development and broader adoption of 3D integrated circuit (IC) packaging technologies, wherein IC chips are stacked in vertical 3D architectures.

“This move is a natural and strategic step for Dow Corning and imec, as we both believe collaborative innovation is as critical to industry leadership as native expertise,” said Andrew Ho, global industry director, Advanced Semiconductor Materials at Dow Corning. “Our access to imec’s world-class resources and expertise will not only help us further refine our unique temporary bonding solution, it will allow imec to leverage that solution to advance integration of the 3D IC packaging process that they’ve been developing for years.”

Yet, before 3D IC fabrication can see broader adoption, it will require innovative advances in materials and processing technologies.

One of the key challenges imec is tackling is the bonding of the device wafer to a carrier wafer, prior to wafer thinning, and the safe debonding of the thin wafer after completion of backside processing. This was Dow Corning’s goal when designing its Temporary Bonding Solution, aims at simple processing using a bi-layer concept comprising an adhesive and release layer. The technology also enables room-temperature bonding and debonding processes based on standard manufacturing methods.

Together with imec, Dow Corning will explore its temporary bonding CMOS-compatible solution for 3D Through-Silicon-Via (TSV) semiconductor packaging. The collaboration will aim to further expand the technology’s ability to achieve simple, cost-effective bonding-debonding techniques compatible with standard manufacturing processes.

“Imec’s precompetitive programs are an essential platform for industry leaders to share the risk and cost of advanced research. As one of the semiconductor industry’s most proven pioneers in advanced silicone-based solutions, Dow Corning brings valuable materials and processing expertise to imec’s global network of innovators – as well as a key enabling technology for TSV fabrication,” said Eric Beyne, program director 3D System Integration at imec. “We look forward to collaborating closely with our newest member organization as we drive the next stage of 3D integration, and help ensure compatiblity of the proposed thin wafer carrier solution with advanced, sub-10-nanometer CMOS device technologies.”

Imec exhibits at SEMICON West, July 9-11, 2013 at booth 1741, South hall.

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that it has achieved strong revenue growth and expanded its headcount for the first half of 2013.  The company attributes this success to continuing demand for its flexible process solutions designed to address high-volume manufacturing (HVM) needs across multiple markets–including 3D-ICs, MEMS, power devices and compound semiconductors.  EVG’s latest technology innovations that address these and other markets will be showcased this week at SEMICON West 2013 at the Moscone Convention Center in San Francisco.  In addition to unveiling a series of new solutions, EVG also reports that it continues to expand its wafer processing services and process development consultation capabilities worldwide as part of the company’s long-term growth strategy. 

"2013 has been a strong year for EV Group as we continue to invest in new technologies and capabilities to support our customers’ ability to ramp next-generation devices to volume production quickly and cost-effectively at high yields," said Dave Kirsch, vice president and general manager of EV Group North America.  "This requires not only leading-edge process equipment but also world-class global support and process development services. EVG’s local teams work hand in hand with our corporate headquarters to provide increased flexibility and capability for our customers.  That includes our ability to offer small-scale and pilot-production services at our global applications labs, which is a key differentiator for us and a key value proposition for customers."

Expanding sales growth and global customer support operations

During the first half of 2013, EVG achieved approximately 10 percent growth in sales and more than 10 percent increase in employees. To support its customers’ roadmaps, EVG continues to invest aggressively in research and development–approximately 20 percent of sales–in several key efforts, including 450-mm tool development. Among these efforts, EVG has invested in new state-of-the art cleanrooms and application labs with in-house process demo capability on fully automated systems at its corporate headquarters in Austria, as well as its regional headquarters in Japan and North America. 

VLSIresearch recently recognized EVG’s customer service and support, ranking it at one of the 10 Best Focused Suppliers in Chip Making Equipment. EVG was also ranked in first place in the "Other Silicon Wafer Fab Equipment" category for the company’s wafer bonding solutions. 

Leadership in wafer bonding

Already a leading supplier of HVM wafer bonding solutions, EVG recently unveiled several new platform developments in both fusion bonding and temporary bonding/debonding applications.  Yesterday, EVG unveiled the latest version of its EVG 40NT automated measurement system, which features improved specifications to achieve the highest wafer-to-wafer alignment accuracies needed for the production of next-generation 3-D integrated image sensors and stacked memory devices.  The EVG40NT is seamlessly integrated with EVG’s GEMINI FB automated production fusion bonding system to enable a closed-loop control system that facilitates customers’ ramp to volume production across multiple markets and applications.  Last week, EVG also introduced its LowTemp debonding platform, which features three high-volume-production room-temperature debonding process types and is supported by a supply chain of seven qualified adhesive suppliers to enable greater manufacturing flexibility.

Expertise in lithography and resist processing

Building upon the company’s expertise in lithography, EVG also recently unveiled the EVG120 automated resist processing system, which integrates spin/spray coating and wet processing to provide a highly flexible system that maximizes productivity and cost of ownership.  The EVG120 is ideally suited for a wide variety of markets and applications, including high-topography coating and spray coating for MEMS, thick-film resists and bumping for advanced packaging.  It is also suited for passivation, dielectrics and thick-film processing for compound semiconductor devices.

Rounding out EVG’s latest developments in wafer surface preparation, the company also recently announced the CoatsClean wafer cleaning solution, which combines process, equipment and formulation technology to deliver an innovative, low-cost-of-ownership approach to single-wafer photoresist and residue removal.  Co-developed with Dynaloy, CoatsClean is designed to address thick films and difficult-to-remove material layers for the 3D-IC/through-silicon via (TSV), advanced packaging, MEMS and compound semiconductor markets.

Presentations at SEMICON West 2013

Attendees interested in learning more about the company and its latest developments are invited to visit EVG’s booth #819 in the Moscone South Hall at SEMICON West as well as attend the company’s presentations during the show’s technical program.  Markus Wimplinger, corporate technology development and IP director of EVG, will present "High Resolution In-line Metrology Module for High-Volume Temporary Bonding Applications at the SEMATECH Workshop on 3D Interconnect Metrology on Wednesday, July 10 from 11:20 – 11:40 a.m. at the Marriott Marquis in San Francisco. In addition, Dr. Thorsten Matthias, business development director at EV Group, will present "From Sensor Fusion to System Fusion" at the TechXPOT session "MEMS and Sensor Packaging for the Internet of Things" on Thursday, July 11 from 12:10 – 12:30 p.m. in the Moscone North Hall.

EV Group (EVG), a  supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today introduced the latest version of its EVG40NT automated measurement system, which is designed to work in concert with the company’s GEMINI FB fusion wafer bonding system to support the manufacture of next-generation 3D-integrated CMOS image sensors.  The enhanced EVG40NT measures wafer-to-wafer alignment accuracy to within 40nm (3 sigma), while its seamless software integration with the GEMINI FB provides a closed-loop fusion bonding control system that enables the manufacture of ultra-fine-pitch (less than two micron) through-silicon vias (TSVs).  These tighter specifications are necessary for enabling the production of 3D-integrated image sensors, and pave the way for accelerating 3D-integration with other device types, such as stacked memory.

"EV Group’s GEMINI FB fusion wafer bonding platform is the de facto industry standard for CMOS image sensor production, and already leads the industry in wafer-to-wafer alignment accuracy due to our proprietary SmartView alignment technology," stated Dr. Thorsten Matthias, business development director at EV Group.  "The integration of GEMINI FB with the enhanced EVG40NT brings statistical process control and alignment accuracy to a whole new level, and pushes 3D-IC manufacturing to new limits.  High-precision manufacturing requires accurate metrology that is seamlessly integrated into the process to enable real-time monitoring and fast corrective action.  In the case of wafer bonding, measuring and mapping each die gives valuable insight into local stress variations created during upstream processes, which can cause distortions and local misalignments further downstream."

Fusion wafer bonding is ideally suited for 3D-integrated image sensors and other stacked devices because it is a room-temperature bonding process, which eliminates misalignment due to thermal expansion mismatch between the wafers.  Having the ability to inspect the quality of the wafer bond and measure alignment accuracy prior to the final annealing step provides an easy rework path, thereby enabling 100-percent yield for wafer stacking.  The GEMINI FB platform combines EVG’s LowTemp plasma activation technology, wafer cleaning, SmartView wafer-to-wafer alignment and fusion wafer bonding in a single fully automated high-volume-manufacturing system.  The EVG40NT performs highly accurate, non-destructive, top-to-bottom side alignment accuracy measurements on double-sided structured wafers or bond interfaces, as well as critical dimension and box-in-box measurements of single and double-sided structured wafers.

"Next-generation image sensors are the technological frontrunners for 3D-IC manufacturing technology," according to Hermann Waltl, executive sales and customer support director at EV Group.  "High-density TSV arrays, sub-micron-diameter TSVs and ultra-thin wafers have all been successfully transferred into high-volume image sensor manufacturing.  Now that adoption of wafer-to-wafer 3D stacking for image sensors is well underway, we expect to see 3D-integration follow very soon for other devices such as stacked memory."

Media and analysts interested in learning more about EVG’s latest developments in wafer bonding and other processing solutions are invited to visit the company’s booth #819 in the South Hall of the Moscone Convention Center in San Francisco at the SEMICON West show this week, as well as attend the company’s presentations during the show’s technical program.  Markus Wimplinger, corporate technology development and IP director of EV Group, will present "High Resolution In-line Metrology Module for High-Volume Temporary Bonding Applications" at the SEMATECH Workshop on 3D Interconnect Metrology on Wednesday, July 10 from 11:20 – 11:40 a.m. at the San Francisco Marriott Marquis.  In addition, Dr. Thorsten Matthias, business development director at EV Group, will present "From Sensor Fusion to System Fusion" at the TechXPOT session "MEMS and Sensor Packaging for the Internet of Things" on Thursday, July 11 from 12:10 – 12:30 p.m. in the Moscone North Hall.

Following last week’s formal announcement from Governor Cuomo of the formation of the Facility 450 Consortium (F450C), ten leading nanoelectronics facility companies from around the world will collaborate at CNSE to lead the global effort to design and build the next-generation 450mm computer chip fabrication facilities. At the semiconductor industry’s annual SEMICON West tradeshow, taking place at the Moscone Center in San Francisco, CA on July 9-11, the F450C will host its first public panel discussion about facility and infrastructure solutions for the transition to 450mm wafer fabrication.

Who: Members of the Facility 450 Consortium (F450C)

What: Panel entitled: The 450mm Facility; F450C’s Parallel Pathway

When: 4-5 pm on Tuesday, July 9

Where: The Impress Lounge, located at the B Bar above Moscone’s North

Why: Beyond the manufacturing hurdles that 450mm wafer processing brings, next generation fabs present new challenges with respect to the design of the facilities, substrate handling, tool connection, chemical distribution, water and electrical systems and many other areas. Where the G450C provides leadership in the area of 450mm equipment and process technologies, the goal of the F450C is to develop facility and infrastructure solutions essential to the transition to 450mm wafer fabrication.

On the Agenda:

  • Allen Ware, M+W Group & F450C: An Introduction to the F450C
  • William Corbin, G450C: Design to Requirement at the Utility Level
  • Adrienne Pierce, Edwards Vacuum: The ŒGreen Pump Strategy
  • Lothar Till, Ovivo: Water Use at 450mm

To register for the event please RSVP to [email protected]

The Facilities 450mm Consortium (F450C) is a first-of-its-kind partnership at SUNY’s College of Nanoscale Science and Engineering (CNSE) that is leading the global effort to design and build next-generation 450mm computer chip fabrication facilities. The collaboration includes 10 of the world¹s leading nanoelectronics facility companies, including Air Liquide, CH2M HILL, CS Clean Systems, Ceres Technologies, Edwards, Haws Corporation, Mega Fluid Systems, M+W Group, Ovivo, and Swagelok. Members of F450C are working closely with the Global 450mm Consortium (G450C), as announced by New York Governor Andrew M. Cuomo, to identify viable solutions required for 450mm high-volume facility construction, with initial focus areas to include reducing tool installation cost and duration, and improving facility sustainability.

CEA-Leti announced today €1 million in funding from bpifrance to accelerate preclinical development of a liver-cancer detection system called LipImage 815.

The grant, awarded through bpifrance ’s Strategic Industrial Innovation (ISI) program, will accelerate the development of LipImage 815, including production and regulatory toxicity evaluation. It also supports the launch of NICE (Nano Innovation for Cancer), the first consortium of nanomedicine stakeholders in France focused on aspects of characterization and industrialization. The consortium has been accredited by the Medicen Paris Region, a competitive cluster for innovative therapies in Ile-de-France.

Developed by Leti, LipImage 815 is a fluorescent imaging agent based on Leti’s Lipidots platform that uses lipid nanoparticles to carry a fluorescent substance to targeted cells and improve the effectiveness of diagnosis. It will be used to test for early stages of liver cancer.

Consisting of five public and private partners and led by BioAlliance Pharma, the NICE consortium includes partners with deep expertise in the field of nanomedicine. Its mission is to build a platform to accelerate the development and industrialization of nanomedicine in France by capitalizing on the strong and complementary expertise of each partner.

In addition to Leti, the consortium includes:

  • BioAlliance Pharma, developer of Livatag, a doxorubicin nanoparticle currently in phase III clinical trial for treatment of primary liver cancer
  • Nanobiotix, developer of NBTXR3, a potentiator of radiation therapy in the local treatment of cancer
  • DBI, a company specialized in the production of nanomedicine pharmaceutical products
  • Institut Galien Paris Sud (University Paris Sud/CNRS), which has an academic-excellence team specialized in nanoparticles research

“By bringing together a highly experienced team of specialists in various fields of nanomedicine, this program can significantly accelerate the development of an effective new tool for diagnosing liver cancer,” said Laurent Malier, Leti CEO. “It also leverages Leti’s achievements in the Lipidots platform, and provides another avenue for us to bring our innovations to market.”

The Strategic Industrial Innovation program promotes the emergence of European champions.  It supports ambitious, innovative collaborative projects through to industrialization, driven by innovative medium-sized companies (less than 5000 employees) and small businesses (less than 250 employees).  These highly promising projects are aimed at the commercialization of products which result from technological breakthroughs and which not be possible without fostering measures from the public sector.  Funding is generally in the €3-10 million range, as grants-in aid and loans which are repayable if the project is a success.

Leti is an institute of CEA, a French research-and-technology organization with activities in energy, IT, healthcare, defence and security. Leti is focused on creating value and innovation through technology transfer to its industrial partners. It is specialized in nanotechnologies and their applications, from wireless devices and systems, to biology, healthcare and NEMS and MEMS photonics. are at the core of its activities. An anchor of the MINATEC campus, CEA-Leti operates 8,000-m² of state-of-the-art clean room space on 200mm and 300mm wafer platforms. It employs 1,700 scientists and engineers including 320 Ph.D. students and 200 assignees from partner companies. CEA-Leti owns more than 2,200 patent families.

 

SEMI today announced that Ajit Manocha, CEO of GLOBALFOUNDRIES, has been selected to receive the “SEMI Outstanding EHS Achievement Award — Inspired by Akira Inoue.” The Environment, Health and Safety (EHS) Award is sponsored by SEMI and will be presented on July 9 at 9:00am during the SEMICON West 2013 Opening Keynote and Ceremonies in San Francisco.

“We are pleased to present this award to Ajit Manocha for his outstanding contribution and commitment to EHS issues," said Denny McGuirk, president and CEO of SEMI.  “Ajit joins a distinguished group of semiconductor executives who have been honored by our industry for notable EHS achievement and leadership.”

“Excellence in Environment, Health and Safety is not only a mandate that we set for ourselves, but a fundamental expectation of our customers and the communities where we operate,” Manocha said. “Corporate responsibility is fundamental to our culture and our value proposition to our customers, the communities in which we live and do business, and our full range of global stakeholders.”

Manocha heads GLOBALFOUNDRIES Executive Stewards Council (ESC), the leadership forum for strategic direction and accountability for risk management, corporate responsibility and sustainability.  Manocha’s leadership has resulted in significant EHS achievements at GLOBALFOUNDRIES. Those cited by the Award committee in the selection of Manocha include:

  • Zero-Incident Safety Culture — GLOBALFOUNDRIES safety goal is to continually reduce all injuries and Manocha continually challenged the EHS and project management teams to achieve zero incidents. For example, Manocha ensured that there was a strong focus on safety metrics in the executive project reviews of the new Fab 8 in Malta, New York. GLOBALFOUNDRIES’ Singapore Fabs all received “Silver Awards” for Health and Safety presented by the Workplace Safety and Health Council and supported by the Singapore Ministry of Manpower.
  • Commitment to Eco-Efficiency in Foundry Operations — In 2012, GLOBALFOUNDRIES set corporate environmental goals to reduce GHG emissions 40 percent by 2015, electricity consumption 35 percent by 2015 and water consumption 10 percent by 2015, all normalized to a manufacturing index and compared to 2010.  Fab 8 incorporates multiple energy efficiency measures, waste heat recovery, and “idle mode” for abatement systems and vacuum pumps. Fab 1 in Dresden is powered by two energy-efficient tri-generation power plants that provide electricity, heating and cooling to fab operations, GLOBALFOUNDRIES’ Singapore utilizes reclaimed NEWater for incoming supply and achieved an energy reduction of 50 GWh in 2012, with a 2013 goal of a further 57 GWh reduction.
  • WSC Commitment to Best Practices for Perfluoro-Compound (PFC) Reduction — At the 2012 annual CEO meeting of the World Semiconductor Council (WSC), Manocha led the discussion of EHS topics, urging his fellow CEOs to take action to protect the environment, conserve resources, and achieve the WSC’s PFC reduction goal. GLOBALFOUNDRIES’ newest U.S. fab, Fab 8, meets the WSC Best Practice commitment for PFC emission reduction, and Fab 1 has incorporated best practices for PFC reduction since 1999.
  • WSC Commitment to a “Conflict-Free Supply Chain” — At the 2013 WSC meeting, Manocha  championed a “Conflict-free Supply Chain” policy to address concerns related to sourcing tantalum, tungsten, tin and gold from “conflict regions” of the Democratic Republic of Congo and adjoining countries. The WSC subsequently adopted such a policy. For its part, GLOBALFOUNDRIES has already met customer requests for “Tantalum Conflict-free” products in 2012.

In addition to receiving the EHS Award at SEMICON West, Manocha will deliver the Opening Keynote for the event on July 9 at 9:00am at Moscone Center (Esplanade Hall, Keynote Stage) in San Francisco, Calif.  For more information about SEMICON West — including registration and keynote attendance —   visit http://www.semiconwest.org.

The “Outstanding EHS Achievement Award — Inspired by Akira Inoue” is sponsored by the EHS Division of SEMI. The award is named after the late Akira Inoue, past president of Tokyo Electron Limited and a strong advocate of EHS. Inoue also served on the SEMI Board of Directors. The award recognizes individuals in industry and academia who have made significant contributions by exercising leadership or demonstrating innovation in the development of processes, products or materials that reduce EHS impacts during semiconductor manufacturing.

Past recipients of the SEMI EHS Akira Inoue Award include: Richard Templeton (president and CEO, Texas Instruments), Atsutoshi Nishida (president and CEO, Toshiba), Dr. Jong-Kap Kim (chairman and CEO, Hynix Semiconductor), Dr. Morris Chang (chairman and CEO, TSMC) and other prominent industry leaders.