Category Archives: Advanced Packaging

The new Galaxy S4 from Samsung Electronics joins a growing trend of premium smartphones featuring enhanced active-matrix organic light-emitting diode (AMOLED) panels, spurring the market for these high-quality displays to more than double by 2017.

AMOLED display shipments for mobile handset applications are expected to grow to 447.7 million units in 2017, up from 195.1 million units in 2013, according to insights from the IHS iSuppli Emerging Displays Service at information and analytics provider HIS. Within the mobile handset display market, the market share for AMOLED displays is forecast to grow from 7.9% in 2013 to 15.2 percent in 2017, as presented in the figure below. AMOLED’s market share for 4-inch or larger handset displays employed in smartphones is set to increase to 24.4% in 2017, up from 23.0% in 2013.

AMOLED display shipments

“Because of their use in marquee products like the Galaxy S4, high-quality AMOLEDs are growing in popularity and gaining share at the expense of liquid crystal display (LCD) screens,” said Vinita Jakhanwal, director for mobile & emerging displays and technology at IHS. “These attractive AMOLEDs are part of a growing trend of large-sized, high-resolution displays used in mobile devices. With the S4 representing the first time that a full high-definition (HD) AMOLED has been used in mobile handsets, Samsung continues to raise the profile of this display technology.”

AMOLED on display in the S4

For its new premium smartphone, Samsung Display—the AMOLED display supplier for Samsung Electronics—increased the AMOLED pixel format to 1920 by 1080 Full High Definition (Full HD), up from 1280 x 720 WXGA present in the Galaxy S III. Part of Samsung’s popular Galaxy line, the S4 joins several high-end smartphone models from other manufacturers also featuring 1920 by 1080 resolution but distinguished by an important difference. The other handsets use thin-film transistor LCD (TFT-LCD) displays, while the Galaxy S4 is the first Full HD smartphone utilizing an AMOLED display.

Among the handsets with 1920 by 1080 TFT-LCD panels are the 4.8-inch HTC One, the 5.0-inch Sony Xperia Z, the 5.0-inch ZTE Grand S, the 5.0-inch OPPO Find, the 5.5-inch LG Optimus G Pro and the 5.5-inch Lenovo Ideaphone K900.

Samsung tackles technical issues

The high-resolution mobile handset display market is currently dominated by Low-Temperature Polysilicon (LTPS) TFT-LCDs, which accounts for the entire Full HD mobile handset display market.

Reaching the high-resolution point with true pixel densities greater than 300 pixels per inch (ppi) has been a challenge for AMOLED displays, as it is difficult to achieve dense pixel arrangements using the conventional Fine Metal Mask process while still securing enough display brightness and not compromising power consumption.

Samsung Display, however, was able to enhance AMOLED display performance by implementing two new technologies in addition to its existing Fine Metal Mask process. The maker succeeded in increasing the lighting area in AMOLED panels with its new structure of Pentile matrix, and it used phosphorescent material for the green subpixels, allowing better light management and lower energy consumption.

As a result, the AMOLED display was able to achieve a denser pixel arrangement, boosting its pixel density to greater than 400 ppi and resulting in 1920 x 1080 Full HD display in the Galaxy S4. This compares to 1280 x 720 WXGA in the Galaxy S III, 800 x 480 WVGA in the Galaxy S2 and 1280 x 800 WXGA in the Galaxy Note. The higher pixel density provides sharper and more defined images, while being able to display more content on a smaller display area.

Samsung also implemented the Floating Touch system in Galaxy S4, allowing users to interact with the touch screen by letting their fingers hover a few inches away from the display. By combining mutual capacitance, the on-surface normal touch sensing and self-capacitance, the Floating Touch in the Galaxy S4 expands the user experience of the display. It also detects touch inputs from gloved hands, a feature that was first introduced through Nokia’s Lumia 920 in 2012.

Galaxy S4 will be the first Full HD AMOLED display offering in the market. However, material lifetime, color balance and limited supplier base still need to be addressed for a larger market presence of OLEDs and stronger competitiveness against LTPS TFT-LCDs.

DNA nanotechnology

The fundamental unit in Hao Yan’s new nanostructures rely on modifying a 4-arm DNA junction. The relaxed DNA geometry found in a 4-arm junction (B) can be rotated 150 degrees clockwise or 30 degrees counterclockwise (C) to form the right angles needed to make a DNA Gridiron (D and E).

Photo by: Biodesign Institute

In a new discovery that represents a major step in solving a critical design challenge, Arizona State University Professor Hao Yan has led a research team to produce a wide variety of 2-D and 3-D structures that push the boundaries of the burgeoning field of DNA nanotechnology.

The field of DNA nanotechnology utilizes nature’s design rules and the chemical properties of DNA to self-assemble into an increasingly complex menagerie of molecules for biomedical and electronic applications. Some of the Yan lab’s accomplishments include building Trojan horse-like structures to improve drug delivery to cancerous cells, electrically conductive gold nanowires, single molecule sensors and programmable molecular robots.

With their bio-inspired architectural works, the group continues to explore the geometrical and physical limits of building at the molecular level.

"People in this field are very interested in making wire frame or mesh structures," said Yan. "We needed to come up with new design principles that allow us to build with more complexity in three dimensions."

In their latest twist to the technology, Yan’s team made new 2-D and 3-D objects that look like wire-frame art of spheres as well as molecular tweezers, scissors, a screw, hand fan, and even a spider web.

The Yan lab, which includes ASU Biodesign Institute colleagues Dongran Han, Suchetan Pal, Shuoxing Jiang, Jeanette Nangreave and assistant professor Yan Liu, published their results in the March 22 issue of Science.

The twist in their ‘bottom up,’ molecular Lego design strategy focuses on a DNA structure called a Holliday junction.

In nature, this cross-shaped, double-stacked DNA structure is like the 4-way traffic stop of genetics – where 2 separate DNA helices temporality meet to exchange genetic information. The Holliday junction is the crossroads responsible for the diversity of life on Earth, and ensures that children are given a unique shuffling of traits from a mother and father’s DNA.

In nature, the Holliday junction twists the double-stacked strands of DNA at an angle of about 60-degrees, which is perfect for swapping genes but sometimes frustrating for DNA nanotechnology scientists, because it limits the design rules of their structures.

"In principal, you can use the scaffold to connect multiple layers horizontally," [which many research teams have utilized since the development of DNA origami by Cal Tech’s Paul Rothemund in 2006]. However, when you go in the vertical direction, the polarity of DNA prevents you from making multiple layers," said Yan. "What we needed to do is rotate the angle and force it to connect."

Making the new structures that Yan envisioned required re-engineering the Holliday junction by flipping and rotating around the junction point about half a clock face, or 150 degrees. Such a feat has not been considered in existing designs.

"The initial idea was the hardest part," said Yan. "Your mind doesn’t always see the possibilities so you forget about it. We had to break the conceptual barrier that this could happen."

In the new study, by varying the length of the DNA between each Holliday junction, they could force the geometry at the Holliday junctions into an unconventional rearrangement, making the junctions more flexible to build for the first time in the vertical dimension. Yan calls the backyard barbeque grill-shaped structure a DNA Gridiron.

"We were amazed that it worked!" said Yan. "Once we saw that it actually worked, it was relatively easy to implement new designs. Now it seems easy in hindsight. If your mindset is limited by the conventional rules, it’s really hard to take the next step. Once you take that step, it becomes so obvious."

The DNA Gridiron designs are programmed into a viral DNA, where a spaghetti-shaped single strand of DNA is spit out and folded together with the help of small ‘staple’ strands of DNA that help mold the final DNA structure. In a test tube, the mixture is heated, then rapidly cooled, and everything self-assembles and molds into the final shape once cooled. Next, using sophisticated AFM and TEM imaging technology, they are able to examine the shapes and sizes of the final products and determine that they had formed correctly.

This approach has allowed them to build multilayered, 3-D structures and curved objects for new applications.

"Most of our research team is now devoted toward finding new applications for this basic toolkit we are making," said Yan. "There is still a long way to go and a lot of new ideas to explore. We just need to keep talking to biologists, physicists and engineers to understand and meet their needs."

Yan’s research is funded by several grants from the National Science Foundation, Office of Naval Research, Army Research Office grant and an Army Research Office MURI award, and an ASU Presidential Strategic Initiative Fund. Hao Yan and Yan Liu are part of the Center for Bio-Inspired Solar Fuel Production, an Energy Frontier Research Center funded by the U.S. Department of Energy, Office of Science, Office of Basic Energy Sciences.

Hao Yan is the Milton Glick Chair in the Department of Chemistry and Biochemistry and researcher at ASU’s Biodesign Institute.

Volunteers sponsored by SPIE, the international society for optics and photonics, were in Washington, D.C., last week to thank Congressional representatives for recent support for photonics R&D and to urge future support for in several key areas vital to economic growth and scientific progress. They were among more than 250 scientists, engineers, and business leaders visiting Capitol Hill March 12-13 for a Congressional Visits Day (CVD) sponsored by the Science-Engineering-Technology (SET) Work Group.

  • SPIE volunteers focused primarily on three messages identified by the SPIE Engineering, Science, and Technology Policy (ESTeP):
  • Support for a National Photonics Initiative (NPI) being forwarded by a coalition of professional societies including SPIE, LIA (Laser Institute of America), IEEE Photonics Society, OSA (The Optical Society), and the American Physical Society.
  • Overhaul of export controls.
  • Eliminating restrictions on government-employee travel to scientific conferences.

Members and staff were generally in agreement that now is a critical time for the U.S. to be prioritizing investments in science and innovation and that while control of spending is important, funding for R&D and for STEM education are important ways to grow the economy.

"I appreciate the preparations by SPIE to support those of us working in photonics to succinctly bring our message to our representatives in Congress,” said Jim McNally, director of operations at Applied Technology Associates. “The background materials and coaching tips provided really help us to clearly and concisely articulate the critical priorities to support our nation’s competiveness and innovation edge. We were able to have very productive discussions emphasizing the urgency for a National Photonics Initiative."

Ben Franta, a student at Harvard University, called the event “an eye-opening experience.”

“In the same way that being a scientist or engineer is very different from what most other people imagine it to be, our government operates in a way that’s different from what we might expect by watching or reading the news,” he said.

Franta said the CVD program was “a valuable opportunity to engage with our lawmakers in a way that can lead to real results. To me, the fact that SPIE makes such great use of this opportunity — both to communicate with Congress and to educate students like me — shows a forward-looking approach to promoting technologies in optics and photonics in this country and throughout the world."

An evening reception provided an informal opportunity for CVD participants to talk with Congressional members and staff, and included an exhibition in which company representatives demonstrated products based on discoveries and innovations resulting from federal R&D funding. SPIE co-sponsored a booth highlighting the recent National Academies report, “Optics and Photonics: Essential Technologies for our Nation,” and raising awareness of efforts to create the NPI.

At the reception, the SET George E. Brown Award was presented to Representatives Mike Honda (D-California) and Richard Hanna (R-New York), to recognize their outstanding efforts to advance and promote science, engineering, and technology on Capitol Hill.

More than 50 percent of all industrial innovation and growth in the United States since World War II can be attributed to advances pioneered through scientific research, with publicly funded R&D the vital foundation for today’s scientific and technological progress.

Technology transfer from academic research adds billions of dollars to the economy each year and supports hundreds of thousands of jobs.

SPIE is the international society for optics and photonics, a not-for-profit organization founded in 1955 to advance light-based technologies. The Society serves nearly 225,000 constituents from approximately 150 countries, offering conferences, continuing education, books, journals, and a digital library in support of interdisciplinary information exchange, professional networking, and patent precedent. SPIE provided over $3.2 million in support of education and outreach programs in 2012.

The Institute of Microelectronics (IME), a research institute of the Agency for Science, Technology and Research (A*STAR) in Singapore, has launched the Copper (Cu) Wire Bonding Consortium II. The consortium which rides on the successes of Phase I launched in 2010 aims to improve the reliability of semiconductor devices by tackling copper wire bonding issues related to corrosion and stress. Members of this consortium span across the semiconductor supply chain including Atotech S.E.A., GLOBALFOUNDRIES, Heraeus Materials and Infineon Technologies.

Copper, which offers favorable cost, performance, quality and reliability benefits over gold, has become one of the preferred materials for wire bonding interconnects in microelectronics. Today, however, the industry still faces many technical challenges in developing copper as the best choice for chip-to-package interconnection. One of the key technical issues is related to copper’s hardness relative to gold, which requires bonding parameters to be very well controlled in order to eliminate the risk of damaging bond pads and underlying structures. Another daunting challenge of using copper is its reactivity with oxygen in the surrounding air which causes corrosion-related problems. These two issues can affect the reliability and quality of semiconductor devices.

Against this background, the IME Cu Wire Bonding Consortium II will conduct a study on corrosion and the mechanisms on the effect of various packaging materials. To understand the effects of copper wire hardness when bonding on different materials, the consortium will carry out modeling and characterization of copper wire bonding stress using stress sensors developed under the scope of Phase I of the Cu Wire Consortium to provide an improved technique of measuring wire bonding stress. The outcome of this work will enable semiconductor manufacturers as well as test and packaging houses to develop solutions to improve product reliability, especially those targeted at high reliability applications.

"IME has been dominant in the R&D of advanced packaging technologies and remains focused on developing solutions to help the industry reduce manufacturing costs,” said Prof. Dim-Lee Kwong, Executive Director of IME. “We are excited to begin a new phase of the Cu Wire Bonding Consortium to enable the development of robust, high reliability and low cost interconnection solutions."

“GLOBALFOUNDRIES is pleased to be in this consortium as the first phase of our partnership has successfully resulted in optimizing 0.7 mil in copper wire bonding on our 40nm product and passed the JEDEC reliability test,” said Mr. K. C. Ang, Senior Vice President and General Manager for GLOBALFOUNDRIES Singapore. “The success has brought us to the next phase of collaboration where the process will be tested on our advanced 28nm product. We see this industry collaboration truly augmenting the value proposition we have on offering quality and cost effective wafer manufacturing to our customers.”

“Infineon has been part of the Copper Wire Bonding Consortium since it first launched in 2010,” said Mr. Guenter Mayer, Senior Director, Package Technology and Innovation, Infineon Technologies Asia Pacific. “Today, our interest lies in copper wire bond interconnect performance and reliability in semiconductors that can meet the stringent quality requirements of Automotive and Industrial applications.”

“Being a member of the consortium enables Heraeus to work with strong industry partners and research institutes in order to have more in-depth understanding of wire bond reliability. The consortium members are of various backgrounds, such as wafer manufacturers, mold compound manufacturers and end users. The wafer manufacturers design pad structures that cater for the harder copper wire which created challenges on 1st bond mechanical stress during bonding and package reliability due to corrosion. Other partners are mold compound manufacturers and end users who can equally contribute to materials and assessment on best combination of package design, materials and application solution,” said Mr. Bernd Stenger, Executive Vice President, Contact Materials Division, Heraeus Materials Technology.

North America-based manufacturers of semiconductor equipment posted $1.07 billion in orders worldwide in February 2013 (three-month average basis) and a book-to-bill ratio of 1.10, according to the February Book-to-Bill Report published today by SEMI.  A book-to-bill of 1.10 means that $110 worth of orders were received for every $100 of product billed for the month.

The three-month average of worldwide billings in February 2013 was $975.3 million. The billings figure is 0.8 percent higher than the final January 2013 level of $968.0 million, and is 26.3 percent lower than the February 2012 billings level of $1.32 billion.

book-to-bill ratio semiconductor industry Feb 2013

“Three-month average bookings and billings posted by North American semiconductor equipment providers remain above parity and consistent with prior month levels," said Denny McGuirk, president and CEO of SEMI. "We expect modest investment by semiconductor makers in the first half of the year with foundry and advanced packaging technology among the near-term spending drivers.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

The data was compiled by David Powell, Inc., an independent financial services firm, without audit, from data submitted directly by the participants. SEMI and David Powell, Inc. assume no responsibility for the accuracy of the underlying data.

The data is contained in a monthly Book-to-Bill Report published by SEMI. The report tracks billings and bookings worldwide of North American-headquartered manufacturers of equipment used to manufacture semiconductor devices, not billings and bookings of the chips themselves. The Book-to-Bill report is one of three reports included with the Equipment Market Data Subscription (EMDS).

SEMI is the global industry association serving the nano- and micro-electronic manufacturing supply chains. SEMI maintains offices in Bangalore, Beijing, Berlin, Brussels, Grenoble, Hsinchu, Moscow, San Jose, Seoul, Shanghai, Singapore, Tokyo, and Washington, D.C.

 

David DiPaola is Managing Director for DiPaola Consulting a company focused on engineering and management solutions for electromechanical systems, sensors and MEMS products.  A 16 year veteran of the field, he has brought many products from concept to production in high volume with outstanding quality.  His work in design and process development spans multiple industries including automotive, medical, industrial and consumer electronics.  Previously, he has held engineering management and technical staff positions at Texas Instruments and Sensata Technologies, authored numerous technical papers and holds five patents.  To learn more, please visit www.dceams.com.   

 

In the third article of the MEMS new product development blog, critical design and process steps that lead to successful prototypes will be discussed.  These items include definition of the customer specification, product research, a solid model, engineering analysis to validate design direction, tolerance stacks, DFMEA, manufacturing assessment and process map.  With the modeling and analysis tools available and short loops for both design validation and process development, it is possible and should be expected to have functional prototypes on the first iteration.     

Read David’s first installment of the MEMS new product development blog.

Thorough review of the customer specification and an understanding of the application are two of the most critical steps in developing a prototype.  Without this knowledge, its a guess on whether the design will be successful meeting the performance objectives with next to zero quality problems.  The issues often encountered are the customer specification is poorly defined, it does not exist or there are gaps between customer targets and supplier performance.  It is the responsibility of the lead engineer to work with the customer to resolve these issues in the beginning stages of the prototype design to ensure a functional prototype is achieved and is representative of a product that can be optimized for production.   Furthermore, this specification creates an agreement between the supplier and customer on expectations and scope.  Should either of these change during the project, the deliverables, cost and schedule can be revisited.  Expectations and scope include package envelope, application description, initial and performance over life specifications, environmental, mechanical and electrical validation parameters, schedule and quantities for prototype and production.  In this process the supplier and customer review each item of the specification and mark it as acceptable as written or needs modification to be met given current knowledge.  There can also be area of further research and development before an agreement on the topic can be reached.  This entire process is documented and signed by both parties as a formal contract.  Then as more is learned about both the product design and application, modifications to the agreement can (and likely will) occur with consent of both parties. 

Product research is another area of significant importance to the prototype process. This research has several branches including technology to be used, existing intellectual property, materials, design approaches, analysis techniques, manufacturing processes to support proposed design direction and standard components available to name a few.  Product research will also involve reaching out to experts in different fields that will play a role in the product design.  This is the initial data collection phase of learning from previous works through reading patents, journal articles, conference proceedings and text books and building a team of qualified professionals.  This process is sometimes chaotic and over whelming while wading through mounds of information in search of a viable design path.  However, this only lasts for a short period as trends start to form, innovation is birthed and a path is forged. 

Parametric, 3D modeling is no longer a luxury but a must have in the design and prototype process.  It is essential for visualizing the design, documenting it and analyzing function, geometric properties and potential interferences.  However, use of the solid model should not stop there.  The documented geometry can be imported through a live link or other means to various other tools such as CNC machining, finite element analysis, tolerance stack analysis, motion visualization, fabric pattern generation prior to stitching, mold flow analysis, electrical simulations, equipment interactions, process development and much more.  The solid model should be considered a starting point for a much larger analytical model that is used to describe the fabrication, function and performance of the product and its components.  Once the solid model is complete, it is also extremely helpful to make stereolithography (SLA) or 3D printed components that can be felt, observed and often times used for preliminary product testing.  For a trivial cost, SLA’s can provide a wealth of information prior to prototype and help sell the design to colleagues and customers. 

As highlighted in the previous paragraph, engineering analysis is the process used to validate the design and process direction theoretically.  The analysis can take the form of a manual hand calculation of deflection to the sophistication of finite element analysis predicting the strain in the diaphragm of a MEMS pressure sensor due to deformation of the surrounding package under thermal conditions.  The key to successful analysis is not only proper engineering judgment on parameters and attention to detail in model creation but validation of the analysis through experimentation or other theoretical means.  For example, the FEA results of a MEMS diaphragm under large deflection can be compared to other theoretical calculations of a round plate under large deflection that has been validated with experiment.  Correlation of the results suggest your model is in the ballpark and can be used to evaluate other parameters such as stress and strain.  In this analysis phase, the global model is often comprised of several smaller models using different analytical means that are then tied back together for a prediction of performance.  With many live links between several pieces of analytical software and the power of today’s computers, this process is becoming more efficient with better overall accuracy. 

To better illustrate the points above, a case study of a MEMS SOI piezoresistive pressure sensor will be reviewed.  This pressure sensor was designed for operating pressures of 1000 – 7000 KPa. Due to the pressure range used, the surface area of the sensor that was bonded to the mating package substrate needed to be maximized while minimizing the overall foot print to increase the number of sensors per wafer.  Hence a deep reactive ion etch was used to obtain near vertical sidewalls.  A thicker silicon handle wafer was used to provide additional strain isolation from the sensor package while staying within a standard silicon size range for lower cost.  The silicon reference cap provided a stable pressure reference on one side of the sensor diaphragm.  Its geometry was optimized for handling, processing and dicing.

A solid model was created of the design including the wirebond pads, aluminum traces, interconnects, oxide layers and piezoresistors on the silicon membrane wafer.  In addition, the cap and handle wafers were modeled.  Although not shown here for proprietary reasons, each layer of the membrane was modeled as though it was fabricated in the foundry.  This enabled the development of a process map and flow.  Finite element analysis of the diaphragm under proof pressure loads showed that the yield strength of the aluminum traces could be exceeded when in close proximity to the strain gages.  This can cause errors in sensor output.  Hence doped transition regions were added to keep the aluminum out of this high stress region.  A comprehensive model of the piezoresistive Wheatstone bridge was created to select resistor geometry and predict the performance of the sensor under varying pressure and thermal conditions.  Strain induced in the gages from applied operating pressure and resulting deflection of the diaphragm was modeled using finite element analysis.  A model was also created to determine approximate energy levels needed to dope both the piezoresistors and transition regions.  This information was critical in discussions with the foundry in order to design a product that was optimized for manufacture as doping levels and geometry were correlated.   Furthermore short process loops were developed at the NIST Nanofab to optimize etch geometry and validate burst strength. 

It is important to note that the design of the sense element was designed with constant feedback from the foundry and their preferences for manufacturing.  In addition, the sense element and packaging were designed concurrently as there was significant interactions that needed to be addressed.  Design of the sense element and packaging in series would have resulted in a non optimized design with higher cost.  In the end, a full MEMS sensor specification was developed and provided to the foundry for a production quote and schedule.  Through working directly with the foundry, optimizing die size and designing a sensor for optimum manufacture, over 60% improvement in cost was achieved over going to a full service MEMS design and fabrication facility.                        

 Read David’s previous installment of the MEMS new product development blog.

Figure 1
MEMS SOI Sense Element
Figure 2
DRIE Hole Fabricated at NIST Nanofab

 

Due to the length of these topics, stay tuned for next months blog for Part 2 of this article.  In that segment other critical steps including tolerance stacks, DFMEA, manufacturing assessment and process maps will be reviewed.

Next generation memories are the emerging non-volatile memory technologies, which are expected to replace existing memories. Not all existing memories will be replaced, however. Next generation memories majorly targets the non-volatile memories such as NAND and NOR. High write and read latency, scalability, high endurance etc. makes emerging memories the best replacement for traditional non-volatile memories. Out of these memories, only MRAM and FeRAM have reasonable market share, and they are quite commercialized in the market. PCRAM has very marginal market and memristor is set to enter the market by the end of 2013   

The major drivers for the next generation memory market are faster switching time, high endurance and power efficient. In addition, the huge application base of traditional memories will also become the driver for this market. Since these memories are not completely established, there are still flaws in processes which causes drawbacks like instability and low write endurance rate in some of the memories. As mentioned, these memories are the replacement for flash memories in near future. The flash market has already tapped the huge market and hence it makes the way for next generation memories.   

The major issue for next generation memories is its design cost. Not all the processes are intact yet, hence it increases the cost of the process and design. However, early adoption of these memories will be the game changing strategy for memory market. Most of the next generation memories are also called as “Universal memory,” which performs both the function volatile and non-volatile. So the early adoption of such memories will be the crucial for the companies.   

The companies currently involved in next generation memory market are Samsung (South Korea), SK Hynix (South Korea), Micron (U.S.), Elpida (Japan), Toshiba (Japan), Powerchip (Taiwan), Winbond (Taiwan), Fujitsu (Japan), Nanya (Taiwan), Rambus (U.S.), Everspin Technology (U.S.), IDT Incorporated (U.S.), HP (U.S.).  

Samsung Electronics catapulted to the top of the optoelectronics supplier ranking in 2012 from 12th place in 2011 after it gained full ownership of Samsung LED, a 50-50 joint venture in light-emitting diodes that was created in 2009 between Samsung Electronics and affiliate Samsung Electro-Mechanics.  In April 2012, the venture was absorbed into Samsung Electronics to strengthen and expand the use of high-brightness LEDs in displays, LCD TVs, and new solid-state lighting products. This transfer increased Samsung’s optoelectronics sales by 223% to $2.5 billion in 2012 compared to $780 million in 2011, according to the new 2013 edition of IC Insights’ O-S-D Report—A Market Analysis and Forecast for Optoelectronics, Sensors/Actuators, and Discretes.

The LED operation added $1.5 billion to Samsung’s total revenues in 2012, based on the O-S-D supplier rankings in the new 350-page report, which becomes available in March 2013.  The rest of Samsung’s optoelectronics sales come from CMOS image sensors, which generated $975 million in 2012—a 25% increase from 2011.  The 2013 O-S-D Report shows Samsung as the second-largest supplier of CMOS image sensors in 2012, positioned between top-ranked OmniVision and third-place Sony.  The 2013 O-S-D Report provides top 10 supplier rankings for the individual optoelectronics, sensors/actuators, and discrete semiconductor markets in addition to an overall top 30 list of companies selling O-S-D products in 2012.

Samsung’s huge increase in optoelectronics sales vaulted it to first place in IC Insights’ top 30 O-S-D ranking for 2012 from 20th in 2011. High-brightness white LED and blue-laser pioneer Nichia in Japan moved up to second place in the O-S-D ranking from fourth place in 2011 with an 11% increase in optoelectronics sales in 2012.  In the 2012 O-S-D ranking, Toshiba and ST fell to third and fourth, respectively, due to steep sales declines in CMOS image sensors and double-digit drops in discretes.  Toshiba and ST had been the No. 1 and No. 2 suppliers in the O-S-D marketplace since the middle of the last decade.

top five O-S-D suppliers 2012

Suppliers of high-brightness LEDs generally moved higher in the overall O-S-D ranking in 2012 due to strong sales growth in lamp devices used for solid-state lighting systems.  In addition to Samsung and Nichia moving up to the No. 1 and 2 positions in O-S-D, six other LED makers climbed higher in the top 30 ranking (Sharp, Osram, Philips, LG Innotek, Seoul Semiconductor, and Toyoda Gosei). U.S.-based Cree, which makes LEDs and radio-frequency/microwave power transistors, was unchanged in the top 30 O-S-D ranking at 17th place in 2012.

Among the significant changes in the O-S-D supplier rankings was ST climbing to first place in the sensors/actuators market in 2012 from fourth in 2011.  ST’s sensor sales grew 19% in 2012 to $791 million.  Hewlett-Packard fell to fourth place in sensors/actuators last year from the top spot in 2011 due to a 10% decline in sales of HP’s inkjet-printer actuators in 2012.  In discrete semiconductors, Toshiba held on to its top position despite a 12% decline in discretes sales in 2012.

Fujitsu Semiconductor America today announced two new FRAM products featuring 1 Mbit and 2 Mbits of memory. The MB85RS1MT and MB85RS2MT, the largest-capacity, serial-interface FRAM products offered by Fujitsu, will be available in sample quantities at the end of March.

The MB85RS1MT and MB85RS2MT FRAMs offer features that are ideal for smart meters, industrial machinery and medical devices, including high endurance, higher writing speed, larger density and low power consumption. The new FRAMs can support 10 trillion writing cycles, an endurance roughly 10 times greater than previous ferroelectric memories from Fujitsu and superior to other nonvolatile memories by at least a million times. Memory devices using FRAM consume 92 percent less power during writing compared to identical-capacity EEPROMs, and feature a writing speed 920 times faster.

As a single-chip solution, the new FRAM products substantially reduce component costs, mounted area, and power consumption compared to other system memory solutions that use EEPROM or SRAM and a battery for data retention. The new FRAM devices, by eliminating the need for a battery and additional memory components, simplify the design process, save board space, and reduce maintenance costs.

FRAM is a high-speed random access memory that is non-volatile, allowing data to be retained when the power is switched off. Its speed and durability enable FRAM to safely store more data than alternative solutions in the event of a sudden power failure. The dependability of FRAM for data retention has made it the choice of global customers for factory automation equipment, measurement devices, banking terminals, and medical devices since its introduction by Fujitsu in 1999.

"The larger 1 Mbit and 2 Mbit densities of the MB85RS1MT and MB85RS2MT, combined with FRAM’s higher endurance, faster writing speed and lower power, make the new devices optimal for real-time, continuous data-logging applications," said Tong Swan Pang, senior marketing manager at Fujitsu Semiconductor America. "FRAM is also ideal for sensitive medical devices such as hearing aids, where its faster writing speed eliminates undesirable noise."

The MB85RS1MT (1 Mbit) and MB85RS2MT (2 Mbit) will also be available as bare die for use in tiny medical and consumer devices.

With the introduction of the Galaxy S4, Samsung Electronics continues to lead the market in the adoption of pressure sensors in smartphones, paving the way for massive growth in the market for these devices in the coming years.

Global shipments of microelectromechanical system (MEMS) pressure sensors in cellphones are set to rise to 681 million units in 2016, up more than eightfold from 82 million in 2012, according to the IHS iSuppli MEMS & Sensors Service at information and analytics provider IHS (NYSE: IHS). Shipments this year are expected to double to 162 million units, as presented in the attached figure, primarily due to Samsung’s usage of pressure sensors in the Galaxy S4 and other smartphone models.

“Samsung is the only major original equipment manufacturer (OEM) now using pressure sensors in all its flagship smartphone models,” said Jérémie Bouchaud, director and senior principal analyst for MEMS and sensors at IHS. “The company appears to be slightly ahead of its time in its adoption of pressure sensors, even though the most compelling application—indoor navigation—is still not ready for deployment. However, Samsung seems to want to anticipate the start of this market and get a jump on the competition for pressure sensors. The pressure device represents just one component among a wealth of different sensors used in the S4.”

Pressure’s rising

Besides Samsung, few other OEMs have been using pressure sensors in smartphones. The only other smartphone OEMs to use pressure sensors in their products are Sony Mobile in a couple of models in 2012, and a few Chinese vendors, like Xiaomi.

Apple Inc., which pioneered the use of MEMS sensors in smartphones, does not employ pressure sensors at the moment in the iPhone. However, IHS expects Apple will start them in 2014, which will contribute to another doubling of the market in 2014 to 325 million units.

Applying pressure

Although pressure sensors aren’t very useful currently in smartphones, they hold strong potential for the future.

The most interesting application now is the fast Global Positioning System (GPS) lock, wherein the GPS chipset can lock on to a satellite signal and calculate positions more quickly by using the pressure sensor to determine the smartphone’s altitude.

However, the most exciting use for pressure sensors in the future will be indoor navigation, an area with massive potential growth in retail and travel applications. Pressure sensors will provide the floor accuracy required to determine which level a user is on within a structure.

While the ecosystem is not yet fully in place for indoor location/navigation, IHS anticipates this market will reach a breakthrough in growth during the next 12 to 18 months.

By this time, Samsung will have a considerable lead over Apple and other competitors in the installed base of pressure sensors in smartphones.

Samsung takes lead in smartphone MEMS sensors

Although Apple pioneered the usage of MEMS sensors in smartphones, and was the top consumer of these devices for many years, Samsung in 2012 took the lead from Apple for the first time. With Samsung expected to maintain hegemony in smartphone shipments in 2013 and the company loading up on the number of MEMS and other sensors in each smartphone that it ships, its lead in this area is is likely to continue to grow.

Given its emphasis on detecting and adapting to consumer lifestyles, the Galaxy S4 integrates a wealth of different sensors, including the accelerometer, RGB light, geomagnetic, proximity, gyroscope, barometer, gesture and even temperature and humidity varieties.

Sensor suppliers

While IHS has not yet conducted a physical teardown of the Galaxy S4, the IHS iSuppli MEMS and Sensors Service is able to anticipate the likely suppliers of these devices for the smartphone.

The pressure sensor in the S4 is made either by STMicroelectronics, as it was in the Galaxy S III; or by Bosch, like what was used in the Galaxy Note 1 and 2. Both companies are the only mass producers of these devices today for handsets.

And just as in the Samsung Galaxy S III, STMicroelectronics and yet another supplier, InvenSense, are expected to share the supply of the S4’s inertial measurement unit (IMU), which combines the accelerometer and gyroscope.

Meanwhile, the S4’s compass could be supplied by any one of three entities: by AKM—the same as the Galaxy S III; or by Yamaha—as was used in a previous member of the Galaxy smartphone line; or by Alps—which is an up-and-coming manufacturer in this area.

Maximum RGB

IHS expects that Samsung will continue to use an RGB sensor in the S4, as part of a combo device that aggregates RGB, proximity, and IR LED emitter, as it did in the Galaxy Note 2 and the Samsung S III. Samsung was the only user of such combo sensors in smartphones in 2012.

If the RGB sensor is installed on the side of the S4 display, it will be used to sense the color temperature of the room where it’s located, and adapt the contrast and colors on the display to enhance the viewing experience. Such RGB sensors are useful for high-end displays. Since the Galaxy S4 is expected to have full high-definition display—unlike the S3—the added value of having an RGB sensor might be more obvious and noticeable in the S4.

The RGB sensor also could be installed on the back the Galaxy S4 in conjunction with the camera module. This can help in taking better pictures by correcting the white balance.

Capella Microsystems is likely to be the RGB supplier, just as in the Galaxy S III. Other potential suppliers are ams-TAOS, Maxim and Hamamatsu.