Category Archives: Advanced Packaging

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that it has achieved strong revenue growth and expanded its headcount for the first half of 2013.  The company attributes this success to continuing demand for its flexible process solutions designed to address high-volume manufacturing (HVM) needs across multiple markets–including 3D-ICs, MEMS, power devices and compound semiconductors.  EVG’s latest technology innovations that address these and other markets will be showcased this week at SEMICON West 2013 at the Moscone Convention Center in San Francisco.  In addition to unveiling a series of new solutions, EVG also reports that it continues to expand its wafer processing services and process development consultation capabilities worldwide as part of the company’s long-term growth strategy. 

"2013 has been a strong year for EV Group as we continue to invest in new technologies and capabilities to support our customers’ ability to ramp next-generation devices to volume production quickly and cost-effectively at high yields," said Dave Kirsch, vice president and general manager of EV Group North America.  "This requires not only leading-edge process equipment but also world-class global support and process development services. EVG’s local teams work hand in hand with our corporate headquarters to provide increased flexibility and capability for our customers.  That includes our ability to offer small-scale and pilot-production services at our global applications labs, which is a key differentiator for us and a key value proposition for customers."

Expanding sales growth and global customer support operations

During the first half of 2013, EVG achieved approximately 10 percent growth in sales and more than 10 percent increase in employees. To support its customers’ roadmaps, EVG continues to invest aggressively in research and development–approximately 20 percent of sales–in several key efforts, including 450-mm tool development. Among these efforts, EVG has invested in new state-of-the art cleanrooms and application labs with in-house process demo capability on fully automated systems at its corporate headquarters in Austria, as well as its regional headquarters in Japan and North America. 

VLSIresearch recently recognized EVG’s customer service and support, ranking it at one of the 10 Best Focused Suppliers in Chip Making Equipment. EVG was also ranked in first place in the "Other Silicon Wafer Fab Equipment" category for the company’s wafer bonding solutions. 

Leadership in wafer bonding

Already a leading supplier of HVM wafer bonding solutions, EVG recently unveiled several new platform developments in both fusion bonding and temporary bonding/debonding applications.  Yesterday, EVG unveiled the latest version of its EVG 40NT automated measurement system, which features improved specifications to achieve the highest wafer-to-wafer alignment accuracies needed for the production of next-generation 3-D integrated image sensors and stacked memory devices.  The EVG40NT is seamlessly integrated with EVG’s GEMINI FB automated production fusion bonding system to enable a closed-loop control system that facilitates customers’ ramp to volume production across multiple markets and applications.  Last week, EVG also introduced its LowTemp debonding platform, which features three high-volume-production room-temperature debonding process types and is supported by a supply chain of seven qualified adhesive suppliers to enable greater manufacturing flexibility.

Expertise in lithography and resist processing

Building upon the company’s expertise in lithography, EVG also recently unveiled the EVG120 automated resist processing system, which integrates spin/spray coating and wet processing to provide a highly flexible system that maximizes productivity and cost of ownership.  The EVG120 is ideally suited for a wide variety of markets and applications, including high-topography coating and spray coating for MEMS, thick-film resists and bumping for advanced packaging.  It is also suited for passivation, dielectrics and thick-film processing for compound semiconductor devices.

Rounding out EVG’s latest developments in wafer surface preparation, the company also recently announced the CoatsClean wafer cleaning solution, which combines process, equipment and formulation technology to deliver an innovative, low-cost-of-ownership approach to single-wafer photoresist and residue removal.  Co-developed with Dynaloy, CoatsClean is designed to address thick films and difficult-to-remove material layers for the 3D-IC/through-silicon via (TSV), advanced packaging, MEMS and compound semiconductor markets.

Presentations at SEMICON West 2013

Attendees interested in learning more about the company and its latest developments are invited to visit EVG’s booth #819 in the Moscone South Hall at SEMICON West as well as attend the company’s presentations during the show’s technical program.  Markus Wimplinger, corporate technology development and IP director of EVG, will present "High Resolution In-line Metrology Module for High-Volume Temporary Bonding Applications at the SEMATECH Workshop on 3D Interconnect Metrology on Wednesday, July 10 from 11:20 – 11:40 a.m. at the Marriott Marquis in San Francisco. In addition, Dr. Thorsten Matthias, business development director at EV Group, will present "From Sensor Fusion to System Fusion" at the TechXPOT session "MEMS and Sensor Packaging for the Internet of Things" on Thursday, July 11 from 12:10 – 12:30 p.m. in the Moscone North Hall.

EV Group (EVG), a  supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today introduced the latest version of its EVG40NT automated measurement system, which is designed to work in concert with the company’s GEMINI FB fusion wafer bonding system to support the manufacture of next-generation 3D-integrated CMOS image sensors.  The enhanced EVG40NT measures wafer-to-wafer alignment accuracy to within 40nm (3 sigma), while its seamless software integration with the GEMINI FB provides a closed-loop fusion bonding control system that enables the manufacture of ultra-fine-pitch (less than two micron) through-silicon vias (TSVs).  These tighter specifications are necessary for enabling the production of 3D-integrated image sensors, and pave the way for accelerating 3D-integration with other device types, such as stacked memory.

"EV Group’s GEMINI FB fusion wafer bonding platform is the de facto industry standard for CMOS image sensor production, and already leads the industry in wafer-to-wafer alignment accuracy due to our proprietary SmartView alignment technology," stated Dr. Thorsten Matthias, business development director at EV Group.  "The integration of GEMINI FB with the enhanced EVG40NT brings statistical process control and alignment accuracy to a whole new level, and pushes 3D-IC manufacturing to new limits.  High-precision manufacturing requires accurate metrology that is seamlessly integrated into the process to enable real-time monitoring and fast corrective action.  In the case of wafer bonding, measuring and mapping each die gives valuable insight into local stress variations created during upstream processes, which can cause distortions and local misalignments further downstream."

Fusion wafer bonding is ideally suited for 3D-integrated image sensors and other stacked devices because it is a room-temperature bonding process, which eliminates misalignment due to thermal expansion mismatch between the wafers.  Having the ability to inspect the quality of the wafer bond and measure alignment accuracy prior to the final annealing step provides an easy rework path, thereby enabling 100-percent yield for wafer stacking.  The GEMINI FB platform combines EVG’s LowTemp plasma activation technology, wafer cleaning, SmartView wafer-to-wafer alignment and fusion wafer bonding in a single fully automated high-volume-manufacturing system.  The EVG40NT performs highly accurate, non-destructive, top-to-bottom side alignment accuracy measurements on double-sided structured wafers or bond interfaces, as well as critical dimension and box-in-box measurements of single and double-sided structured wafers.

"Next-generation image sensors are the technological frontrunners for 3D-IC manufacturing technology," according to Hermann Waltl, executive sales and customer support director at EV Group.  "High-density TSV arrays, sub-micron-diameter TSVs and ultra-thin wafers have all been successfully transferred into high-volume image sensor manufacturing.  Now that adoption of wafer-to-wafer 3D stacking for image sensors is well underway, we expect to see 3D-integration follow very soon for other devices such as stacked memory."

Media and analysts interested in learning more about EVG’s latest developments in wafer bonding and other processing solutions are invited to visit the company’s booth #819 in the South Hall of the Moscone Convention Center in San Francisco at the SEMICON West show this week, as well as attend the company’s presentations during the show’s technical program.  Markus Wimplinger, corporate technology development and IP director of EV Group, will present "High Resolution In-line Metrology Module for High-Volume Temporary Bonding Applications" at the SEMATECH Workshop on 3D Interconnect Metrology on Wednesday, July 10 from 11:20 – 11:40 a.m. at the San Francisco Marriott Marquis.  In addition, Dr. Thorsten Matthias, business development director at EV Group, will present "From Sensor Fusion to System Fusion" at the TechXPOT session "MEMS and Sensor Packaging for the Internet of Things" on Thursday, July 11 from 12:10 – 12:30 p.m. in the Moscone North Hall.

Following last week’s formal announcement from Governor Cuomo of the formation of the Facility 450 Consortium (F450C), ten leading nanoelectronics facility companies from around the world will collaborate at CNSE to lead the global effort to design and build the next-generation 450mm computer chip fabrication facilities. At the semiconductor industry’s annual SEMICON West tradeshow, taking place at the Moscone Center in San Francisco, CA on July 9-11, the F450C will host its first public panel discussion about facility and infrastructure solutions for the transition to 450mm wafer fabrication.

Who: Members of the Facility 450 Consortium (F450C)

What: Panel entitled: The 450mm Facility; F450C’s Parallel Pathway

When: 4-5 pm on Tuesday, July 9

Where: The Impress Lounge, located at the B Bar above Moscone’s North

Why: Beyond the manufacturing hurdles that 450mm wafer processing brings, next generation fabs present new challenges with respect to the design of the facilities, substrate handling, tool connection, chemical distribution, water and electrical systems and many other areas. Where the G450C provides leadership in the area of 450mm equipment and process technologies, the goal of the F450C is to develop facility and infrastructure solutions essential to the transition to 450mm wafer fabrication.

On the Agenda:

  • Allen Ware, M+W Group & F450C: An Introduction to the F450C
  • William Corbin, G450C: Design to Requirement at the Utility Level
  • Adrienne Pierce, Edwards Vacuum: The ŒGreen Pump Strategy
  • Lothar Till, Ovivo: Water Use at 450mm

To register for the event please RSVP to [email protected]

The Facilities 450mm Consortium (F450C) is a first-of-its-kind partnership at SUNY’s College of Nanoscale Science and Engineering (CNSE) that is leading the global effort to design and build next-generation 450mm computer chip fabrication facilities. The collaboration includes 10 of the world¹s leading nanoelectronics facility companies, including Air Liquide, CH2M HILL, CS Clean Systems, Ceres Technologies, Edwards, Haws Corporation, Mega Fluid Systems, M+W Group, Ovivo, and Swagelok. Members of F450C are working closely with the Global 450mm Consortium (G450C), as announced by New York Governor Andrew M. Cuomo, to identify viable solutions required for 450mm high-volume facility construction, with initial focus areas to include reducing tool installation cost and duration, and improving facility sustainability.

CEA-Leti announced today €1 million in funding from bpifrance to accelerate preclinical development of a liver-cancer detection system called LipImage 815.

The grant, awarded through bpifrance ’s Strategic Industrial Innovation (ISI) program, will accelerate the development of LipImage 815, including production and regulatory toxicity evaluation. It also supports the launch of NICE (Nano Innovation for Cancer), the first consortium of nanomedicine stakeholders in France focused on aspects of characterization and industrialization. The consortium has been accredited by the Medicen Paris Region, a competitive cluster for innovative therapies in Ile-de-France.

Developed by Leti, LipImage 815 is a fluorescent imaging agent based on Leti’s Lipidots platform that uses lipid nanoparticles to carry a fluorescent substance to targeted cells and improve the effectiveness of diagnosis. It will be used to test for early stages of liver cancer.

Consisting of five public and private partners and led by BioAlliance Pharma, the NICE consortium includes partners with deep expertise in the field of nanomedicine. Its mission is to build a platform to accelerate the development and industrialization of nanomedicine in France by capitalizing on the strong and complementary expertise of each partner.

In addition to Leti, the consortium includes:

  • BioAlliance Pharma, developer of Livatag, a doxorubicin nanoparticle currently in phase III clinical trial for treatment of primary liver cancer
  • Nanobiotix, developer of NBTXR3, a potentiator of radiation therapy in the local treatment of cancer
  • DBI, a company specialized in the production of nanomedicine pharmaceutical products
  • Institut Galien Paris Sud (University Paris Sud/CNRS), which has an academic-excellence team specialized in nanoparticles research

“By bringing together a highly experienced team of specialists in various fields of nanomedicine, this program can significantly accelerate the development of an effective new tool for diagnosing liver cancer,” said Laurent Malier, Leti CEO. “It also leverages Leti’s achievements in the Lipidots platform, and provides another avenue for us to bring our innovations to market.”

The Strategic Industrial Innovation program promotes the emergence of European champions.  It supports ambitious, innovative collaborative projects through to industrialization, driven by innovative medium-sized companies (less than 5000 employees) and small businesses (less than 250 employees).  These highly promising projects are aimed at the commercialization of products which result from technological breakthroughs and which not be possible without fostering measures from the public sector.  Funding is generally in the €3-10 million range, as grants-in aid and loans which are repayable if the project is a success.

Leti is an institute of CEA, a French research-and-technology organization with activities in energy, IT, healthcare, defence and security. Leti is focused on creating value and innovation through technology transfer to its industrial partners. It is specialized in nanotechnologies and their applications, from wireless devices and systems, to biology, healthcare and NEMS and MEMS photonics. are at the core of its activities. An anchor of the MINATEC campus, CEA-Leti operates 8,000-m² of state-of-the-art clean room space on 200mm and 300mm wafer platforms. It employs 1,700 scientists and engineers including 320 Ph.D. students and 200 assignees from partner companies. CEA-Leti owns more than 2,200 patent families.

 

BOE Technology Group announced that it has placed significant orders for advanced Gen 8.5 and Gen 5.5 display production equipment from Applied Materials for use in multiple facilities. BOE selected these systems because of their ability to produce faster, smaller thin film transistors for the next era of high definition televisions and high pixel density displays for future mobile devices. Applied Materials is providing a full suite of advanced deposition equipment including the leading-edge Applied  PiVot PVD  and PECVD systems, which are capable of supporting critical new technologies such as metal oxide and LTPS.

"BOE continues to execute on its manufacturing capacity and technology initiatives and appreciates the strong cooperative relationship with Applied Materials in developing and creating value in support of the world’s largest TV and mobile display market," said Mr. Liu Xiaodong, executive vice president, chief operation officer of BOE. "Over the past year we have achieved key high-volume Gen 8.5 production and yield milestones, which demonstrate our leadership in growing this strategic industry in China. We are pleased to work with Applied Materials to implement the new technologies needed to continue meeting the high quality, high performance screens consumers have come to expect and demand."

"Applied Materials is delighted to play an important role in BOE’s growth strategy and is committed to providing the leading-edge technologies to enable its continued success," said Ali Salehpour, group vice president, general manager, Applied Materials Energy and Environmental Solutions and Display Business Group. "There is a major shift taking place in the display industry toward adopting new materials, and BOE selecting Applied Materials equipment validates the technology differentiation and productivity gains we provide to our customers. Together, BOE and Applied are enabling consumers to experience displays with world-class color, clarity and brightness."

The Applied PiVot PVD and PECVD systems selected by BOE provide a high-performance, cost-effective path to manufacturing stunning high resolution amorphous silicon, metal oxide and LTPS displays.  These systems can significantly increase production and achieve the same economies of scale that enabled the cost of LCD TVs to fall by more than 95 percent over the past decade and brought large-area LCD televisions within the reach of billions of consumers around the globe.

Applied Materials, Inc. provides equipment, services and software to enable the manufacture of advanced semiconductor, flat panel display and solar photovoltaic products. Our technologies help make innovations like smartphones, flat screen TVs and solar panels more affordable and accessible to consumers and businesses around the world.

SEMI today announced that Ajit Manocha, CEO of GLOBALFOUNDRIES, has been selected to receive the “SEMI Outstanding EHS Achievement Award — Inspired by Akira Inoue.” The Environment, Health and Safety (EHS) Award is sponsored by SEMI and will be presented on July 9 at 9:00am during the SEMICON West 2013 Opening Keynote and Ceremonies in San Francisco.

“We are pleased to present this award to Ajit Manocha for his outstanding contribution and commitment to EHS issues," said Denny McGuirk, president and CEO of SEMI.  “Ajit joins a distinguished group of semiconductor executives who have been honored by our industry for notable EHS achievement and leadership.”

“Excellence in Environment, Health and Safety is not only a mandate that we set for ourselves, but a fundamental expectation of our customers and the communities where we operate,” Manocha said. “Corporate responsibility is fundamental to our culture and our value proposition to our customers, the communities in which we live and do business, and our full range of global stakeholders.”

Manocha heads GLOBALFOUNDRIES Executive Stewards Council (ESC), the leadership forum for strategic direction and accountability for risk management, corporate responsibility and sustainability.  Manocha’s leadership has resulted in significant EHS achievements at GLOBALFOUNDRIES. Those cited by the Award committee in the selection of Manocha include:

  • Zero-Incident Safety Culture — GLOBALFOUNDRIES safety goal is to continually reduce all injuries and Manocha continually challenged the EHS and project management teams to achieve zero incidents. For example, Manocha ensured that there was a strong focus on safety metrics in the executive project reviews of the new Fab 8 in Malta, New York. GLOBALFOUNDRIES’ Singapore Fabs all received “Silver Awards” for Health and Safety presented by the Workplace Safety and Health Council and supported by the Singapore Ministry of Manpower.
  • Commitment to Eco-Efficiency in Foundry Operations — In 2012, GLOBALFOUNDRIES set corporate environmental goals to reduce GHG emissions 40 percent by 2015, electricity consumption 35 percent by 2015 and water consumption 10 percent by 2015, all normalized to a manufacturing index and compared to 2010.  Fab 8 incorporates multiple energy efficiency measures, waste heat recovery, and “idle mode” for abatement systems and vacuum pumps. Fab 1 in Dresden is powered by two energy-efficient tri-generation power plants that provide electricity, heating and cooling to fab operations, GLOBALFOUNDRIES’ Singapore utilizes reclaimed NEWater for incoming supply and achieved an energy reduction of 50 GWh in 2012, with a 2013 goal of a further 57 GWh reduction.
  • WSC Commitment to Best Practices for Perfluoro-Compound (PFC) Reduction — At the 2012 annual CEO meeting of the World Semiconductor Council (WSC), Manocha led the discussion of EHS topics, urging his fellow CEOs to take action to protect the environment, conserve resources, and achieve the WSC’s PFC reduction goal. GLOBALFOUNDRIES’ newest U.S. fab, Fab 8, meets the WSC Best Practice commitment for PFC emission reduction, and Fab 1 has incorporated best practices for PFC reduction since 1999.
  • WSC Commitment to a “Conflict-Free Supply Chain” — At the 2013 WSC meeting, Manocha  championed a “Conflict-free Supply Chain” policy to address concerns related to sourcing tantalum, tungsten, tin and gold from “conflict regions” of the Democratic Republic of Congo and adjoining countries. The WSC subsequently adopted such a policy. For its part, GLOBALFOUNDRIES has already met customer requests for “Tantalum Conflict-free” products in 2012.

In addition to receiving the EHS Award at SEMICON West, Manocha will deliver the Opening Keynote for the event on July 9 at 9:00am at Moscone Center (Esplanade Hall, Keynote Stage) in San Francisco, Calif.  For more information about SEMICON West — including registration and keynote attendance —   visit http://www.semiconwest.org.

The “Outstanding EHS Achievement Award — Inspired by Akira Inoue” is sponsored by the EHS Division of SEMI. The award is named after the late Akira Inoue, past president of Tokyo Electron Limited and a strong advocate of EHS. Inoue also served on the SEMI Board of Directors. The award recognizes individuals in industry and academia who have made significant contributions by exercising leadership or demonstrating innovation in the development of processes, products or materials that reduce EHS impacts during semiconductor manufacturing.

Past recipients of the SEMI EHS Akira Inoue Award include: Richard Templeton (president and CEO, Texas Instruments), Atsutoshi Nishida (president and CEO, Toshiba), Dr. Jong-Kap Kim (chairman and CEO, Hynix Semiconductor), Dr. Morris Chang (chairman and CEO, TSMC) and other prominent industry leaders.

 

 

Since 2008, the majority of integrated circuit production has taken place on 300mm wafers.  In terms of surface area shipped (i.e., on a normalized 200mm-equivalent wafer basis), 300mm wafers represented 56 percent of worldwide installed capacity in December 2012.  Production using 300mm wafers is forecast to steadily increase and reach 70.4 percent in 2017, according to IC Insights’ Global Wafer Capacity 2013 report (see figure).

300mm wafers

For the most part, 300mm fabs are, and will continue to be, limited to production of high-volume, commodity-type devices like DRAMs and flash memories, and very recently image sensors and power management devices; complex logic and microcomponent ICs with large die sizes; and products manufactured by foundries, which can fill a 300mm fab by combining wafer orders from many sources.

The list of companies with the most 300mm wafer capacity includes DRAM and flash memory suppliers like Samsung, SK Hynix, Toshiba, Micron, Elpida, and Nanya; the industry’s biggest IC manufacturer and dominant MPU supplier Intel; and two of the world’s largest pure-play foundries TSMC and GlobalFoundries.  These companies offer the types of ICs that benefit most from using the largest wafer size available to best amortize the manufacturing cost per die.

It is interesting to point out that when (or if) the pending acquisition of Elpida by Micron goes through as expected, the merged company will have the industry’s second-largest share of 300mm wafer fabrication capacity, trailing only fellow memory chip manufacturer Samsung.

Meanwhile, the share of the industry’s monthly wafer capacity represented by 200mm wafers is expected to drop from 32 percent in December 2012 to 21 percent in December 2017, as seen in the figure. Fabs running 200mm wafers will continue to be profitable for many more years and be used to fabricate numerous types of ICs, such as specialty memories, image sensors, display drivers, microcontrollers, analog products, and MEMS-based devices.  Such devices are certainly practical in fully depreciated 200mm fabs that were formerly used in making devices now produced on 300mm wafers.

A significant trend with regard to the industry’s IC manufacturing base, and a perhaps worrisome one from the perspective of companies that supply equipment and materials to chip makers, is that as the industry moves IC fabrication onto larger wafers in bigger fabs, the group of IC manufacturers continues to shrink in number.  There are about 61 percent fewer companies that own and operate 300mm wafer fabs than 200mm fabs.  The distribution of worldwide 300mm wafer capacity among those manufacturers is very top-heavy.  Essentially, there are only about 15 companies that comprise the entire future total available market (TAM) for leading-edge IC fabrication equipment and materials, according to the Global Wafer Capacity 2013 report.  When 450mm wafer fabrication technology comes into existence, this manufacturer group is predicted to shrink even further to a maximum of just 10 companies, and a few of those are questionable.  Despite growing momentum, IC Insights expects that 450mm wafer capacity will account for only one-tenth of a percent of global IC capacity in December 2017.

Europe’s recently launched industrial strategy to reinforce micro- and nanoelectronics manufacturing is more than just a vision — it’s a major opportunity for equipment and material suppliers to participate to large-scale investment projects, increase their holding in key technologies and reach out to new customers and markets. Implementation is already underway: the first EU funding calls for projects will start at the latest in early 2014 and discussions are already underway on investment priorities.  The recent launch of five EU projects, worth over €700 Million and bringing together over 120 partners, around 30 percent of which are small and medium enterprises, is proof that Europe can put its “money where its mouth is.” So what should you be doing to join the 10/100/20 momentum?

10/100/20 in a nutshell

Dubbed the ‘10/100/20’ strategy, the EU initiative will see €10 billion worth of EU co-funded projects (public/private investment), coupled with €100 Euros investment by the industry with the goal of 20 percent of global chip manufacturing by 2020. The aim is to focus on Europe’s strengths, pool together EU, national and regional resources and invest in specific areas that can give Europe a competitive edge globally. EU investment will cover the entire semiconductor manufacturing supply chain, from research to design and device makers. Maintaining leadership in equipment and material supply is clearly stated as an objective of the EU’s strategy, as is the integration of small and medium enterprises (SMEs) in value chains and providing them access to state-of-the-art technologies and R&D&I facilities.

Why get involved, especially as a SME

A number of companies, and small and medium enterprises in particular, may shy away from EU projects, perceiving them to be too complex to access and placing too much of an administrative burden for little financial gain. But the true value of EU projects lies in the new network you have access to: a variety of companies across the supply chain, many of who will become your new customers, and access to state-of-the-art research facilities and technologies. Take the example of the five pilot lines recently launched with combined funding from the EU, national governments and partner companies under the ENIAC program:

The European 450 Equipment Demo Line (E450EDL) will support the equipment and materials industry in the 450mm wafer size transition. 43 partners from 11 European countries will develop and test lithography, front end equipment, metrology tools and wafer handling and automation equipment. The partners include the large European research centers and equipment and device manufacturers, as well as smaller companies. The demo line will provide a world-class research infrastructure to validate tools that remain at the manufacturers’ sites, thus giving suppliers access to state-of-the-art facilities and an opportunity to share the knowledge and financial burden of testing their products. The Lab4MEMS project will create the first European pilot line for innovative technologies on advanced piezoelectric and magnetic materials, including 3D packaging, offers SMEs and fabless companies a manufacturing route for their future projects that has been difficult to access so far.

Interested? So what’s next?

Now is the time to decide on the technology trends that you want your company to follow and start reaching out to your partners and customers. If you think your technology could give Europe a competitive edge and should be part of Europe’s investment strategy, then start talking about it, show its benefits and convince people that this is the way to go. In the case of EU projects, there is strength in numbers, so start talking to your customers and your suppliers, look at what others are doing, and see how you can fit into the technology and investment trends.

The EU pledge of €10 billion worth of public/private co-financed projects will be spent gradually in the form of regular EU funding calls, the first of which is expected by end 2013. The call will set the overall requirements for project ideas: what technologies the project should focus on, what parts of the value chain should be partners to the project, the estimated overall budget and duration of the project as well as the technical details for applying for EU funding.  By the time the call has been published, you should already have an idea of what it is you want to do, who you want to work with and how you can fit your idea into the investment priorities that will be announced.

How to get connected

If you are visiting SEMICON West in San Francisco, then mark your calendar for Wednesday, July 10. At 16:00/4:00pm there will be a presentation of the new 10/100/20 strategy for Europe at the TechXpot in South Hall. Join us to find out more about the new strategy, why it’s important and how to get involved.

Your next major opportunity to meet with the equipment and materials industry, learn about the latest technologies and discuss the EU strategy is SEMICON Europa 2013 (8-10 October, Dresden, Germany).  Our programs will cover each of the major projects, including 450mm wafer processing, power electronics, MEMS, FDSOI as well as advanced packaging including 3D and TSV technologies.  They will in one way or the other all address Europe’s 10/100/20 strategy. The SEMICON Europa Executive Summit will discuss implementation of the strategy and we are also organizing an EU funding workshop with hands-on advice about how to identify funding opportunities for your company and join EU projects.

For more information on SEMICON Europa, please visit: www.semiconeuropa.org. The event in Dresden will again be co-located with Plastic Electronics Europe. The conference and exhibition is the leading international technology-to-industry and industry-to-industry event focused on organic and large area electronics. It is the premium forum in its kind where professionals in the area and from around the world meet to present and to discuss progress of topics. For more information, please visit: www.plastic-electronics.org.

 

Boosted by orders from unbranded, white-box Chinese manufacturers, global demand for tablet panels is exceeding expectations, spurring IHS to increase its forecast for displays by six percent for 2013.

A total of 262 million displays for tablets are forecast to be shipped in 2013, compared to the previous forecast of 246 million, according to the May Edition of the “LCD Industry Tracker—Tablet” report from information and analytics provider IHS. This will represent 69 percent growth from 155 million in 2012.

“Competitive dynamics in the tablet market have changed dramatically this year as Chinese white-box smartphone makers have entered the tablet market in droves,” said Ricky Park, senior manager for large-area displays at IHS. “These companies are producing massive quantities of low-end tablets that appeal to consumers in China and other developing economies. Because of this, the white-box manufacturers are driving up demand for tablet panels, particularly smaller displays using the older twisted nematic (TN) technology, rather than the newer screens using in-plane switching (IPS).”

Unbranded tablet makers purchased 40 percent of all tablet panels in April, up from just 17 percent in the first quarter of 2012.

Partly because of the rise of white-box makers, shipments of smaller 8- and 9-inch tablet displays will rise by nearly 200 percent in 2013. In contrast, larger displays in the 9-, 10- and 11-inch range will suffer a five percent decline.

The boom in white-box tablets is being driven the introduction of turnkey designs offered by processor makers. The designs make it easy for new, inexperienced market entrants to offer tablet products.

The Chinese white-box manufacturers hold certain advantages over the major incumbent tablet manufacturers. The white-box manufacturers are able to produce tablets at lower cost, more quickly and with greater flexibility in production. These companies also have the capability to manufacture both unbranded tablets, and make products for the major brands on a contract manufacturing basis.

Such white-box players also have been agile enough to take advantage of the current high availability and low-cost of tablet panels. Makers of displays for the shrinking PC market have switched over to the tablet market, spurring a glut that has depressed pricing. As prices have fallen, the white-box makers have demonstrated enough flexibility to boost production of low-cost tablets.

“Playing to their strengths, the white-box manufacturers are set to continue to increase their presence in tablets and propel the expansion of the overall tablet market,” Park said.

IHS believes the strong growth of tablet panel demand continued in the second quarter. The arrival of more turnkey tablet design solutions will drive up demand for 7- and 8-inch panels throughout the year.

The 8-inch panels are becoming an increasingly large segment of the tablet market, with a display area more appealing to users than the 7-inch size. In all, the 8-inch panels accounted for 11 percent of panel shipments in April, with Samsung and Acer having recently launched new tablets in that size. With more introductions likely coming in the third quarter, IHS expects a substantial market share for the 8-inch by the end of this year.

The market for larger-sized, 10-inch and bigger tablet panels may begin to enjoy a recovery in shipments with the launch of the new Intel Corp. Atom microprocessor, code-named Bay Trail. This new device could help reduce the cost of x86 microprocessor-based tablets and improve battery life. Bay Trail also could generate opportunities for hybrid-form tablets that include keyboards.

The x86 tablets, with Microsoft Corp.’s new Windows 8 operating system, would have functionality better suited to the needs of the commercial and business worlds than either the Google Android- or the Apple  iOS-based tablets, which are designed with the consumer in mind.

 

The future is bright for the future semiconductor and IT industry, according to Samsung exec Yoon Woo (Y.W.) Lee. In a keynote talk at The ConFab, Mr. Lee described a future with dramatic advances in almost every field, including healthcare, nano, energy and the environment, all powered by semiconductors. The end result:  a smarter, healthier and cleaner planet. Mr. Lee, who is widely credited with the success of Samsung’s semiconductor business, is now an Executive Advisor at Samsung Electronics Co., Ltd. He previously held positions at Vice Chairman and CEO, Chairman of the Board of Directors, and Chief Technology Officer at Samsung Electronics.

Mr. Lee noted two major trends in the world’s population: more people living in cities, and a greater number of elderly. “There will be 500 cities with over 1 million people by 2015,” Mr. Lee said. “Such a trend will stimulate the IT industry.” According to UN projections, more than 400 of these cities will be in developing countries. The number of "megacities" of 10 million people or more also will increase. Worldwide by 2015, 22 cities will be this big, all but five in developing countries. “Asia continues to grow into the largest economy in the world,” Lee said.

By 2020, most of the rich world will be a “super-aged” society, Lee added. A country can be described as an aging society when people aged sixty-five or above make up more than 7% of the total population (as in China). When the elderly make up more than 20% of the population, the country has a super-aging society.

“From a business perspective, bio and healthcare holds great potential,” Lee said. He also spoke on the importance of global sustainability, which he said will face strain. “There are finite reserves of oil. We must also address global warming which is behind extreme weather conditions.”

Lee said much of the remarkable progress in fields such as mobile computing and medicine has been possible due to the advancement of IT, and semiconductors in particular. “The industry strives for greater performance, lower power, and smaller form factor to enable this technology migration,” he said.

He noted that new innovations, such as nanowires and transistors with III-V channels, are being developed for 10nm chips, and said the use of new TSV technology “will raise transfer speed, function less power and reduce size.”

He also predicted that optical interconnects would soon be required. “Exascale computing will require optical interconnection to communicate between the CPU and memory chip,” he said.

He also gave a nod to MEMS devices, saying nanostructures would be used to switch mechanical energy such as background noise and wind into electric energy. “Our movement will be converted into electricity that charges most of our mobile device in the future,” he said.

As part of his presentation, Lee asked the audience to imagine what it would be like in the year 2025, when we will experience a smarter world, a healthier life and a cleaner planet. Among the advances expected:

  • A light field 3D camera that easily captures three dimensional information, color and depth data simultaneously from different viewpoints in order to generate an accurate real-life picture.
  • Tangible interaction technology that will enable the user to directly touch and freely manipulate three dimensional images in open space. One will be able to actually feel the shape, the temperature and even the texture of a real object.
  • Displays in the form of a contact lens. Augmented reality on such lenses will inform you of traffic and weather conditions.
  • With thermochromic materials, it will be easy to check what’s inside the fridge. When exposed to heat, these thermal sensitive molecules lose their alignment and by transmitting light more readily the material becomes semi-transparent.
  • A terahertz medical mirror that exploits terahertz antenna technology to enable real-time medical diagnosis, or remote treatment with nanotechnology allowing the system to be miniaturized for household or portable use.
  • Using intra-operative optical spectroscopic imaging, tissue can be analyzed without waiting for the pathology lab. By 2025, the aggregate medical data from patients worldwide will reach 6 zettabytes (1021 bytes), roughly equivalent to 6 quadrillion books. From the use huge volume of databases, we can find similar cases by analyzing the organ, physiological and molecular level data, using this “big data” to optimize medical diagnoses.
  • Clean and inexhaustible energy based on hydrogen, from sunlight and water will provide electricity and heat without releasing greenhouse gases.
  • Batteries will be entirely redesigned to utilize abundant and affordable substances such as magnesium or sodium, taking increasingly important roles in the future of large scale power storage.
  • Next generation microorganisms can biodegrade waste and transform these products into highly concentrated raw materials. This technology can also be used to inexpensively produce new plastic materials for many applications.

Lee concluded with a call for collaboration, which he said is critical in intra-regional trade and development. “Countries will need to lower risk and boost efficiency through closer cooperation along the supply chain, forging alliances, devising common standards, and undertaking joint R&D,” he said.