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Apple recently acquired Silicon Valley-based wireless chip developer Passif Semiconductor, though the terms of the acquisition have yet to be disclosed.

Apple spokeswoman Amy Bessette confirmed the deal, saying: “Apple buys smaller technology companies from time to time, and we generally do not discuss our purpose or plans.”

Passif was founded by Ben Cook and Axel Berny, two PhD students from the University of California, Berkeley. While Apple has not stated the purpose for the acquisition, many news outlets have speculated that the acquisition will fulfill its need for low-power chips. Passif is known for its low-power technologies and with more and more battery-draining features being packed into smartphones, utilizing technologies that will extend battery life is essential.

News of the acquistion was first reported by former Wall Street Journal reporter Jessica Lessin.

Micron Technology, Inc. and Elpida Memory, Inc. trustees announced today the closing of Micron’s acquisition of 100 percent of Elpida’s equity, pursuant to a Sponsor Agreement entered into on July 2, 2012 in connection with Elpida’s corporate reorganization. In a related transaction, Micron also announced today the completion of its acquisition of a 24 percent share of Rexchip Electronics Corporation from Powerchip Technology Corporation and certain of its affiliates. These transactions went into effect today.

Elpida’s assets include a 300mm DRAM fabrication facility located in Hiroshima, Japan; an approximate 65 percent ownership interest in Rexchip, whose assets include a 300mm DRAM fabrication facility located in Taiwan; and a 100 percent ownership interest in Akita Elpida Memory, Inc., whose assets include an assembly and test facility located in Akita, Japan. Together with the Rexchip shares acquired from Powerchip, Micron will control approximately 89 percent of Rexchip’s outstanding shares and 100 percent of Rexchip product supply. The manufacturing assets of Elpida and Rexchip together can produce more than 185,000 300mm wafers per month, which represents an approximate 45 percent increase in Micron’s current manufacturing capacity.

Using its advanced technologies, Elpida has built a strong presence in mobile DRAM, targeting mobile phones and tablets. Micron is a leader in delivering enterprise DRAM solutions for networking and servers as well as offering a wide product portfolio in NAND flash memory and NOR. Combining the two complementary product portfolios will further strengthen Micron’s position in the memory market and enable it to provide customers with an even more complete set of high-quality solutions.

“We are pleased to bring together Elpida with Micron to form the industry’s leading pure-play memory company. This combination will result in enhanced R&D and manufacturing scale, significant cost and production synergies and a stronger memory product portfolio to provide solutions to our customers,” said Micron CEO Mark Durcan.

Yukio Sakamoto, CEO, president and co-trustee of Elpida, said, “This transaction is a strong testament to the value of Elpida’s technologies, products and people, and it will result in a combined organization that can best serve customers with broader memory solutions, strength and scale.”

Effective with the closing, Mr. Sakamoto announced his resignation from Elpida. Micron and Elpida announced that Yoshitaka Kinoshita will replace Mr. Sakamoto as the president, representative director and business trustee of Elpida and become the president of Micron Japan.

“I want to personally thank Sakamoto-san for his strong leadership of Elpida and for his efforts in helping bring Elpida and Micron together. I look forward to working with Kinoshita-san as we seek to strengthen our combined teams,” said Durcan.

 

Zvi Or-Bach, President & CEO of MonolithIC 3D Inc. blogs about the appearance of 3D integration on several roadmaps.

At the recent CEA Leti day, that took place as part of Semicon West2013, Laurent Malier, Leti CEO, presented his “A look at the coming Decade.” Slide 15 of the presentation provides Leti’s vision for CMOS roadmap:

Monolithic 3D is presented on Leti’s roadmap as the technology to follow the 7nm process node.

Early this year we blogged IEDM 2012: The pivotal point for monolithic 3D ICs. It is now quite reassuring to see monolithic 3D now as part of the industry roadmap. We discussed then that memory vendors are already gearing up for volume production of the 3D NAND. And, indeed, just this summer, Toshiba has been reported to leverage the monolithic 3D cost reduction advantage (Toshiba to Build Fab for 3D NAND Flash). It only makes senses for the CMOS market to follow.

Doubters would ask why the industry would introduce a new dimension to the roadmap that has been extremely successful for over 40 years. The answer is very simple – because it is not so successful anymore. We are all aware that the escalating costs of lithography had diminished transistors cost reduction, as is illustrated in the following ASML chart:

Even if we ignore the cost issues we should remember IBM’s Bernie Meyerson caution that “atoms don’t scale.” We are quickly approaching these limit as is visible on the following Intel chart:

Accordingly, Mike Mayberry, director of component research at Intel, said at the recent IMEC Technology Forum that he“has looked down the highway of conventional silicon development and reckons things become foggy beyond about the 7-nm node.” In fact, in his March 2013 presentation “Pushing Past the frontiers of Technology” Mike Mayberry also presents monolithic 3D on his road map:

This transition was well captured in the title of 2011 IEDM keynote address by Mark Bohr, the Senior Fellow of Technology and Manufacturing Group and a Director of Process Architecture and Integration of Intel, “The Evolution of Scaling from the Homogenous Era to the Heterogeneous Era.”

Cascade Microtech, Inc. and imec today announced breakthroughs in probing stacked integrated circuits (3D-SICs), fueling an important growth engine for the semiconductor market. Through a Joint Development Agreement, Cascade Microtech partnered with imec to successfully probe 25µm-diameter micro-bumps on a wide I/O test wafer with its fully-automated CM300 probe solution utilizing an advanced version of Pyramid Probe technology. This achievement comes as part of imec’s 3D integration research program which includes other industry partners from the entire semiconductor value chain.

The 3D semiconductor market (including 3D-SIC, 2.5D interposer, and 3D WLCSP) is expected to represent nine percent of the total semiconductor value by 2017, according to Yole Développement. Logic 3D SoC/SiP (including interposer chips, APE, CPU, FPGA, wide I/O memory, etc.) will be the biggest industry using 3D platforms in the next few years. 3D applications will emerge in high-performance computing, and electronic markets such as nanotechnology and medical applications, which will benefit from the high-density integration that 3D technology offers.

The semiconductor industry is exploring new methods to increase the functionality of ICs at a smaller footprint, extending Moore’s Law. 3D-SICs offer a solution to the speed, power and density requirements demanded by future mobile electronics platforms. Through-silicon vias (TSV) used in 3D-SICs shorten interconnects between logic elements, thus reducing power while increasing performance. Within imec’s 3D integration research program, industry leaders are jointly developing design, manufacturing, and test solutions to bring this new technology to high-volume manufacturing.

Cascade Microtech’s CM300 flexible on-wafer measurement system was designed to deliver superior positioning accuracy and repeatable contact, offering a level of precision that supports both shrinking pad sizes and pitch roadmaps. The CM300 captures the true electrical performance of devices with high-performance capabilities that include low leakage and low noise. As a comprehensive probing solution employing the latest advances in Pyramid Probe technology, the CM300 has proven to meet the fine-pitch (40 µm area array), low-force (< 1gf/tip) advanced probing requirements of 3D-SICs.

“We are excited that our work with Cascade Microtech has resulted in such a breakthrough. I believe together we’ve achieved a first in the industry,” said Erik Jan Marinissen, Principal Scientist at imec in Leuven, Belgium. “We are able to hit 25 µm-diameter micro-bumps with a high level of accuracy due to the probe-to-pad alignment features of Cascade Microtech’s CM300. And advances in their Pyramid Probe technology have enabled us to probe micro-bumped wafers with 40/50 µm pitch according to the JEDEC Wide-I/O Mobile DRAM standard.”

“Cascade Microtech’s CM300 probe solution is designed to provide greater alignment accuracy to probe directly on small, fragile micro-bumps. In conjunction with a fine-pitch, low-force Pyramid Probe card, we have achieved consistent, accurate measurements on a wide I/O test wafer using a single-channel, wide I/O probe core with an array of 6 x 50 tips at 40/50 µm pitch, with the ability to shrink down to 20 µm pitches in the future,” said Steve Harris, Executive Vice President, Engineering, Cascade Microtech. “Together, imec and Cascade Microtech are enabling the ongoing future of CMOS technologies through this ground-breaking work. 3D integration will undoubtedly result in increased performance and yield while reducing overall costs.”

 

Toshiba Corporation and Amkor Technology, Inc. today announced that the companies have completed Amkor’s acquisition of Toshiba Electronics Malaysia Sdn. Bhd., Toshiba’s semiconductor packaging operation in Malaysia. The transaction also includes Toshiba’s license to Amkor of related intellectual property rights and a manufacturing services agreement between Toshiba and Amkor.

Under the manufacturing services agreement, Toshiba has agreed to purchase and TEM has agreed to supply packaging and test services for certain discrete semiconductor products and analog LSI products.

Established in 1973, TEM has steadily expanded the scale of its packaging operations, primarily of discrete and analog semiconductors. In recent years, its main product has been power semiconductors.

Toshiba positions power semiconductors as a driver of growth for its semiconductor business and seeks to maximize cost competitiveness across its front- and back-end operations. Transferring ownership of TEM to the Amkor group will allow TEM to take full advantage of Amkor’s large scale production and materials procurement capabilities and boost the overall efficiency of its power semiconductor operations.

Toshiba will continue to subcontract power semiconductor packaging and test to Amkor as an important source of key products. As it does so, Toshiba will shift its focus and resources to front-end wafer fabrication for power semiconductors by reinforcing production capabilities at Kaga Toshiba Electronics Corporation, Toshiba Group’s discrete semiconductor production facility in Ishikawa Prefecture, Japan.

Amkor expects the transaction to further strengthen its relationship with Toshiba and to grow its semiconductor packaging and testing business. Amkor plans to leverage the technology and scale of this new factory to attract leading power discrete customers to Amkor.

This Blog was prepared by Israel Beinglass, CTO of MonolithIC 3D Inc.

Like every Semicon West show in the past, where many experts are brought together for showing the latest and greatest semiconductor manufacturing equipment and bringing numerous seminar/panel discussions, this Semicon West of 2013 was no different. Two major issues were discussed, which on the face of it look unrelated, that caught my attention:

Progress in 3D –TSV technology, and EUV.

Obviously these two issues are very different, but they are quite similar in respect to the following:

1. As the advanced node progresses to smaller and smaller feature size we are getting closer to the “end of the roadmap” or the “end of Moore’s law”.

Going to EUV does alleviate some of the problems related to the current solution of double patterning (or quadruple in the future assuming, EUV doesn’t come to fruition soon enough).

As well, utilizing 3D devices with TSV has, in the grand scheme, a similar outcome; namely, advancing the integration via 3D structures rather than continued scaling. Though in the future, 3D devices and advanced nodes could go hand in hand.

2. The big miss of the roadmap. When one looks at some old roadmaps from a few years ago, one can ask how did we, the industry, miss by so much?

This actually reminds me of another miss from a few years ago-the low k inter-metal dielectric. Fig. 1 shows the low k dielectric roadmap trend of various ITRS published roadmaps and the prediction in 1999 that by 2004 we would be using k<2 !! Obviously we know what happened and even today 14 years later it is hard to breakthrough a k value of 2.5.

Figure 1: low k Dielectric roadmap

Figures 2 and 3 show the roadmap for EUV and TSV, respectively. Both are of 2009 vintage. In each case the prediction of the roadmap vs. actual is startling.

Figure 2: EUV roadmap

Figure 3: TSV roadmap

It is not the purpose of this blog to go over the reasons why the roadmaps of EUV and TSV missed the time table by miles, nor to blame anybody for it. There are many articles and discussions published on the subjects. Rather, I will touch on some of the highlights as well as try to make some conclusions regarding the pathway of the industry regarding these two important technologies.

EUV The EUV technology has so far gone through monumental achievements vis-à-vis the incredible tasks of developing the next generation stepper technology. The amount of engineering and resources poured into it is unprecedented in the short history of the semiconductor industry and maybe so for other industries.

It looks like as I write this blog that the only barrier for the technology from becoming a HVM tool is EUV source power that can provide a high enough throughput. Many experts doubt that it could ever be achieved; however, there are many other experts saying that it is within a reach.

TSV In this case I could see two totally unrelated issues:1) technology driven obstacles, and 2) logistics and supply chain issues.

In the case of the TSV it is one of the few cases where the “power point” presentation(s) of the TSV idea are so convincing that it is actually hard to oppose it. However, when it comes to the fine details of the technology development, there are many issues that still need to be addressed and resolved. I believe that it is just a matter of time before the technical obstacles will be resolved and a unified standardized solution emerges. However, on the other hand, I see a real problem from the point of view of logistics, cost and supply chain of the technology, and I have some doubts if it can ever be resolved. For further discussion on this issue, please refer to: 3D IC Supply Chain: Still Under Construction, and to a detailed comment in EE Time published blog and comments re. Semicon West 3D –IC TSV, provided here below.

In summary, I believe that the industry will come with a solution for EUV before TSV becomes a production technology.

Yet there is another alternative to TSV and to EUV – it is the Monolithic 3D methods. Moreover, it is very likely that monolithic 3D will reach volume production before EUV and TSV, as we already see the  NAND Flash vendors ramping up for production of 3D NAND.

David DiPaola is managing director for DiPaola Consulting a company focused on engineering and management solutions for electromechanical systems, sensors and MEMS products.  A 17-year veteran of the field, he has brought many products from concept to production in high volume with outstanding quality.  His work in design and process development spans multiple industries including automotive, medical, industrial and consumer electronics.  He employs a problem solving based approach working side by side with customers from startups to multi-billion dollar companies.  David also serves as senior technical staff to The Richard Desich SMART Commercialization Center for Microsystems, is an authorized external researcher at The Center for Nanoscale Science and Technology at NIST and is a senior member of IEEE. Previously he has held engineering management and technical staff positions at Texas Instruments and Sensata Technologies, authored numerous technical papers, is a respected lecturer and holds 5 patents.  To learn more, please visit http://www.dceams.com.   

Product validation is an essential part of all successful MEMS new product developments.  It is the process of testing products under various environmental, mechanical or electrical conditions to simulate life in an accelerated manner.  Testing early and often needs to be a daily routine and not just a popular phase used in meetings.  This blog will cover proven methods to accurately perform MEMS product validation while mitigating potential issues resulting in repeated tests and non accurate results. 

Measurement system analysis or MSA is a methodology to qualify the measurement system that will be used to characterize the product.  In the context of MEMS, this could be a function test system for characterizing the performance of a MEMS pressure sensor by applying known pressures / temperatures and measuring sensor output.  The first step of MSA is to calculate total system accuracy determined by a tolerance stack of subcomponent errors traceable to NIST reference standards.  This will ensure your test system has the accuracy needed to properly characterize the samples.  In addition, system linearity of the true and measured value with minimal bias change and stability of the measurement system over time should be demonstrated.  Lastly, a Gage R&R (using average and range or ANOVA methods) in percent of process variation (not tolerance) should be completed to demonstrate repeatability and reproducibility for each test system utilized.  An excellent reference for MSA is aiag.org, Measurement System Analysis.   

Verification of the test system setup and function of the equipment is an important step prior to the start of validation.  Often times, improper test set up or malfunctioning equipment results in repeated tests and delayed production launches.  This is easily avoidable by documenting proper system setup and reviewing the setup thoroughly (every parameter) prior to the start of the test.  Equally important, the engineer should verify the system outputs are on target using calibrated tools after the tools themselves are verified using a known good reference. 

We all like to believe that customer specifications are well thought out and based on extensive field and laboratory data.  Unfortunately, this is not always the case.  Hence it is prudent for engineers to challenge areas of the customers’ specifications that do not appear robust.  Neither the customer nor the supplier wins if the product meets the defined specification but fails in the field.  The pain of such events is pervasive and extremely costly for all parties.   As parts complete laboratory tests, take the added step of comparing the results to similar products in the field at the end of life and ensure similar degraded appearance.  When ever possible, test products to failure in the laboratory setting to learn as much as possible about failure mechanisms.  When testing to failure is not possible, perform the validation to 3 – 5X the customer specification to ensure proper margin exists mitigating the risk of field failures.  Furthermore, always take advantage of field tests even if limited in duration.  They can provide valuable information missed in a laboratory validation. 

As briefly stated earlier, a function test or product characterization is the process of applying known inputs such as pressure, force, temperature, humidity, acceleration, rotation, etc. (sometimes two or more simultaneously), measuring the output of the MEMS product and comparing it to the desired target.  This is completed to ensure the product is compliant with the stated performance specification from the manufacturer.  As product life is accelerated through the validation, the device function should be characterized multiple times during the test to understand product drift and approximate time of failures.  It is recommended to perform function tests three to eight times at periodic (equally spaced or skewed) intervals during the validation after the initial pretest characterization.  As an example, I often test products at intervals of 0, 25, 50, 75 and 100 percent of the validation. 

Use of test standards is highly encouraged as it brings both consistency and credibility to validations performed.  Several organizations develop test standards for general use such as ASTM, JEDEC, AEC, Military and more.   When a product is tested to standards widely excepted in the industry, the intended audience is more likely to accept the results than if a non-familiar possibly less stringent test method was applied.  Some commonly used standards include ASTM B117 (salt spray), JEDEC JESD22-A106B (thermal shock), Automotive Electronics Council AEC-Q100 (stress test for integrated circuits) and MIL-STD-883 (various environmental tests) just to mention a few.  A list of validation standards used across the MEMS industry can be found in the MEMS Industry Group Member Resource Library, Standards Currently in Use at MEMS Companies.

In the validation of MEMS products, it is tempting to perform the testing on units from one wafer that has yielded 1000 pieces.  However, this is a single window in time and does not properly reflect the true process variation that can occur.  A better sampling approach for validation is taking units from multiple wafers within a lot and across multiple wafer lots.  Equally important, differing raw material lots should be used (one example is the starting SOI wafers).  This will ensure supplier, equipment, process, operator and time sensitive factors are well understood.  

Controls are another method to learn valuable information about the products being validated and the equipment being used.  A basic control could be as simple as a product that is function tested at each stage of the test, but does not go through any of the validation (i.e. sits on a shelf at room temperature).  This will give an indication if something has gone wrong with your test system should the same errors be seen in both experimental (parts going through validation) and control groups.  Another use of a control is testing a product that has previously passed a given validation (control group) while simultaneously testing a product that has under gone a change or is entirely new (experimental group).  This will provide information on whether the change had any impact on the device performance or if the new device is as capable as a previous generation.          

Lastly validation checklists are a valuable tool to ensure each test is set up properly before the test begins.  Without the checklist, it is easy to over look a step in pursuit of starting the test on time to meet a customer’s schedule.  Below is a sample validation check lists for thermal shock.  This can be modified for other tests as well. 

Thermal Shock Validation Checklist

 

  • Perform proper preventative maintenance on the environmental chambers before the start of the test to prevent malfunction during the test
  • Identify appropriate control and experimental groups and ensure proper sampling from multiple wafers and lots
  • Document sample sizes
  • Identify a proper validation standard or customer specification to define the test
  • Document pass / fail criteria for the devices under test
  • Create a test log and record any time an event occurs (i.e. start of test, end of test, devices removed from thermal chamber for testing, etc.)
  • Verify calibration of measurement reference and trace it back to a national standard
  • Verify the measurement reference with appropriate simple test.  (i.e. thermal couple’s accuracy and repeatability with boiling water, room temperature, ice water and other known sources)
  • Measure the temperature of the hot and cold chambers with an accurate and verified reference prior to the start of the test (i.e. thermal couple ± 1°C)
  • Verify chamber temperature is consistent across the part loading
  • Verify the time it takes the thermal load to reach the desired temperature (i.e. -40°C) and that its within test guidelines
  • Measure the transition time between hot and cold chambers and verify its within test guidelines
  • Complete all necessary MSA on test equipment and document the results
  • Engrave serial number on each device (paint pen can be easily removed)
  • Document the location of devices in environmental chamber with digital photograph
  • Record serial number and manufacturer for environmental chambers used
  • Determine and document periodic intervals for device function test
  • Continuously monitor environmental chamber temperature for the duration of the test using an appropriate chart recorder
  • Document location of thermal couple (photo) and verify it is located close to parts
  • Monitor device output continuously during the test
  • Check on the environmental chamber daily to ensure no malfunctions have occurred and monitor daily cycle count
  • Create a test in process sign with appropriate contact information for support staff
  • This will likely prevent individuals from accidentally turning off the environmental chamber or changing temperature profiles without notifying you
  • Document any changes to this specification for future reference

Product validation is a critical tool to learn about MEMS performance over a laboratory based accelerated life.  Its an excellent method to validate theory and ensure product robustness in the field.  The due diligence presented in this blog will help engineers avoid seemly small mistakes that cause repeated tests, inaccurate results and missed customer deadlines. 

Semiconductor revenue worldwide will see improved growth this year of 6.9 percent and reaching $320 billion according to the mid-year 2013 update of the Semiconductor Applications Forecaster (SAF) from International Data Corporation (IDC). The SAF also forecasts that semiconductor revenues will grow 2.9 percent year over year in 2014 to $329 billion and log a compound annual growth rate (CAGR) of 4.2 percent from 2012-2017, reaching $366 billion in 2017.

Continued global macroeconomic uncertainty from a slowdown in China, Eurozone debt crisis and recession, Japan recession, and the U.S. sequester’s impact on corporate IT spending are factors that could affect global semiconductor demand this year. Mobile phones and tablets will drive a significant portion of the growth in the semiconductor market this year. The industry continued to see weakness in PC demand, but strong memory growth and higher average selling prices (ASPs) in DRAM and NAND will have a positive impact on the semiconductor market. For the first half of 2013, IDC believes semiconductor inventories decreased and have come into balance with demand, with growth to resume in the second half of the year.

"Semiconductors for smartphones will see healthy revenue growth as demand for increased speeds and additional features continue to drive high-end smartphone demand in developed countries and low-cost smartphones in developing countries. Lower cost smartphones in developing countries will make up an increasing portion of the mix and moderate future mobile wireless communication semiconductor growth. PC semiconductor demand will remain weak for 2013 as the market continues to be affected by the worldwide macroeconomic environment and the encroachment of tablets," said Nina Turner, Research Manager for semiconductors at IDC.

According to Abhi Dugar, research manager for semiconductors, embedded system solutions, and associated software in the cloud, mobile, and security infrastructure markets, "Communications infrastructure across enterprise, data centers, and service provider networks will experience a significant upgrade over the next five years to support the enormous growth in the amount of data and information that must be managed more efficiently, intelligently, and securely. This growth is being driven by continued adoption of rich media capable mobile devices, movement of increasingly virtualized server workloads within and between datacenters, and the emergence of new networking paradigms such as software defined networking (SDN) to support the new requirements."

Regionally, Japan will be the weakest region for 2013, but IDC forecasts an improvement over the contraction in 2012. Growth rates in all regions will improve for 2013 over 2012, as demand for smartphones and tablets remain strong and automotive electronics and semiconductors for the industrial market segment improve in 2013.

Light and proximity sensors in mobile handsets and tablets are set for expansive double-digit growth within a five-year period, thanks to increasing usage by electronic giants Samsung and Apple. Light and proximity sensors can detect a user’s presence as well as help optimize display brightness and color rendering.

Revenue for the sensors is forecast to reach $782.2 million this year, up a prominent 41 percent from $555.1 million in 2012, according to insights from the MEMS and Sensors Service at information and analytics provider IHS. The market is also expected to grow in the double digits for the next three years before moderating to a still-robust eight percent in 2017. By then, revenue will reach $1.3 billion, as shown in the figure below.

“The continued growth of the smartphone and tablet markets serve as the foundation of a bright future for light sensors,” said Marwan Boustany, senior analyst for MEMS & sensors at IHS. “Market leaders in these areas are driving the growth, with Apple pioneering their adoption and Samsung later taking the lead in their usage.”

Sensor segments

There are three types of light and proximity sensors: ambient light sensors (ALS) that measure the intensity of the surrounding light enveloping a cellphone or tablet to adjust screen brightness and save battery power; RGB sensors that measure a room’s color temperature via the red, green and blue wavelengths of light to help correct white balance in the device display; and proximity sensors that disable a handset’s touch screen when it is held close to the head, in order to avoid unwanted input, and also to turn off the light in the display to save battery power.

Overall, the compound annual growth rate for the sensors from 2012 to 2017 equates to 19 percent.

Driving this growth is the shift in use from ALS to RGB in mid- to high-end smartphones; the growing deployment of proximity sensors with gesture capabilities compared to just simple proximity sensors; and the price premiums associated with such changes in usage.

Aside from their most conspicuous use in wireless communications typified by handsets and tablets, light sensors are also utilized in various other applications. These include consumer electronics and data processing for devices like televisions, laptops and PC tablets; the industrial market for home automation, medical electronics and general lighting; and the automotive space for vehicle displays and car functionalities like rain sensors.

Samsung and Apple are leaders in sensor use

Both Samsung and Apple have made use of light and proximity sensors in recent years, helping the sensor market grow in no small measure.

In 2010, Apple included an RGB and proximity sensor for its iPhone 4 and an RGB sensor in its iPad, even though the sensors were subsequently dropped in the iPhone 4S, iPhone 5 and later iPads. Apple let go of the sensors, which were made available at that time in a combination—or combo package—in favor of discrete solutions consisting of individual proximity as well as ALS sensors for its products. While combo sensors offer the convenience of a single configured package and sourcing from a single supplier, discrete solutions can offer flexibility in the choice of sensor.

Samsung, meanwhile, has gone on to use light and proximity sensors in even larger quantities than Apple. Last year Samsung included an RGB, proximity and infrared (IR) combo sensor, for both its Galaxy SIII smartphone and flagship Galaxy Note 2 device that the company termed as a “phablet.” This year, Samsung deployed a discrete RGB sensor in its latest smartphone, the Galaxy S4, switching from a combo package due to lack of availability of a combo sensor with gesture capability. Samsung’s move toward using RGB sensors in its high-end handsets currently sets the tone for the RGB sensor market given Samsung’s high unit sales. Such a move by the South Korean maker is expected to open the door for other brands to also include RGB sensors in their handsets and tablets, IHS believes.

The new gesture functionality, such as that found in the Galaxy S4, will see especially vigorous growth in the years to come, with revenue enjoying an astonishing 44 percent compound annual growth rate from 2013 to 2017. Maxim Integrated Solutions of California provides the discrete gesture solution for the Galaxy S4, but Japan’s Sharp will be producing a combo sensor product with gesture capabilities by September this year.

Sensor suppliers and buyers tussle

Samsung and Apple are the top buyers of light sensors, accounting for more than 50 percent of light sensor revenue last year. Samsung pulled away from Apple after impressive 90 percent growth in sensor purchases between 2011 and 2012, compared to Apple’s 54 percent growth rate of spend during the period.

This is due to Samsung’s shift toward RGB sensors in its Note 2 and SIII devices, which command higher average selling prices. In third place after Samsung and Apple is a collective group of original equipment manufacturers from China. Included here are global players with significant name recognition like Huawei Technologies, ZTE and Lenovo, as well as a multitude of lesser-known companies such as Coolpad and Xiaomi.

Meanwhile, the top sensor suppliers are Austrian-based ams via its Taos unit in Texas, which supplies to Apple; and Capella Microsystems from Taiwan, the top light sensor supplier to Samsung. Together the two manufacturers furnish more than half of the light sensor market. Other important sensor makers are Avago Technologies from California and Sharp from Japan.

CORRECTION: In a previous version of this article stated that Mike Splinter became president/CEO of Applied Materials in 2005. This is incorrect. Mike Splinter became president/CEO of Applied in 2003. The correction has been made to this article. Solid State Technology regrets the error.

Mike Splinter, chairman and chief executive officer of Applied Materials, was awarded the 2013 Robert N. Noyce Award, presented annually by the Semiconductor Industry Association, for outstanding achievement and leadership in support of the U.S. semiconductor industry. Splinter has been on the SEMI International Board of Directors since 2005.

The award is one of the industry’s highest honors and celebrates the memory of Robert Noyce, co-inventor of the integrated circuit and co-founder of Fairchild Semiconductor and Intel Corporation. The award will be presented at the annual SIA Award Dinner to be held on November 7, 2013.

"We applaud the SIA for recognizing Mike Splinter for his enormous contributions to the semiconductor industry,” said Denny McGuirk, president and CEO of SEMI.  “As the first recipient of the Robert N. Noyce Award from the SEMI Board of Directors, his selection underscores the critical contributions of equipment and materials suppliers to the continued health and progress of the semiconductor industry."

With a portfolio of more than 10,000 patents, Applied Materials is a key equipment and technologies supplier that helps build the advanced microchips and displays essential to today’s top-selling electronic devices. Mike Splinter was named president and chief executive officer of Applied Materials in 2003 and chairman of the board of directors in 2009. Splinter is a 40-year veteran of the semiconductor industry and has led Applied Materials to record revenue and profits during his tenure.

Prior to joining Applied Materials, Splinter was an executive at Intel Corporation where he held a number of positions in his 20 years at the company, including executive vice president and director of Sales and Marketing and executive vice president and general manager of the Technology and Manufacturing Group.

Splinter began his career at Rockwell International in the firm’s Electronics Research Center. During his tenure, he became manager of the company’s Semiconductor Fabrication Operations and was awarded two patents. Author of numerous papers and articles, Splinter earned both Bachelor of Science and Master of Science degrees in electrical engineering from the University of Wisconsin, Madison.