Category Archives: Energy Storage

The future is bright for the future semiconductor and IT industry, according to Samsung exec Yoon Woo (Y.W.) Lee. In a keynote talk at The ConFab, Mr. Lee described a future with dramatic advances in almost every field, including healthcare, nano, energy and the environment, all powered by semiconductors. The end result:  a smarter, healthier and cleaner planet. Mr. Lee, who is widely credited with the success of Samsung’s semiconductor business, is now an Executive Advisor at Samsung Electronics Co., Ltd. He previously held positions at Vice Chairman and CEO, Chairman of the Board of Directors, and Chief Technology Officer at Samsung Electronics.

Mr. Lee noted two major trends in the world’s population: more people living in cities, and a greater number of elderly. “There will be 500 cities with over 1 million people by 2015,” Mr. Lee said. “Such a trend will stimulate the IT industry.” According to UN projections, more than 400 of these cities will be in developing countries. The number of "megacities" of 10 million people or more also will increase. Worldwide by 2015, 22 cities will be this big, all but five in developing countries. “Asia continues to grow into the largest economy in the world,” Lee said.

By 2020, most of the rich world will be a “super-aged” society, Lee added. A country can be described as an aging society when people aged sixty-five or above make up more than 7% of the total population (as in China). When the elderly make up more than 20% of the population, the country has a super-aging society.

“From a business perspective, bio and healthcare holds great potential,” Lee said. He also spoke on the importance of global sustainability, which he said will face strain. “There are finite reserves of oil. We must also address global warming which is behind extreme weather conditions.”

Lee said much of the remarkable progress in fields such as mobile computing and medicine has been possible due to the advancement of IT, and semiconductors in particular. “The industry strives for greater performance, lower power, and smaller form factor to enable this technology migration,” he said.

He noted that new innovations, such as nanowires and transistors with III-V channels, are being developed for 10nm chips, and said the use of new TSV technology “will raise transfer speed, function less power and reduce size.”

He also predicted that optical interconnects would soon be required. “Exascale computing will require optical interconnection to communicate between the CPU and memory chip,” he said.

He also gave a nod to MEMS devices, saying nanostructures would be used to switch mechanical energy such as background noise and wind into electric energy. “Our movement will be converted into electricity that charges most of our mobile device in the future,” he said.

As part of his presentation, Lee asked the audience to imagine what it would be like in the year 2025, when we will experience a smarter world, a healthier life and a cleaner planet. Among the advances expected:

  • A light field 3D camera that easily captures three dimensional information, color and depth data simultaneously from different viewpoints in order to generate an accurate real-life picture.
  • Tangible interaction technology that will enable the user to directly touch and freely manipulate three dimensional images in open space. One will be able to actually feel the shape, the temperature and even the texture of a real object.
  • Displays in the form of a contact lens. Augmented reality on such lenses will inform you of traffic and weather conditions.
  • With thermochromic materials, it will be easy to check what’s inside the fridge. When exposed to heat, these thermal sensitive molecules lose their alignment and by transmitting light more readily the material becomes semi-transparent.
  • A terahertz medical mirror that exploits terahertz antenna technology to enable real-time medical diagnosis, or remote treatment with nanotechnology allowing the system to be miniaturized for household or portable use.
  • Using intra-operative optical spectroscopic imaging, tissue can be analyzed without waiting for the pathology lab. By 2025, the aggregate medical data from patients worldwide will reach 6 zettabytes (1021 bytes), roughly equivalent to 6 quadrillion books. From the use huge volume of databases, we can find similar cases by analyzing the organ, physiological and molecular level data, using this “big data” to optimize medical diagnoses.
  • Clean and inexhaustible energy based on hydrogen, from sunlight and water will provide electricity and heat without releasing greenhouse gases.
  • Batteries will be entirely redesigned to utilize abundant and affordable substances such as magnesium or sodium, taking increasingly important roles in the future of large scale power storage.
  • Next generation microorganisms can biodegrade waste and transform these products into highly concentrated raw materials. This technology can also be used to inexpensively produce new plastic materials for many applications.

Lee concluded with a call for collaboration, which he said is critical in intra-regional trade and development. “Countries will need to lower risk and boost efficiency through closer cooperation along the supply chain, forging alliances, devising common standards, and undertaking joint R&D,” he said.

The U.S. Photovoltaic Manufacturing Consortium (PVMC), an industry-led collaboration headquartered in New York at the SUNY College of Nanoscale Science and Engineering (CNSE), has partnered with the U.S. Department of Energy’s National Renewable Energy Laboratory (NREL) to improve manufacturing processes for thin film CIGS photovoltaic (PV)  cells and modules, including products, metrology and reliability that will support the U.S. solar industry in the development, manufacturing, and commercialization of next-generation solar PV systems.

“In support of Governor Andrew Cuomo’s innovative green energy strategy that is fueling New York’s emergence as a leader in the cleantech industry, PVMC is delighted to partner with NREL to help drive important advances in our nation’s solar future,” said Dr. Pradeep Haldar, PVMC Chief Operating and Technology Officer and CNSE Vice President of Clean Energy Programs. “Through this initiative, we look forward to enhancing the manufacturability of thin film solar PV technologies, which is critical to enabling increased usage in residential, commercial and utility applications across the country.”

“This unique partnership between NREL and PVMC will leverage national resources, accelerate commercialization of next generation solar products, and boost interactions between U.S. research labs and industry manufacturing initiatives,” said Joe Hudgins, senior VP of business development and strategic alliances, PVMC. “Together we are leading the national effort to help facilitate the transfer and commercialization of future solar products, equipment, and manufacturing lines including thin film, advanced silicon, and future materials.”

NREL is a renewable energy center, specializing in many fields of photovoltaic research, and has established processes, measurement and characterization capabilities, and expertise in all the major PV conversion technologies. PVMC will join NREL to support U.S. solar manufacturing by leveraging decades of knowledge and capabilities in materials and cell processing, advanced testing, metrology and materials analysis, and modeling. These interactions will accelerate PVMC program deliverables and help overcome the gaps and challenges necessary to build a strong U.S. solar industry.

Additionally, the NREL and PVMC collaboration effort will be expanded to other national labs to create a greater impact on the U.S. PV manufacturing industry. These national partnerships replicate the successful SEMATECH and CNSE models that have regained and sustained U.S. technology leadership in the semiconductor industry for several decades.

Spearheaded by CNSE and SEMATECH as part of the U.S. Department of Energy’s (DOE) SunShot Initiative, PVMC is targeting a reduction in the total installed cost of solar energy systems by 75 percent over the next decade. As an active participant in PVMC’s U.S. Thin-Films PV Roadmap, NREL is working with other roadmap members to provide a congruent plan for the national CIGS industry, including module and systems manufacturers, suppliers, and end-users, that will identify common challenges and define the areas of technical developments needed to sustain and advance a competitive U.S. photovoltaic industry.

Several initiatives are currently underway to enhance product and manufacturing development, some of which are likely to become industry standards in the future. Recently, SEMI and PVMC signed a Memorandum of Understanding (MOU) to enhance their cooperation in areas of standards and roadmap activities for the solar thin film industry.

The adsorption of ions in microporous materials governs the operation of technologies as diverse as water desalination, energy storage, sensing and mechanical actuation. Until now, however, researchers attempting to improve the performance of these technologies haven’t been able to directly and unambiguously identify how factors such as pore size, pore surface chemistry and electrolyte properties affect the concentration of ions in these materials as a function of the applied potential.

Georgia Tech researchers
Georgia Tech associate professor Gleb Yushin (left) and graduate research assistant Sofiane Boukhalfa examine experimental results from their study of the adsorption of ions. (Credit: Gary Meek)

To provide the needed information, researchers at the Georgia Institute of Technology and the Oak Ridge National Laboratory have demonstrated that a technique known as small angle neutron scattering (SANS) can be used to study the effects of ions moving into nanoscale pores. Believed to be the first application of the SANS technique for studying ion surface adsorption in-situ, details of the research were reported recently in the journal Angewandte Chemie International Edition.

Using conductive nanoporous carbon, the researchers conducted proof-of-concept experiments to measure changes in the adsorption of hydrogen ions in pores of different sizes within the same material due to variations in solvent properties and applied electrical potential. Systematic studies performed with such a technique could ultimately help identify the optimal pore size, surface chemistry and electrolyte solvent properties necessary for either maximizing or minimizing the adsorption of ions under varying conditions.

“We need to understand this system better so we can predict the kind of surface chemistry required and the kinds of solvents needed to control the levels of ion penetration and adsorption in pores of different sizes,” said Gleb Yushin, an associate professor in the Georgia Tech School of Materials Science and Engineering. “Understanding these processes better could lead to the development of improved energy storage, water purification and desalination systems. This new experimental methodology may also give us paths to better understand ion transport in biological systems and contribute to the development of improved drugs and artificial organs.”

Georgia Tech associate professor Gleb Yushin (left) and graduate research assistant Sofiane Boukhalfa assemble a test cell used to study the adsorption of ions. (Credit: Gary Meek)

The research was supported partially by the U.S. Army Research Office, the Georgia Institute of Technology and the Oak Ridge National Laboratory (ORNL).

“The advantage of neutron scattering is that it can be used to study real systems,” said Yushin. “You can study most electrode materials and electrolyte combinations as long as they have a high sensitivity for neutron scattering.”

Yushin and his collaborators – Georgia Tech graduate research assistant Sofiane Boukhalfa, and Oak Ridge scientists Yuri Melnichenko and Lilin He – conducted the research using ORNL’s High Flux Isotope Reactor, which produces a beam of high-energy neutrons. Their experimental setup allowed them to immerse activated carbon fabric samples – each sample containing pores of different sizes – in different electrolyte materials while varying the applied electrical potential.

By measuring how the neutron beam was scattered when it passed through the carbon fabric and electrolytes, the researchers could determine how the solvent, pore size and electrical potential affected the average ion concentration in the carbon material samples.

This schematic shows the experimental setup for in-situ studies of ion adsorption on the surface of microporous carbon electrodes. (Credit: Gleb Yushin)

“You can learn whether the ions get adsorbed into small pores or large pores by simply comparing the changes in the neutron scattering,” Yushin explained. “This experimental technique allows us to independently change the surface chemistry to see how that affects the ion concentrations, and we can use different solvents to observe how the interaction between electrolyte and pore walls affects the ion adsorption in pores of different sizes. We can further identify exactly where the ion adsorption takes place even when no potential is applied to an electrode.”

Earlier work in this area had not provided clear results.

“There have been multiple prior studies on the pore size effect, but different research groups worldwide have obtained contradictory results depending on the material selection and the model used to determine the specific surface area and pore size distribution in carbon electrodes,” Yushin said. “Neutron scattering should help us clarify existing controversies. We have already observed that depending on the solvent-pore wall interactions, either enhanced or reduced ion electro-adsorption may take place in sub-nanometer pores.”

In their experiments, the researchers used two different electrolytes: water containing sulfuric acid and deuterium oxide – also known as heavy water – which also contained sulfuric acid. The two were chosen for the proof-of-concept experiments, though a wide range of other hydrogen-containing electrolytes could also be used.

Now that the technique has been shown to work, Yushin would like to expand the experimentation to develop better fundamental understanding about the complex interactions of solvent, ions and pore walls under applied potential. That could allow development of a model that could guide the design of future systems that depend on ion transport and adsorption.

“Once you gain the fundamental knowledge from SANS experiments, predictive theoretical models could be developed that would guide the synthesis of the optimal structures for these applications,” he said. “Once you clearly understand the structure-property relationships, you can use materials science approaches to design and synthesize the optimal material with the desired properties.”

Information developed through the research could lead to improvements in supercapacitors and hybrid battery-capacitor devices for rapidly growing applications in hybrid electrical vehicles, energy efficient industrial equipment, smart grid-distributed energy storage, hybrid-electric and electrical ships, high-power energy storage for wind power and uninterruptible power supplies.

3-D integration with nanostructuresResearchers at North Carolina State University have developed a new type of nanoscale structure that resembles a “nano-shish-kebab,” consisting of multiple two-dimensional nanosheets that appear to be impaled upon a one-dimensional nanowire. However, the nanowire and nanosheets are actually a single, three-dimensional structure consisting of a seamless series of germanium sulfide (GeS) crystals. The structure holds promise for use in the creation of new, three-dimensional (3-D) technologies.

The researchers believe this is the first engineered nanomaterial to combine one-dimensional and two-dimensional structures in which all of the components have a shared crystalline structure.

Combining the nanowire and nanosheets into a single “heterostructure” creates a material with both a large surface area and the ability to transfer electric charges efficiently. The nanosheets provide a very large surface area, and the nanowire acts as a channel that can transmit charges between the nanosheets or from the nanosheets to another surface. This combination of features means it could be used to develop 3-D devices, such as next-generation sensors, photodetectors or solar cells. This 3-D structure could also be useful for developing new energy storage technologies, such as next-generation supercapacitors.

“We think this approach could also be used to create heterostructures like these using other materials whose molecules form similar crystalline layers, such as molybdenum sulfide (MoS2),” says Dr. Linyou Cao, an assistant professor of materials science and engineering at NC State and co-author of a paper on the research. “And, while germanium sulfide has excellent photonic properties, MoS2 holds more promise for electronic applications.”

The process, Cao says, is also attractive because “it is inexpensive and could be scaled up for industrial processes.”

To create the nano-shish-kebabs, the researchers begin by creating a GeS nanowire approximately 100 nanometers in width. The nanowire is then exposed to air, creating nucleation sites on the wire surface through weak oxidation. The nanowire is then exposed to GeS vapor, which forms into two-dimensional nanosheets at each of the nucleation sites.

“Our next step is to see if we can create these heterostructures in other materials, such as MoS2,” Cao says. “We think we can, but we need to prove it.”

The paper, Epitaxial Nanosheet–Nanowire Heterostructures, was published online Feb. 18 in Nano Letters. The lead author is Dr. Chun Li, a former postdoctoral researcher at NC State. Co-authors are Yifei Yu, a Ph.D. student at NC State; Cao; and Dr. Miaofang Chi of Oak Ridge National Laboratory. The research was supported by the U.S. Army Research Office.

StMicro fuel gauge for mobileSTMicroelectronics, a global semiconductor supplier, has unveiled its latest battery fuel-gauging device featuring patented innovations that improve long-term accuracy. This tiny chip, the STC3115, can be used in high-volume handheld electronics, and has already been selected by Samsung for some of its recent smartphones. Battery charge indicators — or fuel gauges — have become essential for managing devices such as smartphones, laptops or digital cameras. Accurate "time-remaining" predictions enhance the user’s experience, and can be critical in certain types of portable electronics such as medical devices. Even so, many of today’s fuel-gauging electronics are susceptible to errors caused by battery aging, reduced charging efficiency, leakage, variations in system power demand, and temperature effects.

To enhance fuel-gauging accuracy, ST has combined several important advances in its latest adaptive fuel-gauge IC, the STC3115. Until now, devices have used Coulomb counting to monitor energy entering and leaving the battery, and periodic voltage-mode state-of-charge measurements to adjust the Coulomb counter for accuracy. The STC3115 uses both sets of measurements continuously, with OptimGaug, an adaptive algorithm that tracks the state of charge and corrects the battery model.

The STC3115 further enhances accuracy by measuring true initial battery open-circuit voltage and preventing measurement disruptions when connecting the charger or launching an app. The charging inhibitor is a patented feature that significantly improves accuracy. Aging and temperature compensation are built in, and the voltage measurement accuracy is 0.25%.

Additional value-added features of the new IC include a low-power mode that reduces operating current to only 0.45µA while continuing to monitor the battery, and a 2µA standby mode. An Under-Voltage Lockout, or UVLO filter prevents short-term fluctuations in battery voltage from causing unwanted system resets. In addition, the STC3115 saves bill-of-materials costs by operating directly from the battery voltage without requiring its own voltage regulator.

Key features of STC3115 include the OptimGauge algorithm, which adjusts the battery charge/discharge model over the battery’s life; the industry-standard I2C connection to application processor; programmability with different battery profiles at manufacture; able to monitor batteries up to 4.5V; able to monitor multi-cell packs when used with TS941ILT low-power buffer; dedicated "battery-present" input, and dedicated alarm output, which activates if battery voltage falls below threshold level.

ISSCC 2013: Wireless trends

February 14, 2013

Data rates for modern wireless standards are increasing rapidly and this is evident from the trend of cellular standards (shown in Figure 1). The data rate has increased 100X over the last decade and another 10X is projected in the next five years. This trend is partly contributed by using more complex modulations (e.g. using OFDM – Orthogonal Frequency Division Multiplexing – for better spectral efficiency) at the cost of digital signal processing (DSP). In addition, the expansion of channel bandwidth is also an effective way to achieve the data rate increase. This is seen in the wireless connectivity chart (e.g. 802.11) shown in Figure 2. The channel bandwidths for the WLAN standards increase from the traditional 20MHz (802.11g) all the way to 2.16GHz (802.11ad). Because the available spectrum is limited in the low GHz range, for >1GHz channel bandwidth, the carrier frequency is moving from 2.4/5GHz (802.11a/b/g/n/ac) to 60GHz (802.11ad) in the mm-Wave range. With the available spectrum in the 60GHz range, data rates up to 6.76Gb/s can be achieved. Design at mm-Wave frequencies comes with significant challenges, with academic research oriented to the reduction of the power, while industry focuses on product-quality robustness and standards compliance. A new generation of chipsets, compliant with WiGig and 802.11ad, is ready for production.

Figure 1: Data rate trend of cellular standards

Since spectrum is scarce, new carrier aggregation techniques are being developed that can combine available channels in a flexible way, e.g. combining non-contiguous channels, or even channels at different frequency bands. The new 802.11af standard aims to utilize “TV white space”, unused legacy analog TV frequency bands below 1GHz. This will first be implemented using a database of available channels per geographical location, but eventually high-sensitivity spectrum sensing will be used to confirm the availability of the spectrum. The possibility of opening up this large amount of spectrum generates radio challenges, e.g. highly linear transceivers that can cover a very wide frequency range and various channel bandwidths. As a consequence of high-linearity and wideband design requirements, distortion cancellation and tunable RF channel-selection techniques are very critical. Most transceivers in this category are adopting digital calibration and analog-feedback techniques to increase the linearity performance for a flexible and tunable front-end to cover a wide range of frequencies.

As wireless technology becomes cheaper, it can be deployed in many devices, including sensors for monitoring environmental conditions. Wireless Sensor Networks (WSNs) require ultra-low-power radio to increase battery life and minimize the battery size, or better yet, eliminate the battery altogether by using energy harvesting. To reduce the power consumption of the radio, the first approach is to use the radio only when it is requested. A “wake-up radio” that monitors the channel and alerts the “main” radio when communication is requested becomes one of the main building blocks of the WSN node. Once the radio is awake, power efficiency becomes the main target for both high- and low-data-rate communication. Another approach is to duty-cycle the radio operation, i.e. only use the radio for short communication bursts, which requires fast turn-on techniques. Such WSNs will enable electronics for sustainability.

Similar to the evolution in cellular, ultra-low-power radios are now becoming multi-standard, covering for example Zigbee, BTLE, and IEEE 802.15.6. Multi-standard implementation implies radio-block sharing, and standards management, including modulation, frequency, bandwidth, power output, sensitivity …, while maintaining the low power consumption, which is one of the key success factors of such devices. Another main concern is the price. These multi-standard radios must have small silicon area circuits in low cost packaging. NFC (Near Field Communication) is becoming more and more popular. This new secure data wireless transmission mode is now embedded in smart phones and will become a de-facto requirement in the next years.

Digital architectures implementing radio functions are very efficient in deep-nm CMOS. In the past years Digital-PLLs were developed in the radio front-ends. Now, new digital approaches are being deployed in transmitters, targeting more flexibility of the RF front-end that leverages CMOS scaling for reduced power dissipation and area, simplifying integration in large SOCs, and empowering the next generation of wireless communications.

Figure 2: Data rate trend of wireless connectivity standards

This and other topics will be discussed at length at ISSCC 2013, the foremost global forum for new developments in the integrated-circuit industry. ISSCC, the International Solid-State Circuits Conference, will be held on February 17-21, 2013, at the San Francisco Marriott Marquis Hotel.

ISSCC 2013: Analog trends

February 14, 2013

Analog and digital integrated circuitsThe efficient control, storage, and distribution of energy are worldwide challenges, and are increasingly important areas of analog circuit research. While the manipulation and storage of information is efficiently performed digitally, the conversion and storage of energy must fundamentally be performed with analog systems. As a result, the key technologies for power management are predominantly analog. For example, there is much interest in wireless power transmission for battery charging applications, ranging from mobile handsets to medical implants, and increased efficiency in wireless power transmission is enabling faster charging over longer distances. There is also an explosion of technologies that permit energy to be collected from the environment via photovoltaic, piezoelectric, or thermoelectric transducers. A significant focus here is on analog circuits that are able to harvest sub-microwatt power levels from energy sources at 10’s of millivolts, to provide autonomy for remote sensors or to supplement conventional battery supplies in mobile devices. To achieve this, extremely low power must be consumed by the attendant analog circuits so that some energy is left over to charge a battery or super capacitor. Similarly, the power consumption of analog instrumentation amplifiers, oscillators, and audio power amplifiers is being scaled down to meet the demands of these low power systems. Fast power-up and -down is also desired from these circuits to permit high energy-efficiency during intermittent operation. Together, these technologies will permit devices to be powered indefinitely from sustainable sources, opening the door to ubiquitous sensing, environmental monitoring, and medical applications.

Analog circuits also serve as bridges between the digital world and the analog real world. Just like the bridges in our roads, analog circuits are often bottlenecks and their design is critical to overall performance, efficiency, and robustness. Nevertheless, digital circuits such as microprocessors drive the market; so semiconductor technology has been optimized relentlessly over the last 40 years to reduce the size, cost, and power consumption of digital circuits. Analog circuitry has proven increasingly difficult to implement using these modern IC technologies. For example, as the size of transistors has decreased, the range of analog voltages they can handle has decreased and the variation observed in their analog performance has increased.

These aspects of semiconductor technology explain two key divergent trends in analog circuits. One trend is to forgo the latest digital IC manufacturing technologies, instead fabricating analog circuits in older technologies, which may be augmented to accommodate the high voltages demanded by increasing markets in medical, automotive, industrial and high-efficiency lighting applications. Other applications dictate full integration of analog and digital circuits together in our most modern digital semiconductor technologies. For example, microprocessors with multiple cores can reduce their overall power consumption by dynamically scaling operating voltage and frequency in response to time-varying computational demands. For this purpose, DC-DC voltage converters can be embedded alongside the digital circuitry, driving research into the delivery of locally regulated power supplies with high efficiency and low die area, but without recourse to external components.

This and other related topics will be discussed at length at ISSCC 2013, the foremost global forum for new developments in the integrated-circuit industry. ISSCC, the International Solid State Circuits Conference, will be held on February 17-21, 2013, at the San Francisco Marriott Marquis Hotel.

MEMs in the medical fieldMicroelectromechanical (MEMS) devices are shaping the competitive landscape in the global medical device industry. Several factors are behind the increasing demand for and innovation in MEMS devices in the medical industry: growing number of MEMS applications in healthcare; innovations, revolution and growth in the personal healthcare market, including wireless implants; and rising awareness and affordability of healthcare.

Participants and would-be entrants must understand the medical MEMS device market in order to compete in it. Global Information (GII) highlights three major reports that present the key issues driving and constraining market growth, in addition to probable solutions that can address emerging concerns in the medical MEMS market. Report forecasts provide a quantitative assessment of the market for companies to benchmark their performance and plan for future high growth areas, while qualitative analyses provide both an overarching view and a detailed breakdown of the MEMS market.

MEMS Devices in Global Medical Markets

The use of MEMS devices by different stakeholders is driving market growth by adding to the demand of devices from different medical market segments as discussed above. This is also indirectly encouraging for medical sector market players (particularly big ones) that have diverse customer bases composed of different stakeholders and diverse product portfolios (such as diagnostics, research, and medical devices), as they can capitalize on the MEMS market by leveraging their existing resources to some extent. Moreover, a diverse set of devices catering to the needs of different stakeholders encourages new entrants into sectors of their choice to complement or suit their capabilities and potentials.

Integrated devices and advancements in inertial sensors, such as products for human motion analysis, are meeting the needs of the modernized healthcare delivery model, especially for the elderly patient sector, by adding the element of prevention. An example of product innovation is microneedles for drug delivery, which is gaining popularity by offering a pain-free and enhanced, accurate method of drug delivery. Similarly, the diagnostic devices have significantly reduced the sample testing time from hours to a few minutes, thus significantly adding value to the healthcare delivery model from different perspectives such as time efficiency, convenience, patient satisfaction, and ease of operations.

Microfluidic/lab on chip (LOC) is considered a revolutionary technology for the life sciences and healthcare industry. This technology enables the integration of assay operations, such as sample pretreatment and sample preparation, on a single chip. This is radically changing the pharmaceutical and life-sciences research sector by changing the way procedures, such as DNA analysis and proteomics, are conducted.

The microfluidic/lab on chip (LOC) segment is expected to rise to 72% of the market share of MEMS devices by 2017. Major growth drivers of this sector are research tools, which are expected to achieve significant growth of CAGR 28.8% from 2012 to 2017. A surge from 2012 to 2017 in research applications, such as proteomics, genomics, and cellular analysis, is also expected to boost this sector.

In terms of applications, the macro segments of the market include pharmaceutical and life-sciences research, in vitro diagnostics, home healthcare, and medical devices. Among all of these applications, research is expected to grow at the highest CAGR of 28.3% from 2012 to 2017.


Expected to triple in size over the next five years, the bioMEMS market is expected to grow from $1.9 billion in 2012 to $6.6 billion in 2018. Microsystem devices have applications in four key healthcare markets: pharmaceutical, in-vitro diagnostics, medical devices and medical home care. Microsystem devices have become increasingly visible in the healthcare market by serving as solutions adapted to the requirements of various applications. The usefulness of these devices is two-fold: they improve medical device performance for the patient; and secondly, they offer competitive advantages to system manufacturers. For example, the introduction of accelerometers in pacemakers has revolutionized the treatment of cardiac diseases.

BioMEMS devices examined in the report include: pressure sensors, silicon microphones, accelerometers, gyroscopes, optical MEMS and image sensors, microfluidic chips, microdispensers for drug delivery, flow meters, infrared temperature sensors, and emerging MEMS including RFID, strain sensors, and energy harvesting.

The Global MEMs Device, Equipment, and Materials Markets: Forecasts and Strategies for Vendors and Foundries

A significant portion of MEMS manufacturing technology has come from the IC industry. MEMS devices can be made using silicon wafers and the manufacturing process can incorporates semiconductor manufacturing processes such as sputtering, deposition, etching and lithography. This report analyzes the market for MEMS devices and the equipment and materials to make them.

This report provides forecasts for the following key MEMS device applications: ink jet head, pressure sensor, silicon microphone, accelerometer, gyroscope, MOEMS, Micro Display, Microfluidics, RF MEMS, Micro Fuel Cells, and more.

Demand for ubiquitous mobile functionality to achieve enhanced productivity, a better social-networking experience, and improved multimedia quality, continues to drive innovation in technologies that will deliver to these objectives in an energy and cost-efficient manner. While the performance of embedded processors has increased to meet the rising demands of general-purpose computations, dedicated multimedia accelerators provide dramatic improvements in performance and energy efficiency of specific applications. Energy harvesting is another area of growing importance, leading to technologies that leverage non-volatile logic-based SoC’s for applications that do not have a constant power source or handheld devices with very limited battery capacity.

Technology scaling continues to be exploited to deliver designs capable of operating at lower voltages, resulting in reduced energy per operation, as well as reducing the area required to implement specific functions. Processors unveiled at ISSCC 2013 are built on a variety of technology nodes, with best-in-class results accomplished along the axes of integration, performance/watt and functional integration, as well as a few industry-first implementations. These are demonstrated in various process nodes ranging from 0.13μm down to 28nm bulk, and SOI CMOS technologies.

Emerging medical applications require a significant reduction in the standby power over state-of-the-art commercial processors. This drives the exploration of new leakage-reduction techniques in both logic and on-chip memories, targeting orders of magnitude reduction in leakage currents. Fast wake-up time requirements drive the need for saving and restoring the processor state.

In the late 1990s, a GSM phone contained a simple RISC processor running at 26MHz, supporting a primitive user interface. After a steady increase in clock frequency to roughly 300 MHz in the early 2000s, there has been sudden spurt towards 1 GHz and beyond. Moreover, following trends in laptops and desktops, processor architectures have become much more advanced, and recent smart phones incorporate dual and even quad-core processors, running up to 2GHz frequencies. Battery capacity, mostly driven by the required form factor, as well as thermal limits imply a power budget of roughly 3W for a smartphone. From this budget, also the power amplifier (for cellular communication) and the displays have to be powered. The available power budget for everything digital is in the range of 2W (peak) to 1W (sustained). As a result, energy efficiency has become the main challenge in designing application processors, graphics processors, media processors (video, image, audio), and modems (cellular, WLAN, GPS, Bluetooth). For video and image processing, the trend has been towards dedicated, optimized hardware solutions. Some new areas where dedicated processors are particularly needed include gesture-based user interfaces, and computational imaging, to name a few. For all digital circuits, the limited power budget leads to more fine-grained clock gating, various forms of (adaptive) voltage-frequency scaling, a variety of body-bias schemes, and elaborate power management strategies.

Interestingly, cellular links, wireless LAN, as well as short links consistently show a 10× increase every five years, with no sign of abating. With essentially constant power and thermal budgets, energy efficiency has become a central theme in designing the digital circuits for the involved signal processing. Historically, CMOS feature sizes halve every five years. For a brief period in the 1990s, CMOS scaling (a.k.a. Dennard scaling) provided a 23 (α-3) increase in energy efficiency per five years, almost matching the required 10×. During the past decade; however, CMOS scaling offers a roughly 3× improvement in energy efficiency every five years. The resulting ever-widening gap has led to alternative approaches to improve energy efficiency, namely, new standards, smarter algorithms, more efficient digital signal processors, highly-optimized accelerators, smarter hardware-software partitioning, as well as the power management techniques mentioned above.

This and other related topics will be discussed at length at ISSCC 2013, the foremost global forum for new developments in the integrated-circuit industry. ISSCC, the International Solid-State Circuits Conference, will be held on February 17-21, 2013, at the San Francisco Marriott Marquis Hotel.

solid state thin film batteryVarious power factors have impacted the advancement and development of micro devices. Power density, cell weight, battery life and form factor all have proven significant and cumbersome when considered for micro applications. Markets for solid state thin-film batteries at $65.9 million in 2012 are anticipated to reach $5.95 billion by 2019, according to a new report released by Market growth is a result of the implementation of a connected world of sensors.

The report points out that development trends are pointing toward integration and miniaturization. Many technologies have progressed down the curve, but traditional batteries have not kept pace. The technology adoption of solid state batteries has implications to the chip grid. One key implication is a drive to integrate intelligent rechargeable energy storage into the chip grid. In order to achieve this requirement, a new product technology has been embraced: solid state rechargeable energy storage devices are far more useful than non-rechargeable devices.

Thin film battery market driving forces include creating business inflection by delivering technology that supports entirely new capabilities. Sensor networks are creating demand for thin film solid state devices. Vendors doubled revenue and almost tripled production volume from first quarter. Multiple customers are moving into production with innovative products after successful trials.

A solid state battery electrolyte is a solid, not porous liquid. The solid is denser than liquid, contributing to the higher energy density. Charging is complex. In an energy-harvesting application, where the discharge is only a little and then there is a trickle back up, the number of recharge cycles goes way up. The cycles increase by the inverse of the depth of discharge. Long shelf life is a benefit of being a solid state battery. The fact that the battery housing does not need to deal with gases and vapors as a part of the charging/discharging process is another advantage of the solid state thin film battery.

Traditional lithium-ion (Li-Ion) technology uses active materials, such as lithium cobalt-oxide or lithium iron phosphate, with particles that range in size between 5 and 20 micrometers. Nano-engineering improves many of the failings of present battery technology. Re-charging time and battery memory are important aspects of nano-structures. Researching battery micro- and nanostructure is a whole new approach that is only just beginning to be explored.

Industrial production of nano batteries requires production of the electrode coatings in large batches so that large numbers of cells can be produced from the same material. Manufacturers using nano materials in their chemistry had to develop unique mixing and handling technologies.

Cymbet millimeter scale solid state battery applications are evolving. In the case of the intra-ocular pressure monitor, it is desirable to place microelectronic systems in very small spaces. Advances in ultra-low power integrated circuits, MEMS sensors and solid state batteries are making these systems a reality. Miniature wireless sensors, data loggers and computers can be embedded in hundreds of applications and millions of locations.