September 19, 2012 – SPTS Technologies has introduced a low-temperature plasma-enhanced chemical vapor deposition (PECVD) system for via-reveal passivation in 3D IC packaging. The Delta fxP cluster system deposits dielectric layers onto bonded substrates at wafer temperatures below 200
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Overlay error is the offset in alignment between pattern at one step of a semiconductor process and pattern at the next step. Traditionally overlay error has referred to successive device layers, but in the case of double-patterning lithography, overlay error may stem from interwoven patterns at the same layer. Regardless, controlling overlay error is one of the most difficult issues that lithography engineers face in this era of shrinking design rules and complex, advanced lithography techniques. Because overlay error can affect yield, device performance and reliability, it must be measured precisely, and all sources of systematic overlay error must be discovered and addressed. These may include mask pattern placement error, deviations from wafer planarity, scanner nonlinearities and process variation.
In most cases, overlay error is measured optically by capturing an image of a specially designed alignment mark called an overlay target. Half of the overlay target is printed during the first process step, and the other half of it is printed during the second process step.
A standard overlay target is printed in two steps, indicated in red and blue, and structured to measure the errors in x and y.
An overlay metrology tool captures the image and quantifies the alignment between the first and second parts of the target. The result is reported as a vector quantity, having a magnitude and direction corresponding to the x and y offsets. The procedure is repeated for each of the overlay targets on the wafer. Overlay error maps are comprised of a circular field of tiny vectors, representing the overlay error across the wafer. These maps are used to adjust the scanner or to uncover issues with the mask pattern, the wafer shape or the process. Overlay error maps are also used to disposition wafers.
Flexible, robust multi-layer target allows simultaneous measurement of overlay error within the same layer and between layers.
A recent development in the area of overlay measurement is extension of measurement capability to new layers and new materials (see above). When overlay error between layers is measured, the optical properties of the top layer are critical to the quality of the data. The metrology tool needs to be able to send photons through the top layer to detect the pattern underneath, and the quality of the image of the buried pattern is critical to the quality of the overall measurement. Because semiconductor processes use a variety of materials, and the optical absorption of a given material generally varies with wavelength, the well-equipped metrology system can select from a variety of wavelengths to achieve sufficient image quality for the buried pattern to enable an accurate, repeatable measurement. The alternative—introducing an extra process step to etch a “window” in the top layer before patterning it—adds significant cycle time and may degrade the underlying pattern. Cycle time pressures are ever-present and well known. Furthermore, when the entire overlay error budget is limited to a small number of nanometers, lithographers cannot afford to allot a large portion of the budget to uncertainty in the output of the overlay metrology tool.
Examples of particularly challenging classes of materials are those used to build 3D transistors, and hard mask materials used during litho-etch-litho-etch lithography. Hard mask materials are opaque to visible light, and their optical properties may fluctuate with composition and even with annealing temperature. The latest overlay metrology systems can provide an appropriate wavelength that penetrates the top layer, making overlay metrology feasible without additional process steps.
Another new development in the field of overlay metrology is the use of multi-layer overlay targets. New target designs now allow a lithography engineer to measure within-layer overlay and between-layer overlay using one target. These innovative targets are small enough to be inserted into the die without consuming an unfeasible amount of valuable real estate. Their designs are flexible and robust, allowing adjustments for specific process and layer requirements. They are compatible with various pitch-splitting and double-patterning schemes. Most importantly, the new multi-layer targets allow lithographers to measure within- and between-layer overlay error with one image and, at the same time, reduce systematic errors that could degrade the measurement if separate targets had been used.
Overlay metrology remains one of the most challenging issues that lithographers currently face. Innovations in overlay metrology tool and target design must continue, to enable our industry to make smaller, faster, lower power, more affordable chips.
Rebecca Howland, Ph.D., is a senior director in the corporate group and Amir Widmann is a senior director in the Optical Metrology division at KLA-Tencor.
Check out other Process Watch articles: “The Dangerous Disappearing Defect,” “Skewing the Defect Pareto,” “Bigger and Better Wafers,” “Taming the Overlay Beast,” “A Clean, Well-Lighted Reticle,” “Breaking Parametric Correlation,” “Cycle Time’s Paradoxical Relationship to Yield,” and “The Gleam of Well-Polished Sapphire.”
September 17, 2012 – Shipments of tablets are booming, and that means demand for tablet displays is set to spike as well — and some new panel makers are getting in on the action, according to IHS iSuppli.
Shipments of tablet displays, including iPad’s 9-in. model and smaller 7.x-in. models from various brands, will soar 56% to 126.6 million units in 2012, according to the analysis firm. Of those, more than half (74.3, 35% Y/Y growth) will be for the 9.x-in. segment where the iPad rules supreme.
The second-largest tablet display segment, the 7.x-in. category, is taking up some share now (41.1M units, 98% Y/Y), accounting for nearly a third of total shipments vs. 26% a year ago, notes iSuppli. That’s because these smaller tablets will be launching with lower prices than the bigger ones: Samsung’s Galaxy Tab, Amazon’s Kindle Fire, Barnes & Noble’s Nook tablet, and others that use the Google Android operating system, explains Vinita Jakhanwal, director for small & medium displays at IHS. (And Apple is expected to come out with its own smaller display later this year.)
Tablet demand strongly follows seasonal trends, and thus shipments of tablet displays fell off in 1Q12 (-20% vs. 1Q12) as suppliers cleared out inventory. Shipments ramped back up in 2Q12 (27M units, 29% Q/Q) once those inventories cleared out, though, and panel orders started coming in for new launches planned in 2H12, iSuppli explains.
LG Display and Samsung Display were by far the top two suppliers of tablet displays in 1Q12 (42% and 38% marketshare, respectively). Both are top iPad suppliers; LG also makes displays for Amazon and B&N, while Samsung sources displays for its own internal tablet business. Both companies are making major investments to upgrade both technology and capacity for high-performance tablet panels, e.g. wide-viewing-angle capabilities such as in-plane switching and fringe-field switching — and both are looking to convert amorphous-silicon (a-Si) fabs to oxide silicon panels to help improve the technology’s resolution, power consumption, and performance.
Another angle in the surge of tablet displays is the arrival of other major LCD panel suppliers, particularly Japanese ones (Sharp, Japan Display, Panasonic) who are dedicating capacity at their Gen-6 and Gen-8 fabs to make room, iSuppli notes. Together they’ll be increasing capacity allocation for small/medium displays by 164% this year to 5.5 mw. Sharp in particular has its eye on oxide silicon capacity, as it’s been supplying panels for the new iPad from its G8 fab. Panasonic is likely to produce 7.x-in. and 8.x-in. tablet panels during 2H12, the firm adds.
Meanwhile, major Taiwanese display suppliers also are adjusting their business models, to go after business in the education sector and China’s white-box market, iSuppli notes. While AU Optronics is believed to be qualified as a supplier for the smaller (7.85-in) iPad, generally speaking Taiwanese panel suppliers primarily target the Chinese market that emphasizes lower-priced tablets — which means they must dial back the display specs, e.g. with more basic twisted nematic (LCD) and not the wide-viewing capabilities.
| Size | 2011 | 2012 |
| 5.x-in. | 0.9 | 0.3 |
| 7.x-in. | 20.8 | 41.1 |
| 8.x-in. | 5.2 | 10.9 |
| 9.x-in. | 55.2 | 74.3 |
| TOTAL | 82.1 | 126.6 |
Forecasted shipments of worldwide tablet panel displays
by size, in millions of units. (Source: IHS iSuppli)
September 14, 2012 – Now that the initial dust has settled after Apple’s debut of the new iPhone 5, industry watchers are taking a tally of which semiconductor suppliers stand to gain in the newest must-have smartphone.
Below is a quick tally of the key features and which suppliers likely benefit. (As usual teardown firms prepare their knives, TechInsights has cooked up a preliminary calculation of the iPhone 5’s bill-of-materials.)
— Dual-band WiFi. 4G LTE connectivity, which dramatically accelerates speeds vs. previous models This technology (similar to what the Kindle Fire now uses) increases test times at the module test level, which is a sweetspot for TER’s Litepoint business, points out Credit Suisse’s Satya Kumar. TER already indicated that this unit already saw a boost in 2Q12 attributable to both the iPhone 5 and Kindle Fire. Going forward, this likely means other smartphone vendors will adopt this technology, and eventually 802.11ac next year — both of which "are particularly test-intensive" and thus positives for TER, he notes.
Barclay’s CJ Muse, meanwhile, calls out Qualcomm’s 28nm 4G/LTE baseband and Broadcom’s 40nm WiFi combo chip.
— Upgrade to the A6 logic chip. Apple’s projections of nearly 300m iOS units for 2013 is such a sheer volume that "a seemingly benign metric like SoC die size for iPhone 5 [which is 95 mm2, 22% smaller than the A5] is actually meaningful enough to move the worldwide capex for semiconductor industry by 5% for every 10-sqmm variation," Kumar observes. He factors in 32nm capital intensity, Apple’s unit growth and die size, and determines that Apple’s chip partner Samsung could keep its logic capex spending flat in 2013 just to keep up with manufacturing the new A6 chips. (Apple also is using a dual-core ARM-A15 cores to run at 2× speed for the CPU, which Apple believes is better than Intel’s SoC core roadmap.
Barclays’ Muse points out that anything that means more 28/20nm chips means more litho-intensive processing, which "should benefit ASML disproportionally."
— More DRAM memory content, no extra NAND. DRAM content in the iPhone 5 is doubled to 1GB; Kumar actually had expected an increase in NAND content in the iPhone 5, but apparently Apple’s keeping it steady at 16-32-64GB, which underscores "the cautious commentary on wafer starts and capex from NAND companies," he writes. Among chip tool suppliers possibly affected, KLAC has higher exposure to logic/foundry and LRCX is more heavy into NAND than peers, but the extra DRAM content in the iPhone 5 likely makes up for that. Thus, the extra DRAM and no extra NAND means it’s "a wash" for suppliers.
— Upgraded to in-cell display technology. Putting touch sensors inside the panel, vs. adding a separate touch layer on top of the LCD panel, helps reduce the display’s thickness, which means the phone can be thinner or more features can be improved such as a bigger longer-life battery, explains Vinita Jakhanwal, director for small and medium displays at IHS iSuppli. LG, Sharp, and Japan Display are all potential suppliers of the in-cell display — if they can keep up with demand.
— Audio, antenna upgrades mean more sapphire. Sterne Agee’s Andrew Huang points to Cirrus Logic as a big beneficiary of a new "wideband audio" feature that can fill up more frequency spectrum to improve voice sound quality. Magnachip Semiconductor gets extra business tied to Cirrus Logic, points out Barclays’ Muse. Another winner is Corning, whose Gorilla Glass 2 is likely used as the cover glass for the iPhone 5, he says.
Huang also points out the iPhone 5’s increased used of sapphire, both as a camera lens cover and as the substrate (silicon-on-sapphire) for the antenna switch to automatically switch antenna connections, is a trend worth watching: "Within the next 12-18 months, we believe sapphire content per mobile phones could increase," he writes, suggesting eventually it might supplant the cover glass material. The silicon-on-sapphire trend likely benefits Rubicon (SoS wafer sapphire substrate supplier) and Peregrine Semiconductor (SoS switch component supplier). [Corrected 9/20: Soitec makes the actual SoS wafers for Peregrine.] "Our checks indicate that Rubicon supplies ~30-40% of the market for SoS wafers," he writes, and although a number of other ingot makers are currently getting qualified, "it is much more difficult to core, slice and polish SoS wafers, which suggests margins for SoS wafers are comparable, maybe even lower than those of LED wafers." Muse adds that Magnachip gets a foundry-biz boost from Peregrine, too.
September 14, 2012 – DAS Environmental Expert says it has a new system that offers a more environmentally friendly way to clean waste process gases produced in LED manufacturing.
LED demand continues to soar due to demand for backlighting (mobile devices and TVs) and general lighting — Yole Développement projects 2012 sales of $3.5B this year, doubling since 2010, and doubling again to $7B in 2014.
With that ramp-up, though, LED manufacturers have to deal with manufacturing process ramifications, such as the heavy use and disposal/emissions from process gases including ammonia and hydrogen. Taiwan is expected to enact stricter regulations in 2013 for waste water/gas disposal, which will emphasize the need for more environmentally friendly processes, notes DAS.
The company’s new LARCH system is said to be "based on a simple principle:" Initial thermal dissociation of ammonia is achieved by reaction heat; hydrogen is then ignited and burned off by electrical heating elements to be safely released into the atmosphere. (Heat generated by the reactions is transferred to a downstream heat exchanger.) It "economically" achieves low emission values, which means it can replace wet scrubbing processes that create large quantities of ammonia solution that must be further managed, the company explains.
The new LARCH system "has already generated a lot of interest" and enquiries from potential customers, according to Guy Davies, director of DAS’ gas treatment business unit. "Beyond LED manufacturing, DAS sees the system "finding application in other processes in which ammonia and hydrogen are generated." (DAS has other abatement systems targeting MOCVD technology but it’s unclear how or if they are related to LARCH.)
The LARCH system for processing and disposal of waste gases in LED manufacturing. (Source: DAS)
Samsung Electronics Co., Ltd., held a groundbreaking ceremony for a major new memory fabrication line in Xi’an, China. Once completed, the new facility will make use of advanced 10-19nm technology to produce NAND flash memory chips, according to the company.
Samsung Electronics Vice Chairman and CEO Dr. Oh-hyun Kwon hosted the event, which welcomed 600 attendees including government dignitaries such as Zhao Leji, secretary of provincial party committee and director of provincial People’s Congress Standing Committee, and Kyu Hyung Lee, Ambassador of the Republic of Korea to China. Other honored attendees included Sang-Jick Yoon, vice minister for Industry and Technology at the Ministry of Knowledge Economy, as well as hundreds of Samsung suppliers and customers.
Vice Premier of State Council of the People’s Republic of China Li Keqiang congratulated the event through a personal letter, noting that the project will move the partnership between the two countries forward within the IT field.
Dr. Kwon said in his remarks during the ceremony, "It is a great honor to announce our groundbreaking at Xi’an, a city of tremendous historic and academic significance, as we celebrate the 20th anniversary of diplomatic relations between Korea and China. At this time, our memory semiconductor business also marks its 20th consecutive year as the leader of the memory industry. The new Samsung China Semiconductor fab will lay a solid foundation for continued supply of leading memory components, enabling Samsung to further spearhead the advancement of the IT industry and enhanced user experiences."
With the groundbreaking, the Samsung China Semiconductor complex has a target timeline for achieving full-fledged operation in 2014. Initially, Samsung is investing US$2.3 billion in the Xi’an fab. Samsung China Semiconductor will mark the single largest investment by Samsung in China with a phased total investment of US$7 billion.
The capital of multiple dynasties spanning over a thousand years, Xi’an is at the center of development of advanced electronics technology as a primary location in China’s Western Region Development. Xi’an’s industrial landscape supports all key considerations in the production of advanced IT infrastructure such as basic resources including water and power, and a solid employee base for IT research, development and manufacturing.
Xi’an is home to 37 universities and 3,000 R&D centers focused on advanced IT technology. Samsung has also kicked off a program for close academic collaboration with several reknown local universities, which will include scholarships to nurture skilled talent locally.
The groundbreaking in Xi’an comes just one year after Samsung commenced operations at its Line 16 in Hwaseong, Korea.
September 12, 2012 – A delegation of stakeholders in LED manufacturing have met with US Department of Energy officials to plead their case for increased support in solid-state lighting (SSL) R&D and manufacturing, with their key message that SSL offers greater energy conservation and return-on-investments (ROI) than renewable energy technologies that get much more backing.
Pushing for the added US backing is a delegation of SEMI members and other industry stakeholders with origins in the FALCON Lighting Consortium, led by Philips Lumileds and SEMI members Applied Materials, Veeco, KLA-Tencor, Ultratech, and others (SEMI’s broad roster includes major suppliers of LED equipment and materials). FALCON and SEMI have emphasized increased DOE support for domestic SSL development and especially manufacturing. US LED manufacturing received over $23M in grants in several areas (metrology, lithography, and deposition R&D) under the 2009 American Recovery and Reinvestment Act. Funding has been reduced since then, but the groups claim lobbying efforts have restored and increased funding levels above what the DoE submitted to appropriations subcommittees.
In August of this year the groups met with US DoE Assistant Secretary of Energy David Danielson and his senior staff, their first such meeting in recent years. The key message was that energy conservation achieved through SSL can have a greater impact on US energy than renewable energy technologies which currently get government investments (and a lot more of it). The group calculates SSL can deliver 4.0-6.0 quads of annual energy savings for a 10-20× higher ROI than other energy investment alternatives.
"According to the Energy Information Administration [EIA], on a dollar-per-unit of-production basis, the level of subsidies received by the wind and solar industries were almost 100 times greater than those for conventional energy," stated Richard Solarz, senior director of technology at KLA-Tencor and Randy Moorhead, VP for government relations at Philips Electronics, co-leaders of the group advocating for greater DOE support for SSL.
"We believe that it is generally understood that conventional energy conservation — specifically lighting — efforts are under-supported."
SEMI added that it hopes the meeting will help secure support for SSL beyond its funding levels of the past four years, despite the obvious and formidable pressures on national budgets. "Despite the austerity mood in Washington, SEMI is confident that increased budget requests for LED-based lighting technologies will receive considerable bicameral and bipartisan support in the legislative branch during upcoming legislative sessions," the group stated.
*US EIA 2009 Annual Energy Review, ref. in each cell
** January 27, 2012 DOE est. 4.0 quads, FALCON estimate against current usage 6.0 quads
September 11, 2012 – Demand for power management semiconductors recovered in 2Q12 after declining for half a year, thanks to strong demand from electronic products such as smartphones and media tablets, according to IHS iSuppli.
Global revenue for power management chips (preliminary estimates) reached $7.9B in 2Q12, up 9.7% from the first quarter, and a complete turnaround from sequential declines of -4.0% in 1Q12 and -10.7% in 4Q11. That will help reverse some of the inventory buildup that accumulated over the past three quarters as consumer spending slowed.
"The products responsible for fueling growth include mobile handsets, media tablets, personal computers and other consumer electronic items, such as digital still cameras. In these devices, efficient power management is becoming more important to consumers — a significant feature given that electronic devices are almost never shut off or powered down anymore," stated Marijana Vukicevic, senior principal analyst for power management at IHS.
Also read:
- Power management semiconductors grow after a rocky Q4 2011
- Why 2Q makes or breaks a "good" year for IC sales
- Media tablets join top 5 semiconductor end-markets in 2012
IHS iSuppli forecasts continued growth in demand for power semiconductors over the next two quarters as we enter the prime holiday season build-up. Overall sales for 2012 are expected to reach $32.4B, only slightly better than last year’s $31.9B and flat growth in 2010. Over the next five years to 2016, look for biggest growth (30% CAGR) in power chips to come from media tablets, notably the iPad. Double-digit growth in demand is also expected from mobile handsets (11.7%), mobile infrastructure (13.1%), and digital set-top boxes (12.3%).
The main growth device in power management semiconductors, insulated gate bipolar transistors (IGBT) modules, which see wide application in alternative energy generation (13.3% CAGR), automotive safety/control (13.1%), and industrial building/home control (12.2%). Application in DC-DC non-isolated usage for inverters and alternative power sources gets special mention by iSuppli, as does low-voltage MOSFETs used in appliances, media tablets, and mobile infrastructure.
| 3Q11 | 4Q11 | 1Q12 | 2Q12 |
| 8.4 | 7.5 | 7.2 | 7.9 |
Worldwide revenue forecast for power management
semiconductors, in US $B. (Source: IHS iSuppli)
September 11, 2012 – Taiwan’s two biggest semiconductor foundries saw sales jump in August, and business for the full third quarter is looking up as customers pull in some orders.
TSMC’s August sales were about NT $48.9 billion (US $1.63B), up about 2% from July but up 32% from a year ago. Through 2012 so far, TSMC’s sales are up about 16% from Jan-Aug 2011. The company says its entire 3Q11 sales will be "slightly higher" than its guidance of ~7% growth (NT$136-138B) it issued in July, citing primarily "pull-in of certain customers’ shipments and better-than-expected mask revenue."
Sales at UMC, meanwhile were also up about 2% month-on-month to NT $9.8B (roughly US $327.0M), nearly 20% higher than August 2011, and their highest since Dec. 2010. For the year so far, though (Jan-Aug.), UMC’s sales are off about 3% from last year’s pace. The company currently predicts "mild revenue growth" in 3Q12 with a "marginal" increase in both wafer shipments and ASPs. As with TSMC, industry watchers agree that customers are jockeying for an early ramp to the traditionally strong fall build-up for holiday electronics sales.
(Note that we’re no longer calling TSMC and UMC "the world’s top two foundries" anymore — that’s because GlobalFoundries passed UMC for No.2 in foundry sales earlier this year, and is expected to remain there.)
September 10, 2012 – EV Group (EVG), St. Florian, Austria, has updated its modular EVG 150 automated resist processing system to address specific needs for backend lithography, conformal coating, and planarization. The new system was announced at last week’s SEMICON Taiwan.
The newest version of the EVG150 high-volume coater/developer performs spin coating, developing, spray coating and lift off on 50-200mm wafers, enabling up to four wet process modules combined with two stacks of hot plates, chill plates, and vapor prime modules. Two key additions include EVG’s OmniSpray technology (with proprietary ultrasonic nozzle), which allows the conformal coating of high topography surfaces (e.g. ultra-thin, fragile, or perforated wafers) and can result in up to 80% reduced material consumption vs. traditional spin coating, according to the company. The other key addition is the NanoSpray coating technique to coat surfaces with vertical sidewall angles — for example, processing through-silicon vias (TSV) with polymer liners and photoresist.
EVG reps summarized the additions for SST:
- A modular design allowing roll-in/-out of process modules, for enhanced uptime and serviceability
- A new spray coating module (the company’s OmniSpray technology) with x,y (raster) spray coating
- A new module for the company’s proprietary "NanoSpray" process for coating blind vias
- A new structural frame with most chemicals stored within the main frame, to shorten point-of-use and optimize process control
- CIM Framework software, to help meet rigorous requirements for uptime, process control, and fab automation
"Close collaboration with our customers made it clear that the next logical step for our coater/developer technology was to create a universal approach for high-volume processing of devices with more complicated structures and topographies," stated Markus Wimplinger, EV Group’s corporate technology development and IP director.
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spraycoated cavity (cavity 150