Category Archives: Editors Picks

January 15, 2013 – The semiconductor industry is undergoing massive transformation as the rise in mobile computing, changes to the fabless-foundry model, uncertainties in technical innovation, and global macroeconomic trends become the dominant forces in 2013 and beyond, according to industry leaders speaking at the SEMI Industry Strategy Symposium (ISS), opening this week in Half Moon Bay, CA.

Ajit Manocha, CEO of GlobalFoundries, during his keynote presentation discussed the dynamic technology and economic needs of mobile computing that is driving new approaches to the chip design-to-production cycle. Calling it "Foundry 2.0," he sees outsourced semiconductor manufacturing moving toward a more IDM-like model, creating new collaboration models and techniques to close the gap between process teams at foundries and design teams at the fabless companies. With daunting technical challenges like 3D stacking, 450mm fabs, new transistor architectures, multi-patterning, and the uncertainties to lithography-based scaling, product development paths with virtual teams will evolve and adapt rapidly in the coming months and years.

With new fabs now costing upwards of $8 billion and leading-edge manufacturing investments expected to exceed $40 billion this year alone, global economic trends and forces — increasingly influenced by uncertain consumer spending in both developed and emerging markets — have never been more important to the semiconductor ecosystem. Dr. John Williams, president and CEO of the Federal Reserve Bank of San Francisco, said "Many businesses are locked into a paralyzing state of anxiety."

Williams used the ISS conference to lessen uncertainty and anxiety in the capital markets, pledging to keep interest rates near zero until the unemployment rate drops to 6.5%, as long as inflation expectations do not climb above 2.5%.

Bruce Kasman, chief economist and managing director of global research at JP Morgan, shared a positive economic outlook, especially in the second half of the year, that is "bumpy, better and less risky." He sees Asia leading the economic rebound, as China demand accelerates with the change in leadership and improved access to credit. University of Texas Austin Churchill scholar, Matthew Gertken, however, discussed the simmering "Asian cold war" developing as territorial disputes with China generate an emerging "containment policy" by many of China’s neighbors.

How these macroeconomic dynamics are impacting the semiconductor industry was discussed by speakers who saw both perils and opportunities. Andy Oberst, senior VP, strategy and corporate development at Qualcomm, looked at what mobile phones would likely look like in 2020, but also pointed out how disruptive changes — not incremental changes — have always driven the mobile phone market.

Satya Kumar, vice president at Credit Suisse, discussed how original equipment makers like phone and computer manufacturers have always benefitted from the declining cost of transistors and pondered, "Could stopping Moore’s Law be a good thing?"

As the world’s largest semiconductor company, Intel’s view is different. Michael Bell, vice president and general manager, mobile and communications group at Intel, brought the audience up to date on the company’s mobile strategy, offering confidence that Intel’s portfolio of RF baseband technologies, leading-edge scaling performance, and supply chain excellence will ultimately deliver significant success.

Conference speakers on Day 2 and Day 3 of ISS will discuss how these and other mega-trends are specifically impact the R&D, product development, manufacturing, investment, and supply-chain challenges impacting various sectors of IC and microelectronics industry.

The SEMI Industry Strategy Symposium (ISS) examines global economic, technology, market, business and geo-political developments influencing the semiconductor processing industry along with their implications for your strategic business decisions. For more than 35 years, ISS has been the bellwether semiconductor conference for senior executives to acquire the latest trend data, technology highlights and industry perspective to support business decisions, customer strategies and the pursuit of greater profitability.

January 11, 2012 – The annual Consumer Electronics Show in Las Vegas has become a mecca for all things electronic and digital, from useful to cool to just plain bizarre. Among the technologies at the confluence of cool and useful were two things that aim to rethink the PC model. (And for the cool/bizarre side of the CES spectrum, behold eatART’s rideable robot Mondo Spider.)

This year’s CES emphasized "designs that defied or pushed the limits of convention," with two clear examples, points out DisplaySearch’s Richard Shim: size-defying "phablets," and even more size-defying "table PCs."

The phablet — a combination of phone and tablet — got its start with Samsung’s Galaxy Note, which offered an expanded 5-in. OLED screen; the Galaxy Note II was even bigger at 5.5-in. At this year’s CES, the phablet took another screen-size step up thanks to China’s Huawei, which unveiled its Ascend Mate ,which has a 6.1-in. 1280 × 720 screen. (Huawei also touted its Ascend D2 with a 5-in., 1920 × 1080 display.) The Ascend D2 will be available in China later this month, followed by the Ascend Mate in February.

The "table PC," meanwhile, is essentially a supersized tablet, with the screensize of a large computer monitor. Sony’s Vaio Tap 20 (20-in. display) is now joined by Lenovo’s IdeaCentre Horizon with a 27-in. resistive touch-based display, and the company has a prototype 39-in. version planned for later this summer. Each of these "table PCs" can stand upright like an all-in-one desktop PC, but also laid down flat, Shim notes.

"Both the phablet and the table PC categories represent the extreme end of a form factor trend that we expect to see throughout 2013," Shim explains. "The traditional lines that have been used to define, categorize, and track devices are expected to only become more difficult to maintain," and suppliers will increasingly tinker with formfactors to find what resonates with consumers. (In his own CES research note, Barclays analyst CJ Muse acknowledged the interest shown in phablets, and likely reverberations they should cause among suppliers, along with "large screen touch, Next Gen TVs, and the Internet of everything.") Shim doesn’t expect these design tinkerings will greatly impact shipment trends in the near-term (DisplaySearch still sees notebook PC shipments dipping 5% Y/Y in 2013), but "we anticipate that brands can score image points and credibility with consumers for willing to be bold with design. That has translated to good fortune for Apple so it should not be underestimated."

(photos via DisplaySearch; credit photo #1 to Lori Grunin/CNet)

By Rebecca Howland, Ph.D., and Tom Pierson, KLA-Tencor.

Is it time for high-brightness LED manufacturing to get serious about process control?  If so, what lessons can be learned from traditional, silicon-based integrated circuit manufacturing?

The answer to the first question can be approached in a straight-forward manner: by weighing the benefits of process control against the costs of the necessary equipment and labor.  Contributing to the benefits of process control would be better yield and reliability, shorter manufacturing cycle time, and faster time to market for new products. If together these translate into better profitability once the costs of process control are taken into account, then increased focus on process control makes sense.

Let’s consider defectivity in the LED substrate and epi layer as a starting point for discussion. Most advanced LED devices are built on sapphire (Al2O3) substrates. Onto the polished upper surface of the sapphire substrate an epitaxial (“epi”) layer of gallium nitride (GaN) is grown using metal-organic chemical vapor deposition (MOCVD).

Epitaxy is a technique that involves growing a thin crystalline film of one material on top of another crystalline material, such that the crystal lattices match—at least approximately. If the epitaxial film has a different lattice constant from that of the underlying material, the mismatch will result in stress in the thin film. GaN and sapphire have a huge lattice mismatch (13.8%), and as a result, the GaN “epi layer” is a highly stressed film. Epitaxial film stress can increase electron/hole mobility, which can lead to higher performance in the device. On the other hand, a film under stress tends to have a large number of defects.

Common defects found after deposition of the epi layer include micro-pits, micro-cracks, hexagonal bumps, crescents, circles, showerhead droplets and localized surface roughness. Pits often appear during the MOCVD process, correlated with the temperature gradients that result as the wafer bows from center to edge. Large pits can short the p-n junction, causing device failure. Submicron pits are even more insidious, allowing the device to pass electrical test initially but resulting in a reliability issue after device burn-in. Reliability issues, which tend to show up in the field, are more costly than yield issues, which are typically captured during in-house testing. Micro-cracks from film stress represent another type of defect that can lead to a costly field failure.

Typically, high-end LED manufacturers inspect the substrates post-epi, taking note of any defects greater than about 0.5mm in size. A virtual die grid is superimposed onto the wafer, and any virtual die containing significant defects will be blocked out. These die are not expected to yield if they contain pits, and are at high risk for reliability issues if they contain cracks. In many cases nearly all edge die are scrapped. Especially with high-end LEDs intended for automotive or solid-state lighting applications, defects cannot be tolerated: reliability for these devices must be very high.

Not all defects found at the post-epi inspection originate in the MOCVD process, however. Sometimes the fault lies with the sapphire substrate. If an LED manufacturer wants to improve yield or reliability, it’s important to know the source of the problem.

The sapphire substrate itself may contain a host of defect types, including crystalline pits that originate in the sapphire boule and are exposed during slicing and polishing; scratches created during the surface polish; residues from polishing slurries or cleaning processes; and particles, which may or may not be removable by cleaning. When these defects are present on the substrate, they may be decorated or augmented during GaN epitaxy, resulting in defects in the epi layer that ultimately affect device yield or reliability (see figure).

Patterned Sapphire Substrates (PSS), specialized substrates designed to increase light extraction and efficiency in high-brightness LED devices, feature a periodic array of bumps, patterned before epi using standard lithography and etch processes. While the PSS approach may reduce dislocation defects, missing bumps or bridges between bumps can translate into hexes and crescent defects after the GaN layer is deposited. These defects generally are yield-killers.

In order to increase yield and reliability, LED manufacturers need to carefully specify the maximum defectivity of the substrate by type and size—assuming the substrates can be manufactured to those specifications without making their selling price so high that it negates the benefit of increased yield. LED manufacturers may also benefit from routine incoming quality control (IQC) defect measurements to ensure substrates meet the specifications—by defect type and size.

Substrate defectivity should be particularly thoroughly scrutinized during substrate size transitions, such as the current transition from four-inch to six-inch LED substrates. Historically, even in the silicon world, larger substrates are plagued initially by increased crystalline defects, as substrate manufacturers work out the mechanical, thermal and other process challenges associated with the larger, heavier boule.

A further consideration for effective defect control during LED substrate and epi-layer manufacturing is defect classification. Merely knowing the number of defects is not as helpful for fixing the issue as knowing whether the defect is a pit or particle. (Scratches, cracks and residues are more easily identified by their spatial signature on the substrate.) Leading-edge defect inspection systems such as KLA-Tencor’s Candela products are designed to include multiple angles of incidence (normal, oblique) and multiple detection channels (specular, “topography,” phase) to help automatically bin the defects into types. For further information on the inspection systems themselves, please consult the second author.

Rebecca Howland, Ph.D., is a senior director in the corporate group, and Tom Pierson is a senior product marketing manager in the Candela division at KLA-Tencor.

Check out other Process Watch articles: “The Dangerous Disappearing Defect,” “Skewing the Defect Pareto,” “Bigger and Better Wafers,” “Taming the Overlay Beast,” “A Clean, Well-Lighted Reticle,” “Breaking Parametric Correlation,” “Cycle Time’s Paradoxical Relationship to Yield,” and “The Gleam of Well-Polished Sapphire.”

January 7, 2012 – As the annual Consumer Electronics Show and hordes of techie enthusiasts descends over Las Vegas this week, one display technology — 4K × 2K — is expected to grab most of the attention, says NPD DisplaySearch.

4K LCD TV shipments will exceed OLED TV shipments through 2015, the firm says, due to both delays by OLED TV makers and increased promotion of 4K LCD TVs. Many Chinese brands are currently launching their own products domestically. OLED TVs should start hitting the market in 2013, but with low volumes and high prices. Note that 4K technology can be applied to OLED TVs as well, and eventually will be introduced for some premium TV segments, the firm points out.

"The global TV market—and North America in particular—are experiencing either slow or negative growth in 2012, and brands are eager to demonstrate new technologies that might create a spike in demand," stated Paul Gagnon, Director for Global TV Research at NPD DisplaySearch. Gagnon added, “OLED TV was prominently featured during the previous two CES shows as the next-generation TV display technology, but the lack of market launch so far has caused several set makers to start emphasizing 4K×2K resolution TVs for premium market segments."

Forecast for OLED TV and 4K LCD TV. (Source: NPD DisplaySearch)

Overall TV demand is expected to fall in 2012, as consumers worldwide grapple with tough economic conditions and TV prices fall at only marginal rates. DisplaySearch estimates LCD TV shipments in 2012 were 205 million, slightly lower than in 2011, while plasma TV shipments sunk 24% to 13 million. The firm sees 2013 initially taking shape as a flat market due to persistent economic uncertainty, but ultimately smoothing into gradual growth as conditions improve and as price declines in the TV market accelerate.


TV shipment growth by technology. (Source: NPD DisplaySearch)

January 3, 2012 – Active matrix OLED (AMOLED) displays will continue to encroach upon LCD technology through small and medium-sized (9-in. and smaller) displays used in mobile phones, according to recent analysis by NPD DisplaySearch.

Total OLED display shipments are expected to reach 191 million in 2012, accounting for 8.4% of total small/medium displays. AMOLEDs will make up 6% all by themselves, having driven total OLED penetration into this market segment since 2010 and the launch of Samsung’s Galaxy S phone, according to Yoonsung Chung, director, large-area displays & FPD materials for NPD DisplaySearch. Mobile phones continue to drive the OLED adoption, with mobile phone applications expected to make up 69% of the small/medium OLED market in 2012 and growing to 83% in 2015.

OLED penetration in small and medium display shipments by technology. (Source: NPD DisplaySearch)

Mass adoption of AMOLED technology, though, faces hurdles due to the higher cost and technical difficulty of manufacturing — successful entry takes five years on average, according to the firm. "Prior to the start of mass production of AMOLED displays for mobile phones, only passive-matrix OLED (PMOLED) displays were available, mostly used in applications such as mobile phone sub-displays, automobile displays, and some industrial and niche applications," Chung stated.

Samsung produces nearly all AMOLED displays today, but more players will be needed to continue to push the technology’s adoption — and indeed new panel makers will emerge in 2013 from Taiwan and China, Chung forecasts. He also predicts demand for "OLED applications for smartphones, amusement devices, digital still cameras, and home appliances."

Small/medium OLED display shipments by application. (Source: NPD DisplaySearch)

December 28, 2012 – Researchers in Japan have devised a microelectromechanical system (MEMS) fabrication technology using printing and injection molding, fabrication of large-area devices with low capital investment, without a vacuum process, and lower production costs. Thus, MEMS devices can be made and applied for fields where manufacturing cost has been an issue, such as lighting.

The team from the Research Center for Ubiquitous MEMS and Micro Engineering of the National Institute of Advanced Industrial Science and Technology (AIST) integrated microfabrication technology and MEMS design evaluation technology, and combined it with Design Tech Co. Ltd.’s signal processing technology to fabricate a lighting device.

Conventional commercial MEMS devices use fabrication techniques with semiconductor manufacturing systems used to produce integrated circuits, including vacuum processes. Resins could be used to form patterns onto moving microstructures but production costs are high due to vacuum-based processes. Also, it has proven difficult to form and thin MEMS structures such as springs and cantilevers because resins harden immediately after mold injection.

AIST researchers now say they have realized low-cost printing and transferred the structure using injection molding, and improved the mold structure to fill thin moving structures. A film for transferring the MEMS functional laser is formed, and the release layer and MEMS functional layer are printed onto the film with a screen or gravure printer. The printed film is aligned and put into an injection mold, into which is injected a molten resin that is cooled and solidified into the MEMS structure. The mold is then opened and the MEMS structure is separated from the film; the ink layers printed on the film are transferred to the MEMS structure.

Figure 1: MEMS fabrication processes by printing and injection molding.

The printed MEMS functional layers can be changed according to the desired purpose of the MEMS device — from acceleration sensors and gas sensors to power generation devices. This enables low-cost MEMS fabrication in fields where costs are currently too high. One example the AIST highlights is in light distribution control of LED lighting. MEMS mirrors produced with semiconductor manufacturing processes are based on costs determined by devices per wafer; so large-area mirrors are costly, while more cost-friendly micromirrors necessitate a more complex optical system. This new MEMS fabrication technology, though, could produce low-cost large MEMS devices (larger than several mm across), which opens the door for MEMS-based active light distribution control devices. Future work will seek to improve the symmetry of the MEMS mirror synchronization with the LED timing, and expand the range of the light distribution by improving the arrangement of the optical system, the signal processing, and the control circuit.

Figure 2: MEMS mirrors for active light distribution fabricated by using only printing and injection molding (left), and examples of the resulting light distribution patterns (right).

Injection molding can be used easily to form complex 3D objects such as spheres; the researchers expect MEMS devices will be formed on the surface of, or inside, 3D objects. Moreover, injection molding processes are commonly available in Japan, and systems cost less than semiconductor manufacturing systems. AIST projects its work will lead to MEMS fabrication coming out of non-semiconductor industries, such as plastics molding — and participation from these other sectors into MEMS manufacturing will help develop new applications for MEMS devices.

Figure 3: Examples of MEMS devices fabricated with the AIST technology. Top & middle: A reflective mirror and a mirror displacement sensor incorporated into a MEMS mirror device for lighting. A mirror ink for the reflective mirror, a conductive ink for the strain sensor, and a magnetic ink for driving the mirror are printed on the film, and then the printed ink patterns are transferred to the MEMS structure by injection molding. The MEMS mirror device for lighting did not break after more than 100 million operations driven by an external coil. Bottom: A MEMS device array can be fabricated using an arrayed MEMS pattern mold.

At the recent Georgia Tech-hosted International Interposer Conference, Matt Nowak of Qualcomm and Nagesh Vordharalli of Altera both pointed to the necessity for interposer costs to reach 1$ per 100mm2 for them to see wide acceptance in the high-volume mobile arena. For Nowak, the standard interposer would be something like ~200mm2 and cost $2. The question that was posed but unanswered was: "Who will make such a $2 interposer?"

Less than a month later, this question began to be answered as several speakers at the year-ending RTI ASIP conference (Architectures for Semiconductor Integration and Packaging) began to lift the veil on silicon interposer pricing.

Sesh Ramaswami, managing director at Applied Materials, showed a cost analysis which resulted in 300mm interposer wafer costs of $500-$650 / wafer. His cost analysis showed the major cost contributors are damascene processing (22%), front pad and backside bumping (20%), and TSV creation (14%).

Ramaswami noted that the dual damascene costs have been optimized for front-end processing, so there is little chance of cost reduction there; whereas cost of backside bump could be lowered by replacing polymer dielectric with oxide, and the cost of TSV formation can be addressed by increasing etch rate, ECD (plating) rate, and increasing PVD step coverage.

Since one can produce ~286 200mm2 die on a 300mm wafer, at $575 (his midpoint cost) per wafer, this results in a $2 200mm2 silicon interposer.

Lionel Cadix, packaging analyst of Yole D

December 20, 2012 – Global spending on wafer fab equipment (WFE) is now on pace to finish 2012 with a -17% annual decline, and 2013 now looks like it’ll only be slightly better at a -10% dropoff, before the next cyclical spending upturn begins in 2014, according to an updated forecast from Gartner.

The firm now sees 2012 WFE investments coming in at about $29.9B, a -17.4% decline from 2011. That compares with an earlier projection of a -13% decline made in October, which was itself a downward revision (-9% in June, -11% in March). Those numbers are slightly steeper, but the trend is similar, to SEMI’s recent projections which also predict a rebound coming in 2014.

The environment has softened significantly in just the past few weeks, Gartner says, as the macroeconomic suffering takes a toll on consumer spending, which trickles down to overall capital spending (equipment plus facilities services, etc.) — which Gartner now sees declining -10.7% in 2012 vs. its -9.3% forecast in the third quarter. That will be followed by another -14.7% decline in 2013, as semiconductor manufacturers deal with excess capacity and a slow macroeconomy.

"Although a period of inventory correction that led to lowered production levels in the first half of 2012 appears to be over, inventories remain at critical levels," Johnson warned. "High inventories, combined with overall market weakness, will continue to depress utilization rates into the first half of 2013."

The year started off strong for wafer fab equipment spending as chipmakers ramped sub-30nm production and needed new tools to prop up yields, but as yields improve that equipment demand is softening, explains Bob Johnson, research VP at Gartner. Overall yields will touch bottom below 80% by the end of 2012 and slowly creep up to around 85% by the end of 2013, Gartner says; leading-edge utilization will be a bit higher as always, moving from mid-80% up to the low-90% range over the same period.

There’s hope on the horizon, though. Memory and logic spending should realign in 2014 with "substantial increases" in investments, followed by a flat to slightly positive 2015. look for a new WFE growth cycle starting in 2014, and lasting through 2016.

Here’s how Gartner sees things shaping out near-term, by technology investment:

— Memory: Continuing to be weak through 2013, with maintenance-level investments for DRAM and a slightly down NAND market until supply and demand are in balance.

— Foundry: Spending will increase 7.4% in 2013, as both IDMs and semiconductor assembly/test services (SATS) companies absorb spending declines.

— Logic: The only positive driver for capital investments in 2012 increasing just 3%, Gartner notes, thanks to the aforementioned sub-30nm ramp. Smartphones and media tablets won’t be enough to bring up utilization levels to where chipmakers need them, though, Johnson notes.

Projected global spending on semiconductor manufacturing equipment, in US $M. (Source: Gartner)

Mike Rosa, MEMS global product manager at Applied Materials, blogs about recent advances in MEMS, as described at the recent MEMS Executive Congress.  

Over the last 50 years computing power has migrated from the mainframe, to the desktop, to the laptop, and now, with almost-equivalent computing capability, onto mobile devices, tablets, and smart phones. 

And tomorrow? If you were in Scottsdale, AZ in November for the now semi-annual MEMS Executive Congress, you would have heard about the latest concepts in personal computing – and I mean really personal. Think body art that collects data…well, not quite body art, but an array of patches, arm bands, watches, jewelry and more, all with one goal in mind – to help quantify every aspect of our daily lives!

It’s been referred to in recent times as the “Quantified Self” or “QS Quotient” and it’s just one of the many exciting advances enabled by MEMS.

MEMS devices enable many advances in personal health care including portable (sometimes wearable) health monitors. Fast-evolving innovations from a host of companies promise even more imaginative and discretely wearable integrated solutions.

For example, personal wellness is rapidly becoming a key priority for individuals and employers alike, both as a means to improve longevity and quality of life, and to control dramatically rising health care costs.  The result is a burgeoning business in devices that enable people to continuously gauge their personal behaviors and habits and provide actionable information.   Companies like BodyMedia and WiThings are incorporating MEMS into various portable products designed to monitor and track your vital signs, which they believe will open up new and exciting markets in personal healthcare. 

Looking only slightly further into the future, wearable patches embedded with monitoring technologies that are currently available only through health care professionals will soon find their way onto the consumer market.  One such MEMS enabled offering (see images below) being developed by BodyMedia is a seven-day, disposable patch that, will measure calorie burn, activity levels, and other body metrics, creating a snapshot of lifestyle habits to guide recommendations for weight loss, sports, fitness and much more. 

A major supplier of sports and fitness products has recently debuted a wristband with a built in accelerometer to track of all your daily activity, report calories burned and allow you to track your data over time ─ oh, and did I forget to mention ─ all wirelessly from the your favorite mobile device.  And for times when you’re not running, biking, hiking or salsa dancing, start-up company Lark has also introduced a wristband technology that, with the help of MEMS, monitors and keeps a record of your sleep patterns.

Where will it end?

According to Dr. Janusz Bryzek, vice president, Development, MEMS and Sensing Solutions at Fairchild Semiconductor, it won’t!  Bryzek moderated a lunch table discussion at the MEMS Congress entitled “Roadmap to a $Trillion MEMS Market” where we debated the growth of MEMS fueled by an increasing number of consumer, industrial and medical applications. These are based on the four strongest device types to date: gyroscopes, accelerometers, microphones, and pressure sensors.  In addition to these, there was increasing support expressed for the growth of “the internet of things,” where everyday objects are not only connected to the Internet or Cloud, but also play host to a MEMS device that enables the object to collect data from its surroundings.

The consensus among the group is that the road to a $Trillion (or unit volume) market is not an easy one.  Based on the use of today’s conventional MEMS technologies, it looks like it may take the invention of many more wristbands, waistbands, head bands, patches and pills before we can truly reach that lofty goal.  That’s not to say it won’t happen, but as in most other technology segments we’re in for many exciting baby steps as we march down the road to a “$Trillion MEMS Market.” 

 Nowhere was this more evident than during the “MEMS Technology Showcase” – a segment at the Congress where companies have an opportunity to show off the latest inventions and prototypes for MEMS-based technologies.   

Sphero and Lightbohrd are two examples of novel and very exciting products that rely on MEMS, either for acceleration, gyroscope function or for ambient light sensing and external interaction.  The MEMS in these products are available today and their use is representative of the MEMS adoption we’re likely to see as new product innovations emerge. And Applied Materials continues to be committed to developing the device fabrication technologies needed to keep those innovations coming.

Industry analysts Yole Developpment currently estimate the MEMS market at just over 7.5 billion units per year, with a valuation of $11.5 billion. Their 5-year forecast shows the combined MEMS/emerging MEMS technology market at about $20 billion by 2017, with a unit volume of more than 18 billion units. Those figures represent healthy growth, but there’s still a long way to go.  It will take many more amazing inventions ─ both new applications and new MEMS device designs ─ before that 1 trillion mark becomes a reality.  

Author

Mike Rosa serves as MEMS global product manager within the 200mm equipment products group at Applied Materials. He has over 15 years of technology focused product and business development experience.

December 17, 2012 – Samsung Austin Semiconductor sent out a PR last week about previously announced $4B investments in its Austin, TX facilities. The site is on schedule for production in 2H13 for mobile application processors (28nm process technologies on 300mm wafers). Samsung Austin Research Center also is adding about 200 engineers to fuel this effort, according to the company. The commitment — representing the largest single foreign investment ever made in the state of Texas — will bring Samsung’s total investment in its Austin Semiconductor unit to more than $15B since 1996.

The original Samsung Austin investment announcement — much less this update, thin on new details — wasn’t exactly a surprise; a 3Q12 retrofit had been seen as one of the key capex drivers for the latter half of this year. Samsung is expected to push its capex by 11% in 2012 to $13.1B, just ahead of Intel’s $12.5B (16% Y/Y growth) — together representing fully 40% of worldwide capital spending this year.

In a quick research note, Barclays’ CJ Muse notes that Samsung’s overall capex could be as much as halved this year (a -30% to -50% range), with most of it coming from the logic side due to an Apple defection. He currently models Samsung LSI’s capex in 2013 declining about 25% to KRW 6 trillion (~$5.4B), and possibly even more, and that it will focus on a 32nm-to-28nm transition, i.e. "spending will be shrink-oriented vs. capacity-oriented." Near-term, Muse sees Samsung’s orders, currently at "negligible levels," as possibly picking up in 1H13 to support this Austin push. He thinks this will contribute to an overall sector-wide orders environment of "flattish to slightly up (in-line with expectations)."

Another thing this announcement accomplishes, Muse notes, is a signal to the marketplace that Samsung is still investing to remain competitive with TSMC. Apple has openly partnered with Samsung in Austin to make the "engine" of the iPhone and iPad, despite the two companies’ fierce and broad competition in finished electronics devices. That business is in doubt, though, as many speculate about the electronics giant will seek other noncompetitive partners for future chip orders. With this $4B pledge, even if Samsung loses Apple’s business, it is sending a message to other fabless firms who may decide to grab some of that vacated capacity in 2013-2104.