Category Archives: LEDs

December 29, 2012 – Industry watchers have been lowering their outlooks for 2013 over the past few weeks, but there’s one set of opinions that still see optimism for an industry rebound in 2013 — chip industry executives themselves.

In its annual study, KPMG found three quarters of semiconductor executives polled believe they will see revenue growth in the next fiscal year — that’s up from 63% in last year’s survey. Two-thirds expect to hire more workers (vs. 48% in 2011), and 71% say annual industry profitability will increase in 2013. Overall their sentiment is for a recovery that builds up steam especially heading into the second half of the year.

KPMG’s Global Semiconductor Survey, conducted in September, surveyed 152 semiconductor industry business leaders (primarily senior-level execs) at device, foundry, and fabless manufacturers, half of whom have annual revenue of $1 billion or more. Overall, its "Semiconductor Business Confidence Index" climbs to 57, stepping across the 50/50 threshold into optimism vs. the index of 46 recorded a year ago. Among its other findings:

— More activity, inside and out. Seventy-three percent of respondents expect to increase capital spending over the next fiscal year, up from 51% a year ago — and 24% expect to increase spending by 10% or more, vs. 10% of respondents in late 2011. Just 6% of respondents expect capital spending cuts, s. 18% a year ago. Similarly, 77% of execs expect semiconductor-related R&D spending to increase in 2013, up from just 65% a year ago. And two thirds of execs expect more merger and acquisition deals in fiscal 2013, up from 62% a year ago looking into 2012’s crystal ball.

— The US is tops again. Execs placed the US ahead of China in the most important geographic markets for semiconductor revenue growth three years out — for a third consecutive year, fewer see China as their most important market. Next in priority are Europe, Korea, and then Taiwan — which two years ago was ranked 2nd and slightly ahead of the US, but might be losing favor due to exposure to softer Japanese and Chinese economies, according to Gary Matuszak, global chair of KPMG’s Technology, Media and Telecommunications practice. Also, "significantly" fewer chip execs viewed China as a top-three hiring market in 2013; it’s still in first place, but the US and Europe are gaining favor.

— Consumer is king, redux. Consumer applications are officially the most important revenue driver, as viewed by the chip execs over the next fiscal year; computing now ranks third, behind wireless. "Unlike past recoveries, this one won’t be driven by wireless handsets and wireless communications alone," said Matuszak. Other revenue-driving apps — industrial, medical, automotive (with many sub-applications in body electronics, communications convergence, and safety), and power management (a big feature in wireless devices) — were emphasized by more chip execs in this year’s survey than in the past three years. That’s a clear indication how semiconductors have proliferated beyond traditional wireless and computing applications, such as mobile commerce and various automotive functionalities, added Ron Steger, global chair of KPMG’s Semiconductor practice. Also getting a big push from semi execs: "renewal energy" such as battery technologies, listed by 53% of execs as an important revenue driver over the next three years, up from just 36% a year ago.

Percentage of survey respondents who expect their company’s semiconductor-
related capital spending to increase over the next fiscal year. (Source: KPMG)

December 28, 2012 – Researchers in Japan have devised a microelectromechanical system (MEMS) fabrication technology using printing and injection molding, fabrication of large-area devices with low capital investment, without a vacuum process, and lower production costs. Thus, MEMS devices can be made and applied for fields where manufacturing cost has been an issue, such as lighting.

The team from the Research Center for Ubiquitous MEMS and Micro Engineering of the National Institute of Advanced Industrial Science and Technology (AIST) integrated microfabrication technology and MEMS design evaluation technology, and combined it with Design Tech Co. Ltd.’s signal processing technology to fabricate a lighting device.

Conventional commercial MEMS devices use fabrication techniques with semiconductor manufacturing systems used to produce integrated circuits, including vacuum processes. Resins could be used to form patterns onto moving microstructures but production costs are high due to vacuum-based processes. Also, it has proven difficult to form and thin MEMS structures such as springs and cantilevers because resins harden immediately after mold injection.

AIST researchers now say they have realized low-cost printing and transferred the structure using injection molding, and improved the mold structure to fill thin moving structures. A film for transferring the MEMS functional laser is formed, and the release layer and MEMS functional layer are printed onto the film with a screen or gravure printer. The printed film is aligned and put into an injection mold, into which is injected a molten resin that is cooled and solidified into the MEMS structure. The mold is then opened and the MEMS structure is separated from the film; the ink layers printed on the film are transferred to the MEMS structure.

Figure 1: MEMS fabrication processes by printing and injection molding.

The printed MEMS functional layers can be changed according to the desired purpose of the MEMS device — from acceleration sensors and gas sensors to power generation devices. This enables low-cost MEMS fabrication in fields where costs are currently too high. One example the AIST highlights is in light distribution control of LED lighting. MEMS mirrors produced with semiconductor manufacturing processes are based on costs determined by devices per wafer; so large-area mirrors are costly, while more cost-friendly micromirrors necessitate a more complex optical system. This new MEMS fabrication technology, though, could produce low-cost large MEMS devices (larger than several mm across), which opens the door for MEMS-based active light distribution control devices. Future work will seek to improve the symmetry of the MEMS mirror synchronization with the LED timing, and expand the range of the light distribution by improving the arrangement of the optical system, the signal processing, and the control circuit.

Figure 2: MEMS mirrors for active light distribution fabricated by using only printing and injection molding (left), and examples of the resulting light distribution patterns (right).

Injection molding can be used easily to form complex 3D objects such as spheres; the researchers expect MEMS devices will be formed on the surface of, or inside, 3D objects. Moreover, injection molding processes are commonly available in Japan, and systems cost less than semiconductor manufacturing systems. AIST projects its work will lead to MEMS fabrication coming out of non-semiconductor industries, such as plastics molding — and participation from these other sectors into MEMS manufacturing will help develop new applications for MEMS devices.

Figure 3: Examples of MEMS devices fabricated with the AIST technology. Top & middle: A reflective mirror and a mirror displacement sensor incorporated into a MEMS mirror device for lighting. A mirror ink for the reflective mirror, a conductive ink for the strain sensor, and a magnetic ink for driving the mirror are printed on the film, and then the printed ink patterns are transferred to the MEMS structure by injection molding. The MEMS mirror device for lighting did not break after more than 100 million operations driven by an external coil. Bottom: A MEMS device array can be fabricated using an arrayed MEMS pattern mold.

December 20, 2012 – Ultratech has acquired the assets of Cambridge Nanotech, a developer and supplier of atomic-layer deposition (ALD) technology with hundreds of installed systems in the field. Financial terms were not disclosed.

The company says adding the ALD technology will expand its nanotechnology and IP portfolio, enabling it to address new areas within the electronics industry and entry into new markets such as biomedical and energy. "By increasing our IP and expanding our nanotechnology portfolio to new levels, we expect to generate a new revenue stream in existing and new markets," stated Ultratech chairman/CEO Art Zafiropoulo.

Cambridge Nanotech was founded in 2003 by Jill Becker based on her Ph.D work in ALD at Harvard University. Weeks ago Cambridge Nanotech was quietly put up on the auction block; an announcement by Gerbsman Partners, the firm retained by the firm’s main backer Silicon Valley Bank, noted that the company had ceased operations on November 9 and that an auction would take place on Dec. 14. The firm indicated Cambridge Nanotech’s sales from 2004-2011 increased at a 84% CAGR (to $18.7M in 2011, according to a local report), with initial profitability after the first year but "lumpy" since then. "Recent working capital constraints and an overly leveraged balance sheet" were cited as the reasons for the decision to sell the company’s assets.

The asset sale includes several ALD product and technology lines, in place at academic and manufacturing environments for a range of electronics, MEMS/MOEMS, display/lighting, and energy applications:

– "Savannah" — R&D lab equipment
– "Fiji" — R&D lab equipment with plasma and additional
– "Phoenix" and "Tahiti" — Production equipment for high-volume manufacturing
– "Preboost" — To proliferate the use of more precursors in any ALD system
– "Roll2Roll" — Fast ALD; high throughput; atmospheric ALD

Canon U.S.A., Inc. recently launched the FPA-3030i5+ i-line stepper, designed for the manufacturing of LEDs, MEMS and power semiconductors. The FPA-3030 platform is an upgrade to earlier Canon “FPA-3000 platform” steppers.  The FPA-3030i5+ features an overhauled software structure and electrical control system that allow application of optional advanced hardware (e.g., projection lens, wafer stage, and alignment system) that is not compatible with traditional FPA-3000 platform steppers.

The FPA-3030i5+ is capable of providing imaging resolution below 0.35mm, while maintaining overlay accuracy of less than or equal to 40nm and throughput equal to or in excess of 104 wafers per hour. 

The FPA-3030 platform allows the use of optional equipment designed for the processing of silicon (Si), sapphire (Al2O3), silicon carbide (SiC) and a wide variety of wafer materials used in  environmentally conscious device manufacturing. Optional equipment for the FPA-3030i5+ includes warped-wafer handling systems to allow processing of distorted substrates, and advanced image processing systems for clear substrates.

With the purchase of the optional Multi-Size Wafer Kit, the FPA-3030i5+ stepper can also be configured to process multiple wafer sizes, and can be equipped with other optional equipment to help improve productivity and efficiency.

In an IC fab, cycle time is the time interval between when a lot is started and when it is completed. The benefits of shorter cycle time during volume production are well known: reduced capital costs associated with having less work in progress (WIP); reduced number of finished goods required as safety stock; reduced number of wafers affected by engineering change notices (ECNs); reduced inventory costs in case of a drop in demand; more flexibility to accept orders, including short turnaround orders; and shorter response time to customer demands. Additionally, during development and ramp, shorter cycle times accelerate end-of-line learning and can result in faster time to market for the first lots out the door.

Given all the benefits of reducing cycle time, it’s useful to consider how wafer defect inspection contributes to the situation. To begin with, the majority of lots do not accrue any cycle time associated with the inspection, since usually less than 25 percent of lots go through any given inspection point. For those that are inspected, cycle time is accrued by sending a lot over to the inspection tool, waiting until it’s available, inspecting the lot and then dispositioning the wafers. On the other hand, defect inspection can decrease variability in the lot arrival rate—thereby reducing cycle time.

Three of the most important factors used in calculating fab cycle time are variability, availability, and utilization. Of these, variability is by far the most important. If lots arrive at process tools at a constant rate, exactly equal to the processing time, then no lot will ever have to wait and the queue time will be identically zero. Other sources of variability affect cycle time, such as maintenance schedules and variability in processing time, but variability in the lot arrival rate tends to have the biggest impact on cycle time.

In the real world lots don’t arrive at a constant rate and one of the biggest sources of variability in the lot arrival rate is the dreaded WIP bubble—a huge bulge in inventory that moves slowly through the line like an over-fed snake. In the middle of a WIP bubble every lot just sits there, accruing cycle time, waiting for the next process tool to become available. Then it moves to the next process step where the same thing happens again until eventually the bubble dissipates. Sometimes WIP bubbles are a result of the natural ebb and flow of material as it moves through the line, but often they are the result of a temporary restriction in capacity at a particular process step (e.g., a long “tool down”).

When a defect excursion is discovered at a given inspection step, a fab may put down every process tool that the offending lot encountered, from the last inspection point where the defect count was known to be in control, to the current inspection step.  Each down process tool is then re-qualified until, through a process of elimination, the offending process tool is identified.

If the inspection points are close together, then there will be relatively few process tools put down and the WIP bubble will be small.  However, if the inspection points are far apart, not only will more tools be down, but each tool will be down for a longer period of time because it will take longer to find the problem.  The resulting WIP bubble can persist for weeks, as it often acts like a wave that reverberates back and forth through the line creating abnormally high cycle times for an extended period of time. 

Consider the two situations depicted in Figure 1 (below). The chart on the top represents a fab where the cycle time is relatively constant. In this case, increasing the number of wafer inspection steps in the process flow probably won’t help.  However, in the second situation (bottom), the cycle time is highly variable. Often this type of pattern is indicative of WIP bubbles.  Having more wafer inspection steps in the process flow both reduces the number of lots at risk, and may also help reduce the cycle time by smoothing out the lot arrival rate.

 

Because of its rich benefits, reducing cycle time is nearly always a value-added activity. However, reducing cycle time by eliminating inspection steps may be a short-sighted approach for three important reasons. First, only a small percentage of lots actually go through inspection points, so the cycle time improvement may be minimal. Second, the potential yield loss that results from having fewer inspection points typically has a much greater financial impact than that realized by shorter cycle time. Third, reducing the number of inspection points often increases the number and size of WIP bubbles. 

For further discussions on this topic, please explore the references listed at the end of the article, or contact the first author.

Doug Sutherland, Ph.D., is a principal scientist and Rebecca Howland, Ph.D., is a senior director in the corporate group at KLA-Tencor.

Check out other Process Watch articles: “The Dangerous Disappearing Defect,” “Skewing the Defect Pareto,” “Bigger and Better Wafers,” “Taming the Overlay Beast,” “A Clean, Well-Lighted Reticle,” “Breaking Parametric Correlation,” “Cycle Time’s Paradoxical Relationship to Yield,” and “The Gleam of Well-Polished Sapphire.”

References

1.       David W. Price and Doug Sutherland, “The Impact of Wafer Inspection on Fab Cycle Time,” Future Technology and Challenges Forum, SEMICON West, 2007.

2.       Peter Gaboury, “Equipment Process Time Variability: Cycle Time Impacts,” Future Fab International. Volume 11 (6/29/2001).  

3.       Fab-Time, Inc.  “Cycle Time Management for Wafer Fabs:  Technical Library and Tutorial.”

4.       W.J. Hopp and M.L. Spearman, “Factory Physics,” McGraw-Hill, 2001, p 325.

December 10, 2012 – Japanese consumer electronics giants Sony and Toshiba have shrugged off weak financial performances and increased their investments in new products to revitalize their businesses, notes IHS. Sony’s spending on semiconductors will rise about 5% in 2013 to $8.4B and will just barely increase in 2014 (0.1%), while Toshiba will spend about 2% more in 2013 (to $6.1B) and over 6% in 2014 ($6.5B). That’s in contrast to other major Japanese electronics OEMS — Panasonic and Sharp will both pull back their investments in the next two years.

"All the Japanese consumer electronics OEMs are struggling financially, prompting them to take measures to cut costs in order to shore up their profits," stated Myson Robles-Bruce, senior analyst for semiconductor spending and design activity at IHS. "But even in these grim circumstances, Sony and Toshiba remain optimistic about the future, and are taking steps to invest in innovative products."

Economic slowdown in various key global markets, lower demand in certain product segments, and increased competition from South Korea and China have weighed down Japan’s major consumer electronics manufacturers; all four aforementioned OEMs are projected to lose money this year on collectively -7% lower sales, IHS notes. Sony, for example, has issued bonds twice this year to raise funding (even as its credit rating plummeted), is eliminating up to 10,000 jobs in the current fiscal year, and selling off manufacturing plants and JVs. "The Japanese consumer electronics companies face a changed marketplace, due to the rising influence of Apple and other competitors that have redefined some of the product segments or else simply just taken away share in key areas," noted Robles-Bruce.

Nonetheless, Sony and Toshiba made splashes at CEATEC in October, Japan’s version of the big US Consumer Electronics Show (CES), he notes. Sony demo’d everything from smartphones and tablets to PCs, cameras, televisions, home networking, and storage equipment. Highlights included the Bravia 4K LCD TV and new hybrid PCs that can be used as either tablets or laptops. Toshiba, meanwhile, showed off its own 4K resolution TV, as well as ultrabooks and tablets. Products were on display in small, medium, and large screen sizes. It also introduced new REGZA HD TVs with built-in DVR capabilities.

Will these investments in new technologies and products pay off for the struggling Japanese OEMs? IHS sees a mixed bag: Sony’s sales are expected to rebound 3.7% in 2013, but Toshiba’s sales will slip another -1%, and declines are expected to continue at Panasonic and Sharp.

The real question, according to Robles-Bruce, is whether these persistent declines can be overcome or if they represent a long-term trend. "The Japanese consumer electronics companies face a changed marketplace, due to the rising influence of Apple and other competitors that have redefined some of the product segments or else simply just taken away share in key areas," he writes. "Based upon the current financial evidence, it appears as though total revenue for Sony might be higher for next year, although estimates for Toshiba actually show a slight decline."

  2012 2013 2014
Sony $7,979    $8,352 $8,363
Toshiba   $6,025 $6,148 $6,535

Net semiconductor spend forecast for Sony and Toshiba, in US $M. (Source: IHS iSuppli)

December 6, 2012 – KLA-Tencor says its new fourth-generation LED wafer inspection system achieves greater flexibility, increased throughput, and improved efficiency for inspecting defects and performing 2D metrology in LED applications, as well as MEMS and semiconductor wafers (up to 200mm).

The ICOS WI-2280, built on the company’s WI-22xx platform, supports handling of whole wafers in carriers and diced wafers in hoop ring or film frame carriers, to accommodate multiple media with minimal equipment changeover. An enhanced rule-based binning defect classification and recipe qualification engine enable faster yield learning during production ramps, and improved process control and process tool monitoring strategies. Highly flexible advanced optical modules with dedicated image processing enable high defect capture rate and recipe robustness against varying process background. A frontend-to-backend-of-line connectivity analysis capability — working in conjunction with the company’s Candela LED unpatterned wafer inspection system and Klarity LED automated analysis and defect data management system — delivers a single platform for defect source analysis.

"Increasingly, LED manufacturers are demanding improved detection and classification of yield relevant defects of interest, which enables them to take faster corrective actions to improve their yields at higher inspection throughput. There is also a growing need to boost productivity by enabling faster production recipe creation," stated Jeff Donnelly, group VP for growth and emerging markets at KLA-Tencor. The ICOS WI-2280 "ultimately enabl[es] LED manufacturers to achieve better lumens per watt and lumens per dollar performance."

In addition to LED manufacturing, the system can work in MEMS, semiconductor and compound semiconductor, and power device applications (wafers spanning 2-8 in.), the company says: backend-of-line and post-dicing outgoing quality control or binning; frontend-of-line patterned wafer inspection for baseline yield improvement, rework, excursion control, or overlay; and 2D surface inspection and metrology.

Energy-Efficiency Trends


December 4, 2012

Attribution: By gillyberlin (Flickr: Motorola Milestone Test) [CC-BY-2.0 (http://creativecommons.org/licenses/by/2.0)], via Wikimedia Commons

Demand for mobile functionality to achieve enhanced productivity, a better social-networking experience and improved multimedia quality continues to drive innovation in technologies that will deliver these objectives in an energy and cost-efficient manner. Subcommittee chair Stephen Kosonocky of AMD in Fort Collins, CO, writes on energy efficient digital trends of 2013, as well as another area of growing importance: energy harvesting. Read more.

IEDM 2012 slideshow: Go to First Slide >>>

Analog Trends


December 4, 2012

Subcommittee chair Bill Redman-White of NXP/Southhampton University in the United Kingdom discusses the global challenges facing analog circuit research. While the manipulation and storage of information is efficiently performed digitally, the conversion and storage of energy must fundamentally be performed with analog systems. As a result, the key technologies for power management are predominantly analog. Read more.

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RF Trends


December 4, 2012

The RF chips presented at ISSCC 2013 confirm that RF devices will continue to see larger levels of integration at the chip- and package- level for years to come.

This year has shown increased innovation, integration and technical maturity across RF frequency bands. ISSCC authors will present on an ongoing drive toward increasing levels of integration. This trend can be seen in all areas of RF design from mm-Wave, to cellular, to imaging, to wireless sensors. Subcommittee chair Andreia Cathelin of STMicroelectronics in Crolles, France discusses these trends. Read more.

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