Category Archives: Packaging

At the end of 2012, memory products and foundries accounted for a combined 54% of the IC industry’s installed monthly capacity of 14,497K wafers (200mm-equivalent wafers), according to data in IC Insights’ Global Wafer Capacity 2013 report (Figure 1).  Logic represented 12.4 percent, Microcomponents (MPU, MCU, DSP) represented 10.3 percent, and Analog devices accounted for 9.6 percent of capacity.  The “other” segment is comprised mainly of capacity used in the fabrication of optoelectronic, sensor, and discrete (O-S-D) devices as well as some R&D functions in fabs that are otherwise used primarily for the volume production of IC products.

 

Large-scale production of DRAM and flash memory helped drive installed capacity for all memory to 36.1 percent of installed capacity in December 2012, while the growing foundry segment represented 27.5 percent of capacity.  In terms of sales, virtually all pure-play foundry business is in the fabrication of logic and mixed-signal ICs. Memory product wafers accounted for only about one percent of total pure-play foundry sales in 2012.

Figure 2 shows that on a regional basis, capacity for analog products is fairly evenly distributed among Japan, Europe, and the Americas regions.  In memory, capacity is held mainly by South Korea, Taiwan, and Japan. The largest portion of logic capacity is located in Japan, with the Americas, South Korea, and Europe holding smaller, but still sizeable, shares.  The Americas region is tops in microcomponent capacity due mostly to high-volume MPU production from Intel.  In foundry, Taiwan is by far the largest shareholder of capacity having about 48 percent of the world’s capacity dedicated of foundry work.  China also has a large amount of foundry capacity, with SMIC being responsible for most of that.

SEMI honored 14 industry leaders for their outstanding accomplishments in developing standards for the microelectronics and related industries. The SEMI Standards awards were announced at a reception held during SEMICON West 2013.

The 2013 SEMI International Standards Excellence Award, inspired by Karel Urbanek, is the most prestigious award in the SEMI Standards Program. Yesterday, it was awarded to Dr. Larry Hartsough of UA Associates.  Hartsough has been actively involved in SEMI Standards for over 20 years, serving in a variety of leadership positions. With over 30 years’ experience in the industry in the areas of thin-film deposition, equipment design and plasma processing of materials, he was instrumental in the development of cluster tool and 300mm interface Standards for semiconductor equipment. Additionally, Hartsough’s expertise in patent litigation was invaluable in guiding the Physical Interfaces and Carriers Committee on intellectual property issues. Long-term, committed leaders like Hartsough provide continuity and excellence to the SEMI Standards Program. The Award recognizes the leadership of Karel Urbanek, a SEMI Board of Directors member who was a key figure in the successful globalization the Standards Program.

In addition, the recipients of four major North American SEMI Standards awards were announced:

The Merit Award recognizes Standards Program Member major contributions to the semiconductor, PV, and related industries through the SEMI Standards Program.  Award winners typically take on a very complex problem at the task force level, gain industry support, and drive the project to completion. This year, seven Program Members were presented with the Merit Award for their contributions to the semiconductor, PV, 3D-IC, and HB-LED industries: 

  • Contribution to the PV Industry: Existing SEMI test methods did not provide the ability to measure a broad range of trace elemental impurities in silicon feedstock for solar cells. Through the International PV Analytical Test Methods Task Force, Hugh Gotts (Air Liquide Electronics U.S.) led the development of SEMI PV49-0613, Test Method for the Measurement of Elemental Impurity Concentrations in Silicon Feedstock for Silicon Solar Cells by Bulk Digestion, Inductively Coupled-Plasma Mass Spectrometry.
  • Contribution to the HB-LED Industry: The 150mm sapphire wafers used for manufacturing HB-LED devices are thicker than standard silicon wafers used in the semiconductor industry— making it difficult to use the same cassettes and standards. SEMI HB-LED Equipment Automation Task Force leaders, Jeff Felipe (Entegris) and Daniel Babbs (Brooks Automation) led the development of SEMI HB2-0613, Specification for 150mm Open Plastic and Metal Wafer Cassettes Intended for Use for Manufacturing HB-LED Devices. This cassette standard also enables standardization of load ports and transport systems, resulting in both direct and indirect cost savings throughout the whole supply chain.
  • Contributions to the 3DS-IC Industry: Establishing common understanding and precise communication between stakeholders is important in any manufacturing supply chain, including 3DS-IC. North America 3DS-IC Inspection & Metrology Task Force leaders, David Read (NIST) and Victor Vartanian (SEMATECH), led the successful development of the first 3DS-IC standard published by SEMI, SEMI 3D1-0912: Terminology for Through Silicon Via Geometrical Metrology. It provides consistent terminology for metrology issues important to through silicon vias (TSV), including: pitch, top CD, top diameter, top area, and more. Read and Vartanian were also responsible for the successful development of two other 3DS-IC SEMI Standards — SEMI 3D4 (Bonded Wafer Stack Metrology) and SEMI 3D5 (TSV Metrology).
  • Ilona Schmidt (Corning) was the key developer of SEMI 3D2-0113, Specification for Glass Carrier Wafers for 3DS-IC Applications.  SEMI 3D2 describes dimensional, thermal, and wafer preparation characteristics for glass starting material that will be used as carrier wafers in a temporary bonded state.
  • Contribution to the Semiconductor Industry: Manufacturing equipment is complex, which makes it susceptible to operating errors due to electromagnetic interference (EMI).  SEMI E33 provides recommendations to help assure that manufacturing equipment will operate reliably without failures caused by electromagnetic interference (EMI).  This desired characteristic is generally known as electromagnetic compatibility (EMC). Last year SEMI E33 went through an extensive revision led by technical expert Vladimir Kraz (BestESD Technical Services).

The Leadership Award recognizes Program Members’ outstanding leadership in guiding the SEMI Standards Program.  Since the formation of the HB-LED Technical Committee in late 2010, Julie Chao (Silian Sapphire) and David Joyce (GT Advanced Technologies) have led the Wafer Task Force in defining the physical geometry of wafers used in HB-LED manufacturing.  Their efforts resulted in SEMI HB1-0113, Specifications for Sapphire Wafers Intended for Use for Manufacturing High Brightness-Light Emitting Diode Devices— SEMI’s first HB-LED standard. As task force leaders, Chao and Joyce fostered industry collaboration, travelling to global SEMI events and attracting new key stakeholders, ensuring global input and consensus.

The Honor Award, given to an individual who has demonstrated long-standing dedication to the advancement of SEMI Standards, recognized Richard Allen (NIST/SEMATECH). From his involvement in the Microlithography/Micropatterning Committee to his current leadership in the 3DS-IC and MEMS/NEMS Committees, Allen has been a long-standing and active participant in the SEMI Standards Program.  He joined the 3DS-IC committee shortly after it was formed in late 2010 as serves as committee chairman. He also leads the Bonded Wafer Stacks Task Force, Inspection & Metrology Task Force and Thin Wafer Handling Task Force). His contributions have been instrumental in the publication of four SEMI 3DS-IC Standards to date.

The Corporate Device Member Award recognizes the participation of the user community. This year, three Program Members were presented with the Corporate Device Member Award for their contributions to EHS and 3DS-IC. This year’s Corporate Device Member Awards were presented to Paul Schwab (Texas Instruments), Urmi Ray (Qualcomm), and Raghunandan Chaware (Xilinx).  The award is presented to individuals from device manufacturers.

As co-leader of the S8 Ergonomics Task Force, Paul Schwab (Texas Instruments) provided end-user perspective in the revision of SEMI S8, Safety Guideline for Ergonomics Engineering of Semiconductor Manufacturing Equipment. Schwab significantly improved the Supplier Ergonomics Success Criteria (SESC) checklist criteria, making the Document easier to use by the industry.

Another example of the importance of end-user input was in the development of SEMI’s third 3DS-IC Standard – SEMI 3D3-0613, Guide for Multiwafer Transport and Storage Containers for 300mm, Thin Silicon Wafers on Tape Frames. North America 3DS-IC Thin Wafer Handling Task Force Leaders Urmi Ray (Qualcomm) and Raghunandan Chaware (Xilinx) played integral roles in the development of SEMI 3D3-0613, providing vital end-user perspective for shipping thin wafers on tape frames so that they arrive undamaged at their final destination.

The SEMI Standards Program, established in 1973, covers all aspects of microelectronics process equipment and materials, from wafer manufacturing to test, assembly and packaging, in addition to the manufacture of photovoltaics, flat panel displays and micro-electromechanical systems (MEMS). Over 3,700 volunteers worldwide participate in the program, which is made up of 23 global technical committees. Visit www.semi.org/standards  for more information about SEMI Standards.

 

 

CEA-Leti and EV Group (EVG) have launched a three-year common lab to optimize temporary- and permanent-bonding technologies related to 3D TSV integration and all direct bonding heterostructures. 

The lab, which continues more than 10 years of collaboration between the two organizations, is focusing on hardware, software and process development.

“Temporary and permanent bonding equipment and process solutions are key product offerings for EVG,” said Markus Wimplinger, EVG’s corporate technology development and IP director. “This project leverages CEA-Leti’s global leadership in wafer-bonding research and EVG’s unparalleled expertise in developing wafer bonding equipment and process technology.”

“Like all common labs that Leti creates with its partners, this project is designed to produce specific, practical solutions that address current and future market requirements,” said Laurent Malier, CEA-Leti CEO. “This collaboration is targeting results that will make 3D TSV integration more efficient and cost effective and open new areas of wafer bonding using covalent bonding at room temperature.”

“Bringing these approaches to high-volume manufacturing with reliable wafer bonding requires innovative fabrication processes,” said Fabrice Geiger, head of Leti’s Silicon Technology division. “The new equipment and process technology developed within the common lab will allow exciting possibilities, especially for heterogeneous materials stacks, that require very low-temperature wafer bonding.”

Leti is an institute of CEA, a French research-and-technology organization with activities in energy, IT, healthcare, defence and security. Leti is focused on creating value and innovation through technology transfer to its industrial partners. It specializes in nanotechnologies and their applications, from wireless devices and systems, to biology, healthcare and photonics. NEMS and MEMS are at the core of its activities. CEA-Leti operates 8,000-m² of clean room space on 200mm and 300mm wafer platforms. It employs 1,700 scientists and engineers including 320 Ph.D. students and 200 assignees from partner companies. CEA-Leti owns more than 2,200 patent families.

EV Group (EVG) is a supplier of equipment and process solutions for the manufacture of semiconductors, microelectromechanical systems (MEMS), compound semiconductors, power devices, and nanotechnology devices.  Key products include wafer bonding, thin-wafer processing, lithography/nanoimprint lithography (NIL) and metrology equipment, as well as photoresist coaters, cleaners and inspection systems.  Founded in 1980, EV Group services and supports an elaborate network of global customers and partners all over the world.

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When Ajit Manocha, GlobalFoundries CEO, polled his audience during his keynote address on Tuesday at SEMICON West 2013, nearly 60 percent of the audience believed that the biggest challenge facing the semiconductor industry was the economy. However, during his presentation, Manocha seemed to suggest otherwise.

The technology business is booming, according to Manocha, who shared with SEMICON attendees that the mobile business is forecast to be double the size of the PC market in 2016. The mobile business drives many new requirements, said Manocha, including power, performance and features, higher data rates, high resolution multicore processors and thinner form factors.

This incredible growth is driving new dynamics, said Manocha, and pushing the industry to the new technology node each year, which is presenting the industry with what Manocha deems the Big Five Challenges. Manocha believes these challenges are: cost, device architectures, lithography and EUV, packaging and the 450mm wafer transition.

Cost, said Manocha, continues to be the underlying challenge of the entire industy, because, without focusing on wafer cost, even in good times, a company can enter into what he called “profitless prosperity.” Unfortunately, with the introduction of a new technology node each year, advanced technology costs are rapidly rising.

“Fab cost alone escalates 40 percent year after year,” said Manocha.

To keep wafer costs down, what Manocha believes the industry needs for success is a new foundry model altogether. His model, which he calls Foundry 2.0, hinges on industry collaboration rather than wafer price competition. By encouraging the industry to work together on products and meet the same goals, the industry can see a faster rate of change and tap into global R&D talent.

“The best solutions rarely originate from an insultated team,” he said. “It’s critical that we understand what customers need.”

SEMI recognizes GLOBALFOUNDRIES CEO

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SEMI forecasts semiconductor equipment sales will reach $43.98 billion in 2014, a 21 percent increase over estimated 2013 equipment spending, according to the mid-year edition of the SEMI Capital Equipment Forecast, released here today at the annual SEMICON West exposition.

Following two years of conservative capital investments by major chip manufacturers, semiconductor equipment spending is forecast to grow to $43.98 billion in 2014, up from $36.29 billion projected this year.  Key drivers for equipment spending are significant NAND Flash fab investments by Samsung in China and Toshiba/Sandisk in Japan, and investments by Intel, including its fabs in Ireland.  Most major regions of the world will see significant equipment spending increases.  Front-end wafer processing equipment will grow 24 percent in 2014 to $35.59 billion, up from $28.70 billion in 2013.  Test equipment and assembly and packaging equipment will also experience growth next year, rising to $3.18 billion (+6 percent) and $2.9 billion (+14 percent), respectively. The forecast indicates that next year will be the second largest spending year ever, surpassed only by $47.7 billion spent in 2000.

"Continued strong demand by consumers for smart phones and tablet computers is driving chip manufacturers to expand capacity for memory, logic and wireless devices,” said Denny McGuirk, president and CEO of SEMI. “To meet the pent-up demand for capacity, particularly for leading-edge devices, we expect capital spending to increase throughout the remainder of this year and continue through 2014 — to post one of the highest rates of global investment for semiconductor manufacturing ever.”

Growth is forecast in China (82 percent), Europe (79 percent), South Korea (31 percent), Japan (21 percent), North America (9 percent), and Taiwan (2 percent). Taiwan will continue to be the world’s largest spender with $10.62 billion estimated for 2014, followed by North America at $8.75 billion and Korea with $8.74 billion. The following results are given in terms of market size in billions of U.S. dollars and percentage growth over the prior year:

 

 

 

 

 

By Equipment Type

 

 

yr-over-yr

 

yr-over-yr

 

2012

2013F

%Chg

2014F

%Chg

Wafer Processing

28.15

28.70

1.9

35.59

24.0

Test

3.55

3.00

-15.5

3.18

6.0

Assembly & Packaging

3.08

2.55

-17.2

2.90

13.7

Other

2.15

2.04

-5.1

2.32

13.7

Total Equipment

36.93

36.29

-1.7

43.98

21.2

 

 

 

 

 

 

By Region

 

 

yr-over-yr

 

yr-over-yr

 

2012

2013F

%Chg

2014F

%Chg

Korea

8.67

6.69

-22.8

8.74

30.6

Taiwan

9.53

10.43

9.4

10.62

1.8

North America

8.15

8.04

-1.3

8.75

8.8

Japan

3.42

3.80

11.1

4.61

21.3

Europe

2.55

2.35

-7.8

4.21

79.1

China

2.50

2.81

12.4

5.11

81.9

Rest of World

2.10

2.17

3.3

1.94

-10.5

Total Equipment

36.93

36.29

-1.7

43.98

21.2

* Totals may not add due to rounding

 

 

 

 

Source: Equipment Market Data Subscription (EMDS), SEMI

 

Dow Corning announced Monday that it is among the newest member organizations to join imec, a leading research center for the advancement of nano-electronics. The announcement signals expanded opportunities for both organizations to combine their expertise toward the development and broader adoption of 3D integrated circuit (IC) packaging technologies, wherein IC chips are stacked in vertical 3D architectures.

“This move is a natural and strategic step for Dow Corning and imec, as we both believe collaborative innovation is as critical to industry leadership as native expertise,” said Andrew Ho, global industry director, Advanced Semiconductor Materials at Dow Corning. “Our access to imec’s world-class resources and expertise will not only help us further refine our unique temporary bonding solution, it will allow imec to leverage that solution to advance integration of the 3D IC packaging process that they’ve been developing for years.”

Yet, before 3D IC fabrication can see broader adoption, it will require innovative advances in materials and processing technologies.

One of the key challenges imec is tackling is the bonding of the device wafer to a carrier wafer, prior to wafer thinning, and the safe debonding of the thin wafer after completion of backside processing. This was Dow Corning’s goal when designing its Temporary Bonding Solution, aims at simple processing using a bi-layer concept comprising an adhesive and release layer. The technology also enables room-temperature bonding and debonding processes based on standard manufacturing methods.

Together with imec, Dow Corning will explore its temporary bonding CMOS-compatible solution for 3D Through-Silicon-Via (TSV) semiconductor packaging. The collaboration will aim to further expand the technology’s ability to achieve simple, cost-effective bonding-debonding techniques compatible with standard manufacturing processes.

“Imec’s precompetitive programs are an essential platform for industry leaders to share the risk and cost of advanced research. As one of the semiconductor industry’s most proven pioneers in advanced silicone-based solutions, Dow Corning brings valuable materials and processing expertise to imec’s global network of innovators – as well as a key enabling technology for TSV fabrication,” said Eric Beyne, program director 3D System Integration at imec. “We look forward to collaborating closely with our newest member organization as we drive the next stage of 3D integration, and help ensure compatiblity of the proposed thin wafer carrier solution with advanced, sub-10-nanometer CMOS device technologies.”

Imec exhibits at SEMICON West, July 9-11, 2013 at booth 1741, South hall.

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that it has achieved strong revenue growth and expanded its headcount for the first half of 2013.  The company attributes this success to continuing demand for its flexible process solutions designed to address high-volume manufacturing (HVM) needs across multiple markets–including 3D-ICs, MEMS, power devices and compound semiconductors.  EVG’s latest technology innovations that address these and other markets will be showcased this week at SEMICON West 2013 at the Moscone Convention Center in San Francisco.  In addition to unveiling a series of new solutions, EVG also reports that it continues to expand its wafer processing services and process development consultation capabilities worldwide as part of the company’s long-term growth strategy. 

"2013 has been a strong year for EV Group as we continue to invest in new technologies and capabilities to support our customers’ ability to ramp next-generation devices to volume production quickly and cost-effectively at high yields," said Dave Kirsch, vice president and general manager of EV Group North America.  "This requires not only leading-edge process equipment but also world-class global support and process development services. EVG’s local teams work hand in hand with our corporate headquarters to provide increased flexibility and capability for our customers.  That includes our ability to offer small-scale and pilot-production services at our global applications labs, which is a key differentiator for us and a key value proposition for customers."

Expanding sales growth and global customer support operations

During the first half of 2013, EVG achieved approximately 10 percent growth in sales and more than 10 percent increase in employees. To support its customers’ roadmaps, EVG continues to invest aggressively in research and development–approximately 20 percent of sales–in several key efforts, including 450-mm tool development. Among these efforts, EVG has invested in new state-of-the art cleanrooms and application labs with in-house process demo capability on fully automated systems at its corporate headquarters in Austria, as well as its regional headquarters in Japan and North America. 

VLSIresearch recently recognized EVG’s customer service and support, ranking it at one of the 10 Best Focused Suppliers in Chip Making Equipment. EVG was also ranked in first place in the "Other Silicon Wafer Fab Equipment" category for the company’s wafer bonding solutions. 

Leadership in wafer bonding

Already a leading supplier of HVM wafer bonding solutions, EVG recently unveiled several new platform developments in both fusion bonding and temporary bonding/debonding applications.  Yesterday, EVG unveiled the latest version of its EVG 40NT automated measurement system, which features improved specifications to achieve the highest wafer-to-wafer alignment accuracies needed for the production of next-generation 3-D integrated image sensors and stacked memory devices.  The EVG40NT is seamlessly integrated with EVG’s GEMINI FB automated production fusion bonding system to enable a closed-loop control system that facilitates customers’ ramp to volume production across multiple markets and applications.  Last week, EVG also introduced its LowTemp debonding platform, which features three high-volume-production room-temperature debonding process types and is supported by a supply chain of seven qualified adhesive suppliers to enable greater manufacturing flexibility.

Expertise in lithography and resist processing

Building upon the company’s expertise in lithography, EVG also recently unveiled the EVG120 automated resist processing system, which integrates spin/spray coating and wet processing to provide a highly flexible system that maximizes productivity and cost of ownership.  The EVG120 is ideally suited for a wide variety of markets and applications, including high-topography coating and spray coating for MEMS, thick-film resists and bumping for advanced packaging.  It is also suited for passivation, dielectrics and thick-film processing for compound semiconductor devices.

Rounding out EVG’s latest developments in wafer surface preparation, the company also recently announced the CoatsClean wafer cleaning solution, which combines process, equipment and formulation technology to deliver an innovative, low-cost-of-ownership approach to single-wafer photoresist and residue removal.  Co-developed with Dynaloy, CoatsClean is designed to address thick films and difficult-to-remove material layers for the 3D-IC/through-silicon via (TSV), advanced packaging, MEMS and compound semiconductor markets.

Presentations at SEMICON West 2013

Attendees interested in learning more about the company and its latest developments are invited to visit EVG’s booth #819 in the Moscone South Hall at SEMICON West as well as attend the company’s presentations during the show’s technical program.  Markus Wimplinger, corporate technology development and IP director of EVG, will present "High Resolution In-line Metrology Module for High-Volume Temporary Bonding Applications at the SEMATECH Workshop on 3D Interconnect Metrology on Wednesday, July 10 from 11:20 – 11:40 a.m. at the Marriott Marquis in San Francisco. In addition, Dr. Thorsten Matthias, business development director at EV Group, will present "From Sensor Fusion to System Fusion" at the TechXPOT session "MEMS and Sensor Packaging for the Internet of Things" on Thursday, July 11 from 12:10 – 12:30 p.m. in the Moscone North Hall.

Alchimer, S.A. today announced a collaboration with the French research institute CEA-Leti to evaluate and implement Alchimer’s wet deposition processes for 300mm high-volume manufacturing. The project will evaluate Alchimer’s Electrografting (eG) and Chemicalgrafting (cG) processes for isolation, barrier and seed layers. When combined, Alchimer’s wet deposition processes have been demonstrated to achieve 20:1 aspect ratio through silicon vias (TSVs) due to their ability to coat conformally regardless of via topography, diameter or depth.

3D integration is moving towards a "via middle" approach where TSVs are formed after front-end processes, but prior to stacking.  Several applications are in the development phase, leading to constraints and different specifications for TSVs. Alchimer’s technology shows the potential to break through existing barriers to achieve high aspect ratio TSVs. This collaboration will evaluate the potential of its technology and its suitability for high-volume manufacturing.

"Current techniques, such as PECVD isolation and iPVD metallization, have performance limitations that are limiting achievable TSVs to 10:1 aspect ratios," said Bruno Morel, CEO of Alchimer. "Our 3D TSV products have unequivocally demonstrated their ability to deliver 20:1 aspect ratios at a significantly reduced cost as compared to current approaches. Now it is critical to validate the products’ full potential for 300mm high-volume manufacturing as well as to study their compatibility with the overall 3D integration process. Leti’s leading 3D expertise and world-class infrastructure will allow us to do that.

"Collaborating with Alchimer fits perfectly our strategy of delivering innovative solutions to industry," added Fabrice Geiger, head of Leti’s Silicon Technology Division. "Alchimer’s eG technology is a promising, cost-effective and breakthrough solution to address the challenges of future 3D TSV integration. Through this collaboration, Alchimer will have access to Leti’s expertise in the domain of 3D TSV integration and its world-class 300mm 3D platform capabilities."

eG is based on surface chemistry formulations and processes. It is applied to conductive and semiconductive surfaces and enables self-oriented growth of thin coatings of various materials, initiated by in-situ chemical reactions between specific precursor molecules and the surface. This process achieves a combination of conformality, step coverage and purity that cannot be matched by dry processes.

SEMI today announced that Ajit Manocha, CEO of GLOBALFOUNDRIES, has been selected to receive the “SEMI Outstanding EHS Achievement Award — Inspired by Akira Inoue.” The Environment, Health and Safety (EHS) Award is sponsored by SEMI and will be presented on July 9 at 9:00am during the SEMICON West 2013 Opening Keynote and Ceremonies in San Francisco.

“We are pleased to present this award to Ajit Manocha for his outstanding contribution and commitment to EHS issues," said Denny McGuirk, president and CEO of SEMI.  “Ajit joins a distinguished group of semiconductor executives who have been honored by our industry for notable EHS achievement and leadership.”

“Excellence in Environment, Health and Safety is not only a mandate that we set for ourselves, but a fundamental expectation of our customers and the communities where we operate,” Manocha said. “Corporate responsibility is fundamental to our culture and our value proposition to our customers, the communities in which we live and do business, and our full range of global stakeholders.”

Manocha heads GLOBALFOUNDRIES Executive Stewards Council (ESC), the leadership forum for strategic direction and accountability for risk management, corporate responsibility and sustainability.  Manocha’s leadership has resulted in significant EHS achievements at GLOBALFOUNDRIES. Those cited by the Award committee in the selection of Manocha include:

  • Zero-Incident Safety Culture — GLOBALFOUNDRIES safety goal is to continually reduce all injuries and Manocha continually challenged the EHS and project management teams to achieve zero incidents. For example, Manocha ensured that there was a strong focus on safety metrics in the executive project reviews of the new Fab 8 in Malta, New York. GLOBALFOUNDRIES’ Singapore Fabs all received “Silver Awards” for Health and Safety presented by the Workplace Safety and Health Council and supported by the Singapore Ministry of Manpower.
  • Commitment to Eco-Efficiency in Foundry Operations — In 2012, GLOBALFOUNDRIES set corporate environmental goals to reduce GHG emissions 40 percent by 2015, electricity consumption 35 percent by 2015 and water consumption 10 percent by 2015, all normalized to a manufacturing index and compared to 2010.  Fab 8 incorporates multiple energy efficiency measures, waste heat recovery, and “idle mode” for abatement systems and vacuum pumps. Fab 1 in Dresden is powered by two energy-efficient tri-generation power plants that provide electricity, heating and cooling to fab operations, GLOBALFOUNDRIES’ Singapore utilizes reclaimed NEWater for incoming supply and achieved an energy reduction of 50 GWh in 2012, with a 2013 goal of a further 57 GWh reduction.
  • WSC Commitment to Best Practices for Perfluoro-Compound (PFC) Reduction — At the 2012 annual CEO meeting of the World Semiconductor Council (WSC), Manocha led the discussion of EHS topics, urging his fellow CEOs to take action to protect the environment, conserve resources, and achieve the WSC’s PFC reduction goal. GLOBALFOUNDRIES’ newest U.S. fab, Fab 8, meets the WSC Best Practice commitment for PFC emission reduction, and Fab 1 has incorporated best practices for PFC reduction since 1999.
  • WSC Commitment to a “Conflict-Free Supply Chain” — At the 2013 WSC meeting, Manocha  championed a “Conflict-free Supply Chain” policy to address concerns related to sourcing tantalum, tungsten, tin and gold from “conflict regions” of the Democratic Republic of Congo and adjoining countries. The WSC subsequently adopted such a policy. For its part, GLOBALFOUNDRIES has already met customer requests for “Tantalum Conflict-free” products in 2012.

In addition to receiving the EHS Award at SEMICON West, Manocha will deliver the Opening Keynote for the event on July 9 at 9:00am at Moscone Center (Esplanade Hall, Keynote Stage) in San Francisco, Calif.  For more information about SEMICON West — including registration and keynote attendance —   visit http://www.semiconwest.org.

The “Outstanding EHS Achievement Award — Inspired by Akira Inoue” is sponsored by the EHS Division of SEMI. The award is named after the late Akira Inoue, past president of Tokyo Electron Limited and a strong advocate of EHS. Inoue also served on the SEMI Board of Directors. The award recognizes individuals in industry and academia who have made significant contributions by exercising leadership or demonstrating innovation in the development of processes, products or materials that reduce EHS impacts during semiconductor manufacturing.

Past recipients of the SEMI EHS Akira Inoue Award include: Richard Templeton (president and CEO, Texas Instruments), Atsutoshi Nishida (president and CEO, Toshiba), Dr. Jong-Kap Kim (chairman and CEO, Hynix Semiconductor), Dr. Morris Chang (chairman and CEO, TSMC) and other prominent industry leaders.

 

 

Europe’s recently launched industrial strategy to reinforce micro- and nanoelectronics manufacturing is more than just a vision — it’s a major opportunity for equipment and material suppliers to participate to large-scale investment projects, increase their holding in key technologies and reach out to new customers and markets. Implementation is already underway: the first EU funding calls for projects will start at the latest in early 2014 and discussions are already underway on investment priorities.  The recent launch of five EU projects, worth over €700 Million and bringing together over 120 partners, around 30 percent of which are small and medium enterprises, is proof that Europe can put its “money where its mouth is.” So what should you be doing to join the 10/100/20 momentum?

10/100/20 in a nutshell

Dubbed the ‘10/100/20’ strategy, the EU initiative will see €10 billion worth of EU co-funded projects (public/private investment), coupled with €100 Euros investment by the industry with the goal of 20 percent of global chip manufacturing by 2020. The aim is to focus on Europe’s strengths, pool together EU, national and regional resources and invest in specific areas that can give Europe a competitive edge globally. EU investment will cover the entire semiconductor manufacturing supply chain, from research to design and device makers. Maintaining leadership in equipment and material supply is clearly stated as an objective of the EU’s strategy, as is the integration of small and medium enterprises (SMEs) in value chains and providing them access to state-of-the-art technologies and R&D&I facilities.

Why get involved, especially as a SME

A number of companies, and small and medium enterprises in particular, may shy away from EU projects, perceiving them to be too complex to access and placing too much of an administrative burden for little financial gain. But the true value of EU projects lies in the new network you have access to: a variety of companies across the supply chain, many of who will become your new customers, and access to state-of-the-art research facilities and technologies. Take the example of the five pilot lines recently launched with combined funding from the EU, national governments and partner companies under the ENIAC program:

The European 450 Equipment Demo Line (E450EDL) will support the equipment and materials industry in the 450mm wafer size transition. 43 partners from 11 European countries will develop and test lithography, front end equipment, metrology tools and wafer handling and automation equipment. The partners include the large European research centers and equipment and device manufacturers, as well as smaller companies. The demo line will provide a world-class research infrastructure to validate tools that remain at the manufacturers’ sites, thus giving suppliers access to state-of-the-art facilities and an opportunity to share the knowledge and financial burden of testing their products. The Lab4MEMS project will create the first European pilot line for innovative technologies on advanced piezoelectric and magnetic materials, including 3D packaging, offers SMEs and fabless companies a manufacturing route for their future projects that has been difficult to access so far.

Interested? So what’s next?

Now is the time to decide on the technology trends that you want your company to follow and start reaching out to your partners and customers. If you think your technology could give Europe a competitive edge and should be part of Europe’s investment strategy, then start talking about it, show its benefits and convince people that this is the way to go. In the case of EU projects, there is strength in numbers, so start talking to your customers and your suppliers, look at what others are doing, and see how you can fit into the technology and investment trends.

The EU pledge of €10 billion worth of public/private co-financed projects will be spent gradually in the form of regular EU funding calls, the first of which is expected by end 2013. The call will set the overall requirements for project ideas: what technologies the project should focus on, what parts of the value chain should be partners to the project, the estimated overall budget and duration of the project as well as the technical details for applying for EU funding.  By the time the call has been published, you should already have an idea of what it is you want to do, who you want to work with and how you can fit your idea into the investment priorities that will be announced.

How to get connected

If you are visiting SEMICON West in San Francisco, then mark your calendar for Wednesday, July 10. At 16:00/4:00pm there will be a presentation of the new 10/100/20 strategy for Europe at the TechXpot in South Hall. Join us to find out more about the new strategy, why it’s important and how to get involved.

Your next major opportunity to meet with the equipment and materials industry, learn about the latest technologies and discuss the EU strategy is SEMICON Europa 2013 (8-10 October, Dresden, Germany).  Our programs will cover each of the major projects, including 450mm wafer processing, power electronics, MEMS, FDSOI as well as advanced packaging including 3D and TSV technologies.  They will in one way or the other all address Europe’s 10/100/20 strategy. The SEMICON Europa Executive Summit will discuss implementation of the strategy and we are also organizing an EU funding workshop with hands-on advice about how to identify funding opportunities for your company and join EU projects.

For more information on SEMICON Europa, please visit: www.semiconeuropa.org. The event in Dresden will again be co-located with Plastic Electronics Europe. The conference and exhibition is the leading international technology-to-industry and industry-to-industry event focused on organic and large area electronics. It is the premium forum in its kind where professionals in the area and from around the world meet to present and to discuss progress of topics. For more information, please visit: www.plastic-electronics.org.