Category Archives: Semiconductors

last power logoLAST POWER, the European Union-sponsored program aimed at developing a cost-effective and reliable technology for power electronics, today announced its three-year program achievements.

Launched in April 2010 by the European Nanoelectronics Initiative Advisory Council (ENIAC) Joint Undertaking (JU), a public-private partnership in nanoelectronics, LAST POWER links private companies, universities and public research centers working in the field of wide bandgap semiconductors (SiC and GaN). The consortium members are STMicroelectronics (Italy), project coordinator, LPE/ETC (Italy), Institute for Microelectronics and Microsystems of the National Research Council -IMM-CNR (Italy), Foundation for Research & Technology-Hellas – FORTH (Greece), NOVASiC (France), Consorzio Catania Ricerche – CCR (Italy), Institute of High Pressure Physics – Unipress (Poland), Università della Calabria (Italy), SiCrystal (Germany), SEPS Technologies (Sweden), SenSiC (Sweden), Acreo (Sweden), Aristotle University of Thessaloniki – AUTH (Greece).

The main achievements in SiC-related efforts were based on the demonstration by SiCrystal of large-area 4H-SiC substrates, 150mm in diameter, with a cut-off angle of 2°-off axis. The material quality, both in crystal structure and surface roughness, is comparable with the standard 100mm 4°-off material available at the beginning of the project. At LPE/ETC, these substrates have been used for epitaxial growth of moderately doped epi-layers suitable for the fabrication of 600-1200V JBS (Junction Barrier Schottky) diodes and MOSFETs, owing to the development of a novel CVD reactor for the growth on large-area (150mm) 4H-SiC.

The quality of the epitaxial layer enabled the fabrication of JBS (Junction Barrier Schottky) diodes in the industrial production line at STMicroelectronics. The characterization of the first lots showed electrical performance comparable with the state-of-the-art 4°-off material. In this context, the fundamental technological step was the chemical mechanical polishing (CMP) process — StepSiC  reclamation and planarization — implemented at NOVASiC, which is a key issue both for the preparation of the substrates before epitaxial growth and for the sub-nanometric control of the surface roughness of the device active layers. Within the project, the same company also developed epitaxial growth capability for both MOSFET and JFET devices.

Additional research activities in SiO2/SiC interfaces have been carried out in collaboration with ST and IMM-CNR to improve the channel mobility in 4H-SiC MOSFETs.

Finally, novel technological modules for high-temperature 4H-SiC JFETs and MOSFETs have been developed in collaboration between Acreo and FORTH, with the support of CCR for the study of molding compounds and "lead-free" die-attach materials for reliable packaging solutions.

The LAST POWER project also researched the use of GaN-based devices in power-electronics applications. In particular, ST successfully obtained the development of AlGaN/GaN HEMTs epitaxial structures grown on 150mm Si substrates, reaching a target of 3mm thickness and 200V breakdown. LAST POWER worked with IMM-CNR, Unipress, and ST to develop the technological steps for normally-off AlGaN/GaN HEMTs with a "gold-free" approach. The process modules are fully compatible with the device-fabrication flow-chart set in the ST production line and are being integrated for HEMTs fabrication. The fruitful interaction between the project partners working on material growth and device technology has enabled important steps towards monolithic integration of GaN-based and SiC-based devices, as both technologies have been successfully proven on 2°-off axis 4H-SiC substrates.

Original equipment manufacturers (OEMs) are increasingly turning to electronics manufacturing service (EMS) providers to better handle the escalating volumes of electronic content in the medical industry. With opportunities for high-level product assembly and complete build projects expected to increase, the potential for EMS in the medical industry will progress gradually over the next few years

New analysis from Frost & Sullivan, “EMS Opportunities in the Medical Industry,” research finds that the market earned revenue of more than $16.43 billion in 2012 and estimates this to reach $34.38 billion in 2019.

 “The challenge in maintaining certified, state-of-the-art manufacturing facilities and complex supply chain operations is that it strains OEMs’ profit margins, compelling them to adopt EMS,” said Frost & Sullivan Electronics and Manufacturing Equipment Research Analyst Lavanya Rammohan. “EMS providers, with their exposure to various verticals, are the ideal solution to manage the electronics boom in healthcare brought about by the use of wireless communications, robotics and software.”

Rising demand for engineering support as well as improving EMS competencies in product introduction, manufacture design and value-add services will boost EMS growth in the medical industry.

However, despite EMS providers’ growing expertise, the risk of liabilities prevents OEMs from outsourcing several services. Stringent regulations place medical OEMs under huge scrutiny, thereby limiting their outsourcing to tactical operations, such as printed circuit board assembly and sub-system assembly.

Strict regulations also lengthen the outsourcing cycle, as OEMs are cautious in decision-making and favor EMS vendors with proven expertise. Manufacturers’ preference to retain intellectual property and strategic customer touch points reduces revenue possibilities for EMS dealers.

“EMS suppliers need to focus on developing strong relationships with original equipment manufacturers to build trust and capability, as OEM-EMS partnerships require long-term commitment in order for outsourcing to increase,” concluded Rammohan. “Service providers must be aware of industry trends, including financial models, long sales realization cycles, manufacturing challenges, supply chain complexities, certifications and audits, to offer all-round services.”

carbon nanotube UCRThe atom-sized world of carbon nanotubes holds great promise for a future demanding smaller and faster electronic components. Nanotubes are stronger than steel and smaller than any element of silicon-based electronics—the ubiquitous component of today’s electrical devices—and have better conductivity, which means they can potentially process information faster while using less energy.

The challenge has been figuring out how to incorporate all those great properties into useful electronic devices. A new discovery by four scientists at the University of California, Riverside has brought us closer to the goal. They discovered that by adding ionic liquid—a kind of liquid salt—they can modify the optical transparency of single-walled carbon nanotube films in a controlled pattern.

“It was a discovery, not something we were looking for,” said Robert Haddon, director of UC Riverside’s Center for Nanoscale Science and Engineering. Scientists Feihu Wang, Mikhail Itkis and Elena Bekyarova were looking at ways to improve the electrical behavior of carbon nanotubes, and as part of their research they also looked at whether they could modulate the transparency of the films. An article about their findings was published online in April in Nature Photonics.

The scientists spent some time trying to affect the optical properties of carbon nanotube films with an electric field, with little success, said Itkis, a research scientist at the Center for Nanoscale Science and Engineering.

“But when we applied a thin layer of an ionic liquid on top of the nanotube film we noticed that the change of transparency is amplified 100 times and that the change in transparency occurs in the vicinity of one of the electrodes, so we started studying what causes these drastic changes and how to create transparency in controlled patterns,” Itkis said.

An ionic liquid contains negative and positive ions which can interact with the nanotubes, dramatically influencing their ability to store an electrical charge. That increases or decreases their transparency, similar to the way that glasses darken in sunlight. By learning how to manipulate the transparency, scientists may be able to start incorporating nanotube films into products that now rely on slower or heavier components, such as metal oxide.

For instance, using nanotube films meshed with a film of ionic liquid, scientists could create more cost effective Smart Windows, that darken when it’s hot outside and become lighter when it’s cold.

“Smart Windows are a new industry that has been shown to save 50 percent of your energy costs,” said Itkis. “On a very hot day you can shade your window just by turning a switch, so you don’t have to use as much air conditioning. And on a winter day, you can make a window more transparent to let in more light.”

The scientists still need to study the economic viability of using nanotube film, but Bekyarova said one possible advantage would be that carbon nanotubes are ultra thin—about 1,000 times smaller than a single strand of hair—so you would need very little to cover a large area, such as the windows of a large building.

Itkis said nanotube films also hold great promise in building lighter and more compact analytical instruments such as spectrometers, which are used to analyze the properties of light.

In this application, a nanotube film with an array of electrodes can be used as an electrically configurable diffraction grating for an infrared spectrometer, allowing the wavelength of light to be scanned without moving parts.

Furthermore, by using addressable electrodes, the spatial pattern of the induced transparency in the nanotube film can be modified in a controlled way and used as an electrically configurable optical media for storage and transfer of information via patterns of light.

Carbon nanotubes have great potential, but there is still plenty of work to be done to make them useful in electronics and optoelectronics, Haddon said.

“The challenge is to harness their outstanding properties,” he said.  “They won’t be available at Home Depot next week, but there is continuing progress in the field.”

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing and design, announced that worldwide sales of semiconductors reached $23.48 billion for the month of March 2013, an increase of 1.1 percent from the previous month when sales were $23.23 billion. Global sales for March 2013 were 0.9 percent higher than the March 2012 total of $23.28 billion, and total sales through the first quarter of 2013 were 0.9 percent higher than sales from the first quarter of 2012. All monthly sales numbers represent a three-month moving average.  

“Through the first quarter of 2013, the global semiconductor industry has seen modest but consistent growth compared to last year,” said Brian Toohey, president and CEO, Semiconductor Industry Association. “Sales have increased across most end product categories, with memory showing the strongest growth. With recent indications that companies could be set to replenish inventories, we are hopeful that growth will continue in the months ahead. Regionally, the Americas slipped slightly in March after a strong start to the year, but Asia Pacific and Europe have seen impressive growth recently.” 

Year-over-year sales increased in Asia Pacific (6.9 percent) and Europe (0.7 percent), but decreased slightly in the Americas (-1.5 percent) and sharply in Japan (-18 percent), reflecting in part the devaluation of the Japanese yen. Sales in Europe increased by 5.7 percent compared to the previous month, the region’s largest sequential monthly increase since March 2010.  Sales also increased from the previous month in Asia Pacific (1.7 percent), but fell in Japan (-1.6 percent) and the Americas (-1.9 percent).

NeoPhotonics Corporation, a designer and manufacturer of photonic integrated circuit-based optoelectronic modules and subsystems, today announced the opening of a sales and R&D office in Moscow and servicing the Russian Federation and the broader eastern European market.

“We are pleased to make this commitment to our customers and technology partners in the region, and to build on the growing demand in the region for advanced telecommunications and enterprise data solutions,” said Tim Jenks, chairman and CEO of NeoPhotonics. “Together with our expanded sales force serving the region, this is the next step in our local business development activities including a greater research presence and the potential for production of advanced PIC-based solutions.”

As noted in last year’s announcement, NeoPhotonics completed a private placement investment with the Russian sovereign fund investor, RUSNANO.

NeoPhotonics is a designer and manufacturer of photonic integrated circuit, or PIC, based optoelectronic modules and subsystems for bandwidth-intensive, high-speed communications networks. NeoPhotonics maintains headquarters in San Jose, California and engineering and manufacturing facilities in Silicon Valley (USA), Japan and China.

Chip Memory Technology Inc. (CMT), a new embedded memory technology developer, has emerged from stealth mode to reveal company details and its latest product.

CMT’s LogicFlash boasts a unique solution for embedded NVM. Designed for implementation in industry standard CMOS logic processes, LogicFlash requires no extra foundry steps or extra mask layers. This radically reduces the expense and delay required to qualify and port chip designs that use LogicFlash to new foundries or new processes. CMT says Chrontel Inc., a provider of video ICs to the global computer and display markets, is currently incorporating LogicFlash into devices being produced in a 130nm standard logic process.

“Chrontel’s high-volume applications demand integrated NVM solutions that offer clear benefits in cost, yield and manufacturability,” explained Chrontel CEO and president Dr. David Soo. “LogicFlash offers us advantages that are not available with other embedded NVM technologies.”

Patented technology supports high densities

In development for several years, LogicFlash was designed to overcome the challenges facing embedded NVM production. Competing embedded NVM technologies require as many as 10 additional masks and 20 to 30 additional process steps when implemented on a standard logic process. By eliminating the requirement for extra masks and process steps, LogicFlash is highly portable and scalable, while supporting densities up to 4Mbit.

CMT holds four granted and two pending patents on its LogicFlash technology. Already qualified in five processes and three process nodes–at 180nm, 160nm and 130nm–multiple customers are currently in volume production with LogicFlash utilizing three different foundries.

“We are pleased to offer our latest technology to Chrontel, a company whose products are used in high-volume by computing and display manufacturers worldwide,” said CMT founder and CEO, Dr. Wingyu Leung. “By utilizing standard logic processes without modification, LogicFlash offers customers like Chrontel the ultimate in supply chain flexibility, scalability and low-cost.”

CMT was founded by several leading chip industry executives that collectively hold more than 150 patents. Dr. Leung, founder and CEO, has served as a senior technology executive, most recently as Executive Vice President, CTO and board member at MoSys.

CEA-Leti said today that Europe is strongly positioned to design and manufacture volume silicon photonics devices because of the success of the recently completed HELIOS program. The €8.5 million European Commission project developed a complete design and fabrication supply chain for integrating a photonic layer with a CMOS circuit, using microelectronics fabrication processes.

HELIOS, which was coordinated by Leti, also demonstrated a complete design flow, integrating both silicon photonics device design and electronic/photonic system design in an EDA-compatible framework.

“It is strategically important for Europe to maintain photonic chip-design and chip-integrating functions to compete with other countries and to encourage innovation by European microelectronics companies,” said Leti CEO Laurent Malier. “HELIOS’s success in creating the essential building blocks for integrating photonics with CMOS circuits and making the process available to a variety of users underscores the key role that broad European technological cooperation plays in a very competitive global business environment.”

Thomas Skordas, head of the EC’s photonics unit, said HELIOS has shown the large potential silicon photonics has in many different applications, such as data communications.

“The technology roadmap of silicon photonics becomes clearer now. Europe will have to move fast to become competitive in this new field,” Skordas said. “Strategies for the industrialisation of silicon photonics are currently being discussed in the context of Horizon 2020, the EU’s new framework program for research and innovation for 2014-2020."

Silicon photonics is seen as key to developing optical telecommunications or for optical interconnects in microelectronic circuits, because of the cost advantages of integrating photonic and electronic functions on the same chip. CMOS photonics may lead to low-cost solutions for a range of applications such as optical communications, optical interconnections between semiconductor chips and circuit boards, optical signal processing, optical sensing, and biological applications.

Launched by the European Commission in 2008, HELIOS focused on developing essential building blocks like efficient optical sources (silicon-based and heterogeneous integration of III-V on silicon), integrated lasers, high-speed modulators and photo-detectors. The project, which had 20 members, also combined and packaged these building blocks to demonstrate complex functions that address a variety of industrial needs.

These include a 10Gb/s modulator integrated with an electronic BiCMOS driver, a 16×10 Gb/s transceiver for WDM-PON applications, a photonic QAM-10Gb/s wireless transmission system and a mixed analog-and-digital transceiver module for multi-function antennas.

The building blocks also led to results exceeding the original specifications, positioning the partners at the leading edge in their fields:

  • High-performance passive devices were obtained and introduced in the demonstrators (rib/strip waveguides transitions with less than 0.2dB losses, grating couplers with 1.6dB losses, inverted taper couplers with 1dB losses, AWG and micro-ring based de-multiplexers).
  • The wafer-level integration of laser by III-V/Si bonding led to the demonstration of single-mode operation with 3dBm output power, 30dB SMSR, Ith < 35mA in CW.
  • 40G carrier depletion Si modulators were demonstrated in MZI, Ring, slow wave, interdigitated modulators configuration.
  • An integrated tunable laser–Mach-Zehnder modulator working at 10Gb/s.

The work of the HELIOS consortium led to more than 170 publications and communications in peer-review journals and international conferences.

 

Studying 1/f noise


May 13, 2013

Welcome to the first of what I expect will be many blogs from ProPlus Design Solutions. While our name may be new to readers of Solid State Technology, we are known by the foundries as their supplier of device modeling software. We’re expanding our product portfolio and our industry presence, and a key reason why we jumped at the chance to blog for SST.

The topic of this blog is on-wafer measurement for flicker noise, a.k.a., 1/f noise, an engineering challenge I’ve been studying for more than 10 years, motivated by the needs of wafer fabs and circuit designs. 1/f noise is an important characteristic for various semiconductor devices, such as MOSFETs, BJTs, JFETs, Diode, and IC resistors. Not only does it directly impact the circuit performance of modern ICs, but it has been used also as an important technique to characterize the manufacturing process quality.

In recent years, on-wafer noise measurement has been done more often in massive volume by many of the foundries. SPICE models are built, often with statistical corners, to enable circuit designers to accurately analyze the impact of noise on circuit performance, especially for RF, low noise, and highly sensitive devices. However, accurately measuring flicker noise at the wafer level is challenging and time consuming, mostly due to the noisy probing environment, accurate DC bias requirement, and complicated cable connections. This creates a strong need to improve wafer-level noise measurement systems and methods to validate noise data.

Noise is a figure of merit for semiconductor process quality and characteristics impacting circuit performance today. Just like so many areas in our industry, process technologies at 28nm and beyond are calling for new tools and methodologies or significant improvement to existing tools. Noise data indicates how good the oxide and interface layers are. From it, fab process engineers can evaluate the related process quality and variations, and modeling engineers can build noise models. Then, circuit designers can simulate the impact of 1/f noise variation on analog or RF designs, or how the increasing RTS at advanced nodes reduces SRAM design margins.

Advanced wafer fabs use 7*24 1/f noise measurement data to assess process quality with the decades old 9812B wafer-level, 1/f noise measurement system. While it may be the industry’s de facto standard, it’s showing its age.

Circuit designers worry about variation effects at leading-edge process nodes, increasing the need for statistical noise models. Generating statistical noise models requires massive amounts of data collection at low frequencies. In some circumstances, when the 1/f noise corner frequency is high of greater than 1MHz, designers are expecting to see noise data at higher frequencies.

However, in a noise measurement system, there is a trade-off between system resolution and frequency bandwidth. In fact, in most commercial systems with only voltage LNAs, measuring MOSFET noise at frequencies higher than 1MHz on the wafer level, especially in the weak inversion region that is critical to analog designs, is practically impossible due to system gain roll-off.

Accuracy is a key requirement for on-wafer noise measurement. Noise is statistical in nature, and usually its magnitude is in the pA range. Measuring such a signal for devices on-wafer is challenging, especially when considering different device types at different bias conditions. The measurement accuracy relates to many factors, such as the system capability, measurement instruments, cables and environment. 

With all the new challenges and requirements discussed above, I’m advocating mothballing 9812B with a faster and more accurate system able to provide more accurate data collection in the range of 1Hz to 10MHz. This next-generation low-frequency 1/f noise measurement system is able to measure low-frequency noise characteristics of on-wafer or packaged semiconductor devices, including MOSFETs, SOI/FinFET, BJT/HBT, JFETs, TFT, diodes and diffusion resistors.

On-wafer noise is a fascinating subject and one I enjoy talking about. I also manage a talented R&D team at ProPlus that has built 9812D, the latest generation wafer-level, 1/f noise measurement system, a product we introduced earlier this year.

I’m hosting a 60-minute webinar May 14 titled, “Accurate and Efficient Wideband On-wafer Flicker (1/f) Noise Measurement.” Of course, I’ll talk about 9812D, but it will be a discussion on noise issues at 28nm and below nodes. The webinar is open to anyone interested in the topic, including academics, engineers and engineering managers who want to improve on-wafer noise measurement quality. For more information or to register, go to: http://tiny.cc/vcmdww.

Teledyne Technologies Incorporated announced today that its subsidiary, Teledyne DALSA B.V., has acquired Axiom IC B.V., a fabless semiconductor company that develops high-performance CMOS mixed-signal integrated circuits. Terms of the transaction were not disclosed.

Located in Enschede, the Netherlands, Axiom IC was founded in 2007 and is a spin-off from the University of Twente. Axiom IC’s customers include global companies in a number of industries, including space systems, wireless communications, automotive and medical technologies. Axiom has delivered design breakthroughs including high speed, high resolution analog to digital converters and advanced audio signal processing chips.

“The acquisition of Axiom adds an innovative team of skilled engineers to Teledyne,” said Robert Mehrabian, chairman, president and chief executive officer of Teledyne. “While continuing to serve external customers, Axiom will provide additional resources to benefit both our digital imaging and electronic test & measurement instrumentation businesses.”

“The Axiom team will further enhance our ability to bring to our customers innovative and highly differentiated CMOS-based image sensor and camera products,” said Brian Doody, chief executive officer of Teledyne DALSA, Inc. “Axiom’s unique mixed-signal design expertise and experience represent a valuable strengthening of our design capabilities across the company, complementing our existing expertise in CMOS image sensor design, high voltage driver chips for MEMS, and embedded software development.”

Teledyne Technologies is a provider of sophisticated instrumentation, digital imaging products and software, aerospace and defense electronics, and engineered systems. Teledyne Technologies’ operations are primarily located in the United States, Canada, the United Kingdom and Mexico.

TowerJazz, the global specialty foundry leader, today announced collaboration with TLi (Technology Leaders and Innovators), a fabless company that designs non-memory integrated circuits (ICs) focused on timing controllers and driver ICs on TFT-LCD panel modules. TLI says they have developed an acceleration sensor control IC and proximity illumination sensor IC based on TowerJazz’s 0.18um CMOS technology, which enables TLi to provide local offerings to mobile phone suppliers in Korea where the market leaders are located.

As of 2012, the worldwide mobile phone market was 1.7 billion dollar and 43 percent of this was attributed to smartphones with acceleration sensor control ICs and proximity and illumination sensor ICs. The portion of smartphones with these ICs is expected to grow steadily, and TLi is targeting this fast growing market with two of its products utilizing TowerJazz’s process. A mass production is expected to start in Q3, 2013.

The acceleration sensor market is mostly dominated by a few major foreign companies, however in January of this year, TLi succeeded in developing an acceleration sensor control IC and a proximity illumination sensor IC in Korea. These products are the first released from the very close collaboration between TowerJazz and TLi. By utilizing the advanced features of TowerJazz’s 0.18um CMOS process, TLi realized accurate modeling as well as flash memory without mask adder for its acceleration sensor control IC and succeeded in realizing the sensing block without expensive color filtering for its proximity illumination sensor IC.

"We have been very pleased with our collaboration on these exciting products which has enabled us to provide local offerings to Korean mobile phone suppliers that are expected to be the most cost effective solutions in this market. This is the result of our close discussions with TowerJazz to utilize the advanced features of their 0.18 CMOS process. Also, these products showed full functionality from first silicon," said Soonwon Hong, vice president of TLi.

"Korea is an important region for technical and manufacturing innovation and we are very excited to work with a leading-edge partner such as TLi to enable localization of their specialized sensor ICs," said Michael Song, VP of Sales and president of TowerJazz Korea. "TLi has trusted us to co-develop and bring to market their latest products and we are pleased with the progress we have made in this region which is home to many leading semiconductor companies."