Category Archives: Semiconductors

Several years ago when the challenges to 450mm wafer processing, EUV development and novel transistor designs were first being discussed, SEMI commissioned a study that predicted the industry could face an R&D funding gap that could exceed $9 billion if current technology and economic trends continue. At the time, SEMI issued a statement saying the industry was at a “crossroads” and “without significant attention to the R&D gap, the semiconductor equipment and materials industry will not be able to afford to keep up with Moore’s Law.”

technology forum

Much has happened since that report was issued: 450mm development was delayed, but now is ramping at G450C; Intel, Samsung and TSMC have invested over one billion dollars in ASML; cost targets have been missed at 28nm; and 3D-ICs have emerged as an alternative development path for leading-edge chip solutions.  But the R&D challenges remain.   The industry has responded in unexpected and unique ways, including new funding models, new consortia programs, increasing joint development agreements, and other mechanisms.  How R&D processes and strategies have evolved, and will probably continue to evolve, will be the subject of several programs at SEMICON West.

The most significant trend in R&D in the industry, and increasingly important to the supply chain, is the growth and changing role of R&D consortia.  Not long ago, the top research organizations served the advanced research needs of IDMs.  Today, equipment and material suppliers, EDA software providers, fabless chip companies, and other diverse organizations participate in consortia initiatives.  In the near future, there may be increasing involvement from system companies like Apple, Cisco, and Google.  Along with changes in participation, the types of research conducted by consortia have also evolved, many directly involving component and subsystem suppliers. Today, there are consortia that specialize in key areas like wafer size transition and lithography, but also many of their programs seem to overlap, potentially creating inefficiencies and redundancies in R&D efforts that consortia were supposed to eliminate.

Many of these issues will be discussed in a special executive panel on semiconductor R&D at SEMICON West.  On Wednesday, July 10, I will be joined on stage by Daniel Armbrust, president and CEO of SEMATECH; Michael Liehr, executive VP at CNSE; Dr. Laurent Malier, CEO of CEA-Leti; and Dr. Luc Van den hove, president and CEO of imec to discuss the critical trends and developments in R&D and how they will affect SEMI members.  We will discuss the important role of consortia and what’s new at their organizations, but also share our perspectives on the changing role of the R&D engineer and scientist in the industry today.  Increasingly, R&D is becoming more about managing complex multi-organization processes and innovation platforms than it is about pure research looking for the next “ah-ha” discovery.

Another critical R&D issue is the changing innovation pipeline delivered by technology start-ups.  In the past, the industry enjoyed a healthy ecosystem of emerging companies funded by venture capital that were ripe candidates for merger and acquisition.  Today, VC venture funding in the semiconductor industry is down nearly 50 percent from 2009 levels.  To help address this problem, SEMICON West will feature the first Silicon Innovation Forum (SIF) focused on new and emerging companies in the industry.  Organized by Applied Ventures, Dow Chemical Company, Intel Capital, Micron Ventures, TEL Venture Capital, and Samsung Ventures, SIF is designed to bridge funding gaps for new and early-stage companies by providing a platform to showcase new ideas to potential partners and investors.  SIF will consist of an open conference program on July 9 which is free to all SEMICON West attendees, followed by a reception and showcase for qualified investors.

The International Technology Roadmap for Semiconductors (ITRS) has been a critical component in the R&D planning process and SEMICON West will again feature presentations and discussions on the latest version.  The ITRS is undergoing a major change this year to reflect the market evolution towards highly-flexible mobile devices. Presentations include topics on system drivers, design, modeling and simulation, process integration, devices, and structures (PIDS), lithography, front-end processes (FEP), and emerging research devices (ERD). Back-end-of-line working groups will present challenges for future interconnects — such as through silicon vias (TSVs); the latest roadmaps for semiconductor assembly; systems packaging applications, “More than Moore,” and the testing considerations for these quickly changing technologies.  They will also discuss roadmap developments in micro-electro-mechanical systems (MEMS) and radio frequency and analog/mixed-signal technologies (RFAMS).  Look for these report-out sessions on the SEMICON West TechXpots on Thursday, July 11.

Other critical R&D topics that will be discussed at the SEMICON TechXPOT sessions are the latest developments in  lithography, processing requirements for non-planar transistors, 450mm wafer processing, advanced materials, and nano-defect metrology.  Unlike a conference with a variety of academic and special-interest topics, the SEMICON TechXPOT sessions quickly and succinctly provide the latest news and status from leading experts in the field, including “in the know” executives from organizations like ASML, Intel, GF, SEMATECH, G450C, ASE, ST Microelectronics and many more. In addition to their public presentations, TechXPOT speakers often make themselves readily available, providing suppliers and other stakeholders critical information on technology requirements and opportunities.

R&D engineers and scientists remain one of the most important audiences at SEMICON West.  Through private meetings with their top customers and suppliers, and through TechXPOT and other programs that deliver the latest developments in key areas of industry development, we think SEMICON West provides the most cost-effective and time-efficient value in the industry.  I hope you can join us.

For more information on SEMICON West and to register, visit www.semiconwest.org (free registration ends on May 10)

Glass is everywhere: from MEMS, CMOS image sensors and power to memory, logic IC and microfluidics

Glass is widely used in everyday life and found in large quantities in many industries, such as flat panel display applications. Over the last few years, glass has gained considerable interest from the semiconductor industry due to its very attractive electrical, physical and chemical properties, as well as its prospects for a relevant and cost-efficient solution. The application scope of glass substrates in the semiconductor field is broad and highly diversified.

The demand for glass is growing, and glass has already been adapted for various and unique wafer-processing functionalities and platforms supporting a wide range of end-applications. For example, WLCapping is driven mainly by MEMS and CMOS image sensors. In the coming years, the availability of other glass functionalities such as 3D TGV/2.5 D interposer in conjunction with end-applications like memory and logic IC will be the driving force for growth, creating new challenges and new technical developments along the way.

Mainly driven by the wafer-level packaging industry, the glass wafer market is expected to grow from $158 million in 2012 to $1.3B by 2018, at a CAGR of ~41 percent over the next five years

“Initially driven by CMOS image sensor and MEMS applications, this growing industry will be supported by relevant end-applications such as LED, memory and logic IC, where glass is on its way to being commercialized. In terms of wafers shipped, a 4x glass wafer growth is expected in the semiconductor industry over the next five years, achieving more than 15 million 8 inch equivalent wafer starts per year by 2018,” explains Amandine Pizzagalli, market and technology analyst, Equipment & Materials Manufacturing, at Yole Développement.

Glass substrate: a key enabler of various functionalities in the semiconductor field

The glass WLCapping platform is a mature functionality already adopted with significant volume in CMOS Image Sensors, where more than 3.3 million glass caps were shipped in 2012. This market is expected to grow slowly, with a CAGR of 14 percent from 2012-2018, mainly supported by MEMS devices impacted by the request for further miniaturization. On the flip side, the glass market for WLOptics will likely decline from 2015-2018 due to the development of competing technologies.

All of this said, we expect to see strong growth in the glass market, mainly supported by two emerging WLP platforms: with a CAGR of 110 percent and 70 percent respectively, the glass-type 2.5D interposer emerging platform and the carrier wafer will be glass’s fastest-growing fields over the next five years, since glass offers the best value proposition in terms of cost, flexibility, mechanical rigidity and surface flatness.

If glass is qualified for 2.5D interposer functionality, the glass market could exceed $1B revenue by 2018. However, it’s still unclear how BEOL wafer fabs will choose glass over the current silicon technology used for logic IC applications (for the 2.5D/3D SOC and system partitioning areas), but the glass variety of 2.5D interposer substrates is expected to significantly impact future glass wafer demand, and it’s obvious that the 2.5D glass interposer will attract many newcomers.

The use of glass interposers in packaging will certainly be on the HVM roadmap within a few years.

glass wafer market

Glass substrate: The top five players hold almost 80 percent of the market

In the semiconductor industry, the glass substrate market is split amongst five main suppliers. Schott (G), Tecnisco (JP), PlanOptik (G), Bullen (US) and Corning (US) will share more than 70 percent $158M glass substrate market this year, driven mainly by demand for WLCapping.

In the midst of this growing market, semiconductor glass suppliers are trying to differentiate themselves by proposing a variety of glass substrate material properties with a good CTE, solid thermal properties and no polishing/grinding steps required, which would result in reduced costs.

Many glass substrate suppliers such as AGC, Corning and HOYA are expected to increase their business in the next few years since they are quite aggressive in 2.5D interposers and glass carrier wafers, and are expected to ramp-up into high volume production. Since the big players are already deeply entrenched in the glass market, it will be very challenging for a new entrant to break through in the foreseeable future.

PC shipments fall, post worst quarter on recordIn another sign of the worldwide shift in preferred personal devices, PC shipments posted the steepest decline ever in a single quarter, according to the International Data Corporation Worldwide Quarterly PC Tracker (IDC).

Worldwide PC shipments totaled 76.3 million units in the first quarter of 2013, down -13.9 percent compared to the same quarter in 2012 and worse than the forecast decline of -7.7 percent, according to the IDC. Despite some mild improvements in the economic environment, PC shipments were down significantly across all regions compared to a year ago, marking the worst quarter reported since IDC began tracking the PC market in 1994. The results also marked the fourth consecutive quarter of year-on-year shipment declines.

The reduction in shipments isn’t entirely shocking, given the obvious cannibalization from tablets and smartphones. Smartphones shipments are expected to continue their historic rise at a rate of 24 percent CAGR from 2011 to 2016, according to Andy Oberst, Strategic Vice President of Qualcomm, and PC makers are collectively bracing for the change, as other indicators have risen throughout the past year. DRAM content growth is reported slowing, as slim notebooks have limited space for it, and tablets and smartphones have no use for it at all. Instead, its low-power variant, mobile DRAM, is seeing an increase. Additionally, the chip market outlook was downgraded in 2012, with the weak PC market mostly to blame.

"Although the reduction in shipments was not a surprise, the magnitude of the contraction is both surprising and worrisome," said David Daoud, IDC Research Director, Personal Computing. "The industry is going through a critical crossroads, and strategic choices will have to be made as to how to compete with the proliferation of alternative devices and remain relevant to the consumer. Vendors will have to revisit their organizational structures and go to market strategies, as well as their supply chain, distribution, and product portfolios in the face of shrinking demand and looming consolidation."

PC makers had pinned their hopes on the launch of Microsoft’s Windows 8 OS, which is a complete overhaul of the operating system with touch-screen capabilities. Unfortunately, these new shipment trends are indicating that the upgraded operating system has not had the desired effect on consumers.

Bob O’Donnell, IDC Program Vice President, believes it is clear that Windows 8 not only failed to provide a positive boost, but also appears to have slowed the market.

"While some consumers appreciate the new form factors and touch capabilities of Windows 8, the radical changes to the UI, removal of the familiar Start button, and the costs associated with touch have made PCs a less attractive alternative to dedicated tablets and other competitive devices,” said O’Donnell. “Microsoft will have to make some very tough decisions moving forward if it wants to help reinvigorate the PC market."

Microsoft, at least in public, does not appear to be on the verge of making tough decisions at the moment, however. A Microsoft spokesperson told the Wall Street Journal that, along with their partners, they planned “to continue to bring even more innovation to market across tablets and PCs.”

Increased spending in NAND and flash by Micron, LEDs by Philips and Osram, and continued investments by GLOBALFOUNDRIES will create new opportunities for equipment and materials suppliers in Southeast Asia. These trends will be explored at the upcoming SEMICON Singapore 2013, which will take place May 7-9 at the Marina Bay Sands Expo and Convention Center. With a focus on new technologies and products for advanced IC packaging, test, and fab efficiency, as well as in new application areas including LEDs and MEMS, the event capitalizes on Southeast Asia’s strong contribution to the global semiconductor market.

For the Southeast Asia region, capital equipment investment will see some pickup in the second half of 2013, followed by a strong recovery in 2014. Overall front-end fab equipment spending is expected to double next year from $810 million in 2013 to $1.62 billion in 2014. Foundry and memory are the two major sectors that invest most in the region. The GLOBALFOUNDRIES expansion plan at Fab 7 will be completed by mid-2014 while UMC continues to upgrade their Fab 12i capacity to 40nm process.

The Southeast Asia region’s capacity growth for front-end fabs shows two percent increase this year and an expectation of  higher growth, eight percent, in 2014, exceeding overall global capacity growth of five percent according to the SEMI World Fab Forecast.  The growth will mainly be driven by memory sector, specifically from NAND flash capacity as Micron gears up for further expansion at its Singapore NAND flash facility next year plus ongoing capacity conversion from DRAM to NAND flash at Fab 7 (Tech). Singapore is emerging to become the third largest NAND flash manufacturing country in the world by the end of 2014.  The conversion and the expansion projects will drive related semiconductor investment in the region in 2013 and 2014.     

For the assembly and test sector, Southeast Asia has long been the focal point of the industry with a large installed capacity from both IDMs and OSATs.  This position contributes to the region being the largest packaging materials consumption market in the world, representing a market size of $6.6 billion in 2013 and $6.8 billion in 2014. The region’s back-end equipment investment remain significant with over $1 billion spending each year throughout 2012 to 2014, accounting for about 17 percent of worldwide share according to SEMI’s WWSEMS.

Aside from manufacturing capacity, Southeast Asia region is now extending its value proposition to IC design and R&D areas with more joint development projects between multi-national corporations (MNC) and local institutes. SEMI expects to see a more robust semiconductor ecosystem arise from the region as a result of these endeavors and as companies seek ready access to customers throughout Asia-Pacific and South Asia.

Currently, Singapore has 14 wafer fabrication plants, including the world’s top three wafer foundries.  Singapore also has 20 semiconductor assembly and test operations, including three of the world’s top six outsourced assembly and test companies. There are about 40 IC design centers, which comprise nine of the world’s “top 10” fabless IC design companies.

SEMICON Singapore, in its 20th year, will feature over 40 programs and forums to highlight the industry’s major technology trends, and investment and expansion opportunities in manufacturing.  Forum themes include: Market Trends Briefing, Lithography Technology, Assembly Packaging Technology, 2.5D/3D-IC, LED Manufacturing Technology, Product Test, and MEMS.  Attendees can save up to 30 percent on programs by registering before April 15.

Other special programs include a job fair, a SEMICON University Program, and both an OEM Sourcing Program ad a Suppliers Search Program. These programs demonstrate SEMI Singapore’s commitment to connecting the global semiconductor manufacturers to Singapore-based resources and professions.

Natcore Technology Inc. announced major strides in advancing its black silicon solar cells to commercial levels of efficiency and, as part of its development process, has discovered that its technology could finally provide a low-cost selective emitter application.

Natcore’s initial black silicon solar cells, the first full-size black silicon cells produced using a low-cost, scalable manufacturing process, had efficiencies of approximately 1 percent, as compared with average efficiencies for commercial cells of approximately 17 percent.

Through refinement of its in-lab production process, and despite the lack of a key piece of equipment, Natcore’s technical staff has been able to achieve efficiencies as high as 14.7 percent.

These results have been achieved without an adequate diffusion furnace to control phosphorus diffusion into the solar cells’ silicon surfaces. Natcore has now obtained and installed a fully capable diffusion furnace, with commissioning of this crucial piece of equipment having begun the week of April 1, 2013. The company’s technical staff is confident that this diffusion furnace will allow for significant improvements in the efficiencies of its black silicon cells.

Importantly, Natcore’s staff has discovered that its proprietary liquid phase deposition (LPD) may make a low-cost selective emitter application available to the solar industry. Selective emitter technology is a long-sought enhancement to solar cells in which the regions under a cell’s front contacts are heavily doped to improve the electrical connection, while the remaining emitter surface is lightly doped to promote better efficiency.

Selective emitter applications have been proven to significantly increase solar cell efficiencies, but a low-cost, highly scalable process has remained elusive to industry. Theoretically, Natcore’s LPD process could make this achievable, and early results from experiments using the company’s newly installed diffusion furnace have been very encouraging.

Because of these positive results, Natcore is now rapidly moving to protect its selective emitter intellectual property, and is in the process of filing provisional patents.

"The solar industry has been clamoring for a selective emitter application that is cost-effective because of its demonstrated improvement to cell efficiencies," notes Natcore’s CEO, Chuck Provini. "In fact, once Dr. Daniele Margadonna joined our Science Advisory Board and learned of our plans to install a new diffusion furnace, he immediately urged us to simultaneously pursue a selective emitter approach. I’m pleased to say that we were very quickly able to demonstrate the efficacy of our technology toward this crucial and valuable application."

Natcore’s black silicon and selective emitter applications are not mutually exclusive; in fact, they are synergistic. Indeed, the envisioned production process would allow both of these important improvements to be seamlessly inserted into a solar cell manufacturing line.

"Combining Natcore’s black silicon technology with our groundbreaking selective emitter technology could raise today’s commercial solar cell efficiencies to new high levels, while still lowering the cost per watt," says Natcore’s Chief Technology Officer, Dr. Dennis Flood. "Solar cell manufacturers are aggressively seeking easy-to-implement production steps that will improve their product and profitability without having to raise their prices. Natcore’s combination of selective emitter and black silicon technologies promises to do just that."

Samsung has begun mass producing a 128-gigabit (Gb), 3-bit multi-level-cell (MLC) NAND memory chip using 10 nanometer (nm)-class process technology this month. This chip will enable high-density memory solutions such as embedded NAND storage and solid state drives (SSDs).

“By introducing next-generation memory storage products like the 128Gb NAND chip, Samsung is extremely well situated to meet growing global customer needs,” said Young-Hyun Jun, executive vice president, memory sales & marketing, Device Solutions Division, Samsung Electronics. “The new chip is a critical product in the evolution of NAND flash, one whose timely production will enable us to increase our competitiveness in the high density memory storage market.”

Samsung’s 128Gb NAND flash is based on a 3-bit multi-level-cell design and 10nm-class process technology, which means a process technology node somewhere between 10 and 20 nanometers. It boasts the industry’s highest density as well as the highest performance level of 400 megabits-per-second (mbps) data transfer rate based on the toggle DDR 2.0 interface.

Utilizing 128Gb NAND flash memory, Samsung intends to expand its supply of 128-gigabyte (GB) memory cards, which can store as many as sixteen 8GB full HD video files. Samsung said they now will also increase their production volume of SSDs with densities over 500GBs for wider adoption of SSDs in computer systems, while leading the transition of main storage drives in the notebook market from hard disk drives (HDDs) to SSDs.

Demand for high-performance 3-bit MLC NAND flash and 128Gb high storage capacities has been rapidly increasing, driving the adoption of SSDs with more than 250GB data storage, led by the Samsung SSD 840 Series.

Samsung started production of 10nm-class 64Gb MLC NAND flash memory in November last year, and in less than five months, has added the new 128Gb NAND flash to its wide range of high-density memory storage offerings. The new 128Gb chip also extends Samsung’s 3-bit NAND memory line-up along with the 20nm-class 64Gb 3-bit NAND flash chip that Samsung introduced in 2010. Further, the new 128Gb 3-bit MLC NAND chip offers more than twice the productivity of a 20nm-class 64Gb MLC NAND chip.

NikkoIA announces the production of several innovative organic image sensors, confirming the potential of its technology, and validates the technology building blocks that can be immediately implemented to build its product lines.

NikkoIA’s technology consists in depositing thin films of photosensitive organic materials onto active or passive reading substrates. Current products are mainly based on TFT backplanes on glass, with a sensitivity optimized in the visible and/or 700/900nm spectrum range. The first evaluation cameras based on these sensors have already been shipped to the company customers.

CMOS VGA organic image sensor
CMOS VGA organic image sensor

NikkoIA announces the application of its organic imaging technology to two new product families: 1. X-ray sensitive image sensors, based on 256×256, 98μm-pixels organic image sensors, coupled with a CsI scintillator optimized for 70-90keV energy; 2. VGA CMOS sensors with 15μm-pixels based on organic photodiodes and CMOS pixel arrays.

“The extension of the sensitivity to the X-rays range and the application of NikkoIA’s technology to various types of substrates (TFT or CMOS) enables, in the very short term, the production of large area visible, IR or X-rays image sensors at an extremely competitive cost structure compared to existing technologies, as well as the production of CMOS image sensors sensitive in the infrared beyond the cut-off wavelength of the silicon,” said Alain Jutant, President of NikkoIA SAS.

These developments especially enable the production of image sensors immediately interesting for dental radiography and some security applications. They also enable other combinations such as the production of small size, high resolution, SWIR-sensitive CMOS image sensors at a very low cost structure, opening up new imaging solutions in the medical or automotive markets.

“These milestones reinforce our technology potential and validate our development strategy. They represent significant achievements that can now be implemented in products dedicated to our target markets,” Alain Jutant added.

NikkoIA has a unique position in the market thanks to its worldwide and exclusive license agreement with Siemens AG, granting access to a strong intellectual property protected by several key patents. The company carries on its developments by the sensitivity extension beyond 1300nm while developing at the same time the first products dedicated to its target markets.

organic image sensors
Organic image sensors sensitive to X-rays, visible and near infrared spectrum ranges.

Picosun Oy, an Atomic Layer Deposition (ALD) equipment manufacturer, reports that its PICOPLATFORM 300 ALD cluster tool has been selected by a key customer in Asia for new memory applications. The 300mm cluster design is based on the company’s fully automated, multifunctional PICOPLATFORM ALD deposition unit for parallel, simultaneous execution of several different processes for high-k and metal/metal nitride films.

The first models of the PICOPLATFORM ALD cluster tool entered the market the year 2008 and since then, this revolutionary versatile and efficient multi-chamber thin film processing system has gained praise from customers across the world.

 The fully automated PICOPLATFORM 300 ALD cluster unit is comprised of several individual PICOSUN P-series high throughput ALD reactors, capable of single wafer or batch processes. As all features in PICOSUN ALD tools, the control and automation software has been optimized to guarantee the ultimately simple, intuitive and user-friendly operation and programming of the tool. In addition to ALD reactors, also other thin film deposition units, pre- or post-treatment equipment or integrated substrate handling systems for complete cassette-to-cassette loading of wafers can be incorporated into the same PICOPLATFORM 300 ALD unit.

"PICOPLATFORM ALD cluster system design is solely based on the requirements of ALD, and thus provides distinct advantages over competing products. Realization of easy, cost-effective and clean production is the key for building successful ALD solutions for new memory applications. We are extremely proud and honored to be selected as the technology provider for the next generation of ALD-enabled memories," said Dr. Wei-Min Li, CEO of Picosun Asia.

Picosun Oy is a Finland-based, globally operating manufacturer of state-of-the-art ALD systems, representing continuity to almost four decades of pioneering, exclusive and groundbreaking ALD reactor design and manufacturing. Today, PICOSUN ALD systems are in daily production use in numerous prominent industries across the globe.

 Electro Scientific Industries, Inc. today announced it had signed a definitive agreement to acquire the Semiconductor Systems business of GSI Group, Inc., a supplier of precision photonics, laser-based solutions and precision motion devices to the medical, industrial, scientific, and electronics markets. Based in Bedford, Massachusetts, the Semiconductor Systems business provides products in laser marking and trimming of semiconductor wafers and hybrid circuits. The parties expect the transaction to close within thirty days.

Both ESI and Semiconductor Systems have decades of laser-based wafer processing experience. The Semiconductor Systems’ wafer marking products are positioned to capitalize on the industry-wide transition to 450mm wafer diameters and are complementary to ESI’s commitment to enabling 3D semiconductor packaging.

This acquisition will add approximately $20-30 million of annual revenue to ESI. It is expected to add $0.05 to $0.10 to non-GAAP earnings per share in the first year.

“The GSI Semiconductor Systems business is an excellent operational fit with ESI. The business brings a strong technical team, broadens our revenue base with our semi customers, and strengthens our Semiconductor Division,” stated Nick Konidaris, CEO of ESI. “With complementary capabilities but almost no product overlap, this acquisition broadens our product portfolio and allows ESI to provide a more complete set of laser-based manufacturing solutions to our semiconductor customers.”

“We are pleased to complete this transaction, which ultimately enables GSI to focus our growth investments on our OEM component businesses,” said John Roush, CEO of GSI. “We believe this outcome is the best result for customers, employees and shareholders of both companies. The GSI team will work closely with our counterparts at ESI to ensure a smooth transition of ownership of the Semiconductor Systems business.”

ESI is a leading supplier of innovative, laser-based manufacturing solutions for the microtechnology industry. Their focus is on developing the precise structuring of micron to submicron features in electronic devices, semiconductors, LEDs and other high-value components. Founded in 1944, ESI is headquartered in Portland, Ore., with global operations from the Pacific Northwest to the Pacific Rim.

Advanced Micro-Fabrication Equipment Inc. (AMEC) said today that it has developed a Single-Station Chamber Advanced Dielectric Etcher (SSC AD-RIE) capable of processing the most rigorous semiconductor applications. In less than 12 months, the Primo SSC AD-RIE system was qualified by a leading Korean semiconductor manufacturer for critical Flash applications at 20nm and below. The customer has since placed an order for the tool and is now qualifying it for 15nm applications. The new etcher embodies the innovations contained in AMEC’s dual-station chamber Primo D-RIE etch platform which is already well entrenched in leading memory and logic fabs across Asia.

The technology achievement marks an inflection point for AMEC—China’s largest provider of capital equipment for global manufacturers of semiconductors and LEDs. With operations and R&D centered in Shanghai, and global sales and marketing in Singapore, the company is led by a team of semiconductor equipment experts from Silicon Valley and Asia.

The extreme challenges of dry etching at 20nm and below has virtually excluded small etch players from the vendor pool, allowing just a few companies to dominate. The Primo SSC AD-RIE changes that dynamic and offers the industry an alternative new choice. AMEC is now preparing to engage in wafer demonstration runs. The company is also working with select customers on 15nm Flash memory and VNAND process development.

To support its Korean customers and further expand business in the region, AMEC Korea will establish a local Research and Development center this year.

AMEC Chairman and CEO Gerald Z. Yin paid tribute to the Korean customer for its close collaboration. Such collaboration is essential for the development of advanced technology that solves difficult technical problems. He added, “AMEC recognizes the importance of investing in a local hub to provide exceptional service to our Korean customers. With this in mind, we are accelerating our Korean localization plan and boosting it with elements that include intellectual property protection, as well as onsite product enhancement initiatives and responsive field support.”

Commenting further on AMEC’s localization strategy for Korea, KI Yoon, General Manager for Korea, added, “We’re diligently developing local supply sources and seeking reliable collaboration partners not just for Korea, but for the global market as well. This will enable us to provide supply pathways to Korean customers with fabs in Korea who are also constructing fabs in China. On the technology front, we continue to innovate solutions to address the technical priorities of our Korean customers and others worldwide. This includes development of a third-generation CCP oxide etcher and ICP etcher, as well as 450mm product lines.”

AMEC is a provider of advanced process technology to global manufacturers of semiconductors and LEDs. The company is a supplier of dielectric and TSV etch tools, focused on memory and logic devices at process nodes as low as 20nm. Today, more than 200 AMEC etch stations are positioned at leading-edge fabs across Asia.