Category Archives: Semiconductors

January 3, 2012 – Active matrix OLED (AMOLED) displays will continue to encroach upon LCD technology through small and medium-sized (9-in. and smaller) displays used in mobile phones, according to recent analysis by NPD DisplaySearch.

Total OLED display shipments are expected to reach 191 million in 2012, accounting for 8.4% of total small/medium displays. AMOLEDs will make up 6% all by themselves, having driven total OLED penetration into this market segment since 2010 and the launch of Samsung’s Galaxy S phone, according to Yoonsung Chung, director, large-area displays & FPD materials for NPD DisplaySearch. Mobile phones continue to drive the OLED adoption, with mobile phone applications expected to make up 69% of the small/medium OLED market in 2012 and growing to 83% in 2015.

OLED penetration in small and medium display shipments by technology. (Source: NPD DisplaySearch)

Mass adoption of AMOLED technology, though, faces hurdles due to the higher cost and technical difficulty of manufacturing — successful entry takes five years on average, according to the firm. "Prior to the start of mass production of AMOLED displays for mobile phones, only passive-matrix OLED (PMOLED) displays were available, mostly used in applications such as mobile phone sub-displays, automobile displays, and some industrial and niche applications," Chung stated.

Samsung produces nearly all AMOLED displays today, but more players will be needed to continue to push the technology’s adoption — and indeed new panel makers will emerge in 2013 from Taiwan and China, Chung forecasts. He also predicts demand for "OLED applications for smartphones, amusement devices, digital still cameras, and home appliances."

Small/medium OLED display shipments by application. (Source: NPD DisplaySearch)

By Dr. Howard Ko, Senior Vice President and General Manager, Silicon Engineering Group, Synopsys, Inc.

Nowadays, the mention of 3-D scaling in a semiconductor context conjures up images of the increasingly popular FinFET devices used in advanced logic processes or the stacking of multiple die in a 3D-IC. Yet there are a variety of developments in another type of 3-D scaling that are likely to have a similarly large impact on semiconductors in the near future – 3-D devices for NAND flash.

Whenever we communicate with our mobile phones, catch up on the latest news in our tablet computers, or snap those memorable holiday family photos with our digital cameras, we are relying on an indispensable semiconductor technology: the NAND flash memory. Over the past two decades, NAND flash memory has become one of the linchpins of the semiconductor market with revenues of approximately $21B in 2012 according to iSuppli. As in other semiconductor technologies, NAND flash evolution has been driven by density, performance and cost improvements. And as in planar CMOS logic, NAND flash technology has been progressively scaled to smaller feature sizes, becoming the process leader in driving the smallest line-widths in manufacturing as evidenced by the current 1x-nm (~19-nm) process node. Yet, despite plans to scale down to the 1y-nm (~15-nm) and possibly 1z-nm (~13-nm) nodes, the traditional planar floating gate NAND flash architecture is approaching the scaling limit, prompting the search for new device architectures.  Not to be upstaged by the planar to 3-D (FinFET) transition in logic devices, NAND flash has embarked on its own 3-D scaling program, whereby the stacking of bit cells allows continuous cost-per-bit scaling while relaxing the lateral feature size scaling.

A number of 3-D NAND flash options have emerged: pipe-shaped bit cost scalable (P-BiCS); terabit cell array transistor (TCAT); vertical-stacked array transistor (VSAT); and vertical gate (VG) NAND. All of these share a common attribute: they are fabricated by depositing polysilicon on oxide to form a thin body for the cell channel, with a sidewall oxide-nitride-oxide stack serving as the charge-trapping storage element.  3-D NAND memories are complex structures with unique challenges such as the granular composition of the polysilicon channel, which introduces variability. To support 3-D NAND development, Sentaurus TCAD is used by industry leaders to analyze the impact of polysilicon grains and their boundaries on the electrical performance of the cell.  The use of TCAD has provided important insights into the physics of operation of these memory cells and has been instrumental in optimizing the process and cell design to improve performance and reliability, thereby matching its role in the early exploration and optimization of the better known 3-D logic counterpart, the FinFET.

 

By Randhir Thakur, Vice President and General Manager, Silicon Systems Group, Applied Materials

Mobility is the biggest influence shaping the semiconductor industry and is the main driver of chip development. Smartphone sales are expected to surpass 700 million units growing at a 50% growth rate year over year and demand for tablets is set to exceed 110 million units growing at an 85% rate year over year. The race to manufacture chips for the surging mobile markets is driving the industry to explore new materials and technologies to enable essential breakthroughs for higher, more power-efficient performance.  For the PC market, we will see the advent of Ultrabooks and the new Windows 8 operating system – both of which can spur a technology upgrade cycle and drive growth.

Multiple inflections will figure prominently in 2013. Among these, we see the Foundry transition to 20-nanometer process technology node as a significant milestone. 20-nanometer is all about building advanced transistors that can deliver low leakage, low power and high performance in a smaller footprint.  To achieve this combination of performance and energy efficiency, chip makers must adopt high k metal gate transistors which could deliver a 20 percent savings in power consumption while offering a 15% increase in speed.  Further leakage and speed performance improvements at 20nm and below will be gained from FinFET transistors.  Beyond advances to the transistor, we expect major inflections in lower resistance interconnects, advanced patterning, packaging, and 3D NAND flash technology. 

We’ve never seen in this level of change in the industry or this pace of manufacturing process development. Innovations in new semiconductor materials, manufacturing processes and other technologies will be needed to support these inflections that each pose critical challenges. Unprecedented precision engineering will be needed to manufacture chips features measured in nanometers.  At these dimensions every atom counts and controlling variability is vital to meet performance and productivity targets. Also pivotal in enabling future chips will be new classes of materials with superior properties that can be used in a broad range of process applications.

With demand for new forms of consumer electronics and new methods of computing driving the pace of innovations, we’re going to see more changes in the next five years than we’ve seen in last 15.  These innovations will require major research and development efforts and very early and close collaboration across the industry.

By Richard Gottscho, Ph.D., EVP – Global Products, Lam Research Corporation

The semiconductor industry is evolving and facing unprecedented technology and economic hurdles. Limits imposed by planar technology and a stalled lithography roadmap threaten to slow down the rate at which density, cost, and speed improvements can be made. As this industry has shown before, however, there is more than one way to skin a cat. FinFET devices offer superior speed at lower power consumption. 3D NAND enables bit scaling of flash memory without the need of lithography roadmap extension. Multiple patterning extends the lithography roadmap. Through-silicon via (TSV) technology brings increased density, lower power consumption, and faster computing to mobile applications. But, these inflection technologies have their own set of challenges.

FinFETs are challenging to etch because the 3D topography requires long over-etching to clear corners; etching selectivity becomes of paramount importance. Atomic-scale precision is required across not only the wafer, but also from wafer-to-wafer and from fab-to-fab. Etch costs increase for all these reasons. FinFET metal gates have high-aspect-ratio features that must be filled without voids with thin, conformal, low-resistivity diffusion barriers using atomic-layer deposition.

3D NAND is formed by first depositing alternating layers of insulators and conductors, then etching through those layers to create a 3D array of interconnected transistors. The layers are best etched non-selectively while maintaining high selectivity to the mask. Deposited films must be atomically uniform in smoothness and thickness. Long process times and atomic-scale precision in both deposition and etching drive cost.

Multi-patterning relies on etching and deposition extensively to fabricate high-density masks. To preserve the high-resolution, high-aspect-ratio pattern, films must be mechanically strong with 100 percent step coverage. Costly long process times and atomic-scale precision are yet again required.

One cost challenge in fabricating TSVs results from etching slowed by high-aspect ratios while needing to minimize sidewall roughness. After the via is etched, atomic-layer deposition of conformal and void-free liners and barriers is performed to enable bulk plating of copper interconnects. Cost is still inhibiting growth of the TSV market.

While solutions are available to extend Moore’s Law, these solutions come at considerable increases in cost and complexity. As it has in the past, this industry will find more innovative solutions to overcome the challenges of inflection.

By Paul Lindner, Executive Technology Director, EV Group

A city’s skyline is a testament to the transformative power of technology—skyscrapers made possible only by the Bessemer steel manufacturing process introduced in the 19th century.  Now in the 21st century, the world is undergoing another major transformation, as new MEMS and 3D semiconductor manufacturing processes create the building blocks for the Internet of Things. Being able to build higher gave birth to the modern city, while being able to connect not just people, but all manner of devices, promises to be just as big a reorganization of society. Similar to skyscrapers and the Bessemer process, the infrastructure of the Internet of Things is being enabled by new low-cost, high- volume manufacturing processes.

Today, sensors are not a new technology anymore than steel was in the 19th century. What’s new is the introduction of manufacturing technologies that are lowering costs to the point where sensors transmitting information to the Internet can be affordably integrated into almost any device. Material advances have played an important role, as metal bonding technologies enable narrower seal frames and shrinks of MEMS devices. In 2013, device shrinks, new high-throughput tools and increased competition between manufacturers, as volume picks up in increasingly standardized capacity lines, will further drive the commoditization of MEMS. With Windows 8 for example providing an API for sensors, operating system requirements are also driving sensor standardization, thereby making it easier to assemble the infrastructure for the Internet of Things.

The Internet of Things, however, is about more than just gathering information through ubiquitous sensors. Huge amounts of data need to be affordably stored and analyzed, in order to be useful, which requires keeping Moore’s Law alive. Fortunately, new semiconductor 3D manufacturing technologies are poised to play a critical role in further commoditizing memory and processing power. In 2013 high volume production of true 3D technology will commence. The industry will also see intensified wafer level developments particularly around image sensors and memory, as new DRAM designs allow for monolithic integration at the wafer level. Wafer-to-wafer bonding processes, combined with built in self-test, error detection and correction  are poised to overcome one of the few remaining hurdles to high-volume, low-cost 3D manufacturing.

Although pundits can debate how the Internet of Things will transform the world, it is becoming increasingly clear that new MEMS and 3D high-volume, low-cost manufacturing technologies will accelerate a radical change to society’s cyber skyline.

By Ron Leckie, President, Infrastructure Advisors

2012 brought a slowdown in consumer spending which has negatively impacted chip unit demand.  In fact, chip units have been essentially flat for much of the last two years.  However, the good news is that unlike in prior slow periods, average selling prices have maintained a steady level.  As a result, the industry sits today with slightly elevated inventories and also with factory utilization levels that are generally about 15 percentage points below normal healthy levels.  I look to enter 2013 with continued seasonal slowness, but anticipate that unit volumes and utilization levels will start picking up by the second quarter and throughout the year.

As a result, with utilization rates at the low end of the range, we will not be seeing any significant capacity additions until later in the year.  Capital purchases will be primarily for new technology capabilities until unit volumes pick up and in turn drive capacity needs.  The Test and Assembly equipment sectors should feel a recovery slightly ahead of their Wafer Fab counterparts since they tend to be more units-driven.

The semiconductor industry and its entire supply chain are certainly maturing and are becoming more dependent than ever on the overall economy.  Consumer influence is a big factor affecting semiconductor and electronics growth.  Individual companies either need to have new innovative products to gain market share and drive organic growth, or they need to acquire companies that will take them into new adjacent markets.

In recent years, we have seen consolidation by some of the larger companies in the industry.  However, when walking around trade shows such as Semicon West, it is evident just how many small and medium sized companies still exist.  For these companies to thrive in a mature market, they need critical mass and now is the time to be looking at strategic alternatives.  Such smaller companies with complementary product lines and customers should be looking for merger opportunities.  The semiconductor industry is truly global and for example, there are big synergies to be found when bringing together global sales and service operations.  Customers prefer working with strong suppliers who will be around to support them for years to come.

For the equipment and materials suppliers, their customer base is consolidating. Some of this is through M&A (Merger and Acquisition) activities and some is through the transition to heavily outsourced business models.  Instead of selling to many IDMs, they now find themselves dealing with customers who are mostly a few large IDMs, large Wafer Foundries and OSATs.

Increasingly, we find ourselves becoming more involved with clients who are seeking strategic alternatives to “business as normal.”  In 2013, it is anticipated that M&A transaction activities will increase and result in further consolidation of the semiconductor supply chain.  It’s true what they say – size does matter.

By Bill McClean, president, IC Insights

The expectations for global economic growth consistently deteriorated throughout 2012, with worldwide GDP eventually growing by only 2.6% last year.  It should be noted that 2.5% or less worldwide GDP growth is typically considered a global recession.  IC Insights’ forecast for 2013 worldwide GDP growth is 3.2%.  Although this figure is higher than the 2.6% increase logged in 2012, it would still be 0.3 points below the 3.5% long-term average annual global GDP growth rate.

One of the primary reasons for weak 2012 worldwide GDP growth was the negative growth registered by the Eurozone and U.K. economies.  Unfortunately, the Eurozone is not expected to display a strong rebound in 2013, with 0.0% growth forecast for the Eurozone economy this year.

China’s GDP growth rate dropped to only 7.7% in 2012 with a modest rebound to 8.1% growth forecast for 2013.  While many developed countries would welcome 7% or higher GDP growth rates, for China, this figure is significantly below the 10% and greater annual GDP increases logged from 2002-2009.  In an attempt to address its economic “slowdown,” the Chinese government was quick to inject stimulus into its economy starting in the second half of 2012 by aggressively lowering interest rates as well as enacting $156 billion in construction project programs.  While this stimulus was too late to have a significant positive affect on its 2012 GDP growth, China’s GDP is likely to get at least a modest boost from this activity in 2013.

While the correlation between worldwide GDP growth and IC industry growth has historically been good, IC Insights believes that the correlation in 2013 will be very good, as it was in 2012.   Using a worldwide GDP forecast of 3.2%, the most likely range for worldwide IC market growth in 2013 is 3-7%.

The election-year cycle is one reason why IC Insights has identified 2013 as a possible slow growth year in the worldwide economy and IC industry.  Over the past 10 post-U.S.-election years, worldwide GDP growth averaged 3.1% with worldwide IC industry growth averaging only 4%.  Moreover, worldwide IC industry growth exceeded 8% in only three of these 10 post-U.S.-election years (1973, 1977, and 1993), and only once since the late 1970s.

IC Insights believes that the IC industry cycles are becoming increasingly tied to the health of the worldwide economy.  While poor IC market growth has occurred during periods of strong worldwide economic growth, primarily due to IC industry overcapacity and the resulting IC price declines, it is rare to have strong IC market growth without at least a “good” worldwide economy to support it.  Thus, over the next five years, annual global IC market growth rates are expected to closely mirror the performance of worldwide GDP growth. 

Overall, the IC industry is set to emerge from a difficult 5-year period of minimal growth.  From 2007-2012, the IC market grew at an average annual rate of 2.1%.  In IC Insights’ opinion, the “bottom” of the current cycle in the worldwide economy and IC industry was reached in 2012 and 2013 will mark the beginning of the next cyclical upturn—one in which the IC market CAGR will more than triple to 7.4% in the 2012-2017 timeperiod. 

By Christian Gregor Dieseldorff, director, SEMI Industry Research & Statistics, San Jose, CA USA  

Despite difficult times, growing demand for mobile devices (such as tablets and phones) inspires an improved outlook for chip sales in 2013.  Various forecasts range from 4% to 16% revenue growth for 2013 (average of forecasts 7%). As observed in the past, chip sales and capex typically ride the same roller coaster; however, 2013 appears to be another year of uncertainty. While chip sales may rise in 2013, expectations for equipment range from timid 5% growth down to double-digit decreases — definitely not the same roller coaster.

The largest spenders on fab equipment are Samsung, TSMC and Intel.  As of mid-December 2012, some of these companies still have not made any official announcement about 2013 capex plans.

The SEMI Consensus Forecast and the SEMI World Fab Forecast, with data collected from two different methodologies, point to the same conclusion.  The year-end Consensus Forecast for wafer processing predicts 0% growth (flat) for 2013.  Meanwhile, the World Fab Forecast report for Front End Fabs (published November 2012) also shows 0% growth (flat) for 2013 and total fab equipment spending hovering at US$ 32.4 billion (including Discretes and LEDs, used equipment and in-house equipment).  The projected number of facilities equipping will drop, from 212 in 2012 to 182 in 2013. Fab equipment spending saw a drastic dip in 2H12 and, accounting for seasonal weakness and near-term uncertainty, will be even lower in 1Q13.  Examining equipment spending by product type, System LSI is expected to lag in 2013. Spending for Flash declined rapidly in 2H12 (by over 40%) but is expected to pick up by 2H13. The foundry sector is also expected to increase in 2013, led by major player TSMC, as well as Samsung, Globalfoundries and UMC.

While fab construction spending slowed in 2012, at -15%, SEMI data projects an increase of 3.7% in 2013 (from $5.6 billion in 2012 to $5.8 billion in 2013).  The World Fab Forecast tracks 34 fab construction projects for 2013 (down from 51 in 2012).  An additional 10 new construction projects (with various probabilities) may start in 2013. The largest increase for construction spending in 2013 is expected to be for dedicated foundries and Flash-related facilities.

In 2012, many device manufacturers stopped adding new capacity due to declining average selling prices and high inventories. This is most pronounced in the Flash sector, as seen with Sandisk since the beginning of 2012, and both Samsung and Toshiba starting 3Q12.

Breaking down the industry by product type, capacity growth for System LSI is expected to decrease in 2013. Flash capacity additions dragged in 2H12. But more activity is expected for Flash by mid-2013, with nearly 6% growth. The data also point to a rapid increase of installed capacity for new technology nodes, not only for 28nm but also from 24nm to 18nm and first ramps for 17nm to 13nm in 2013.

If the global economy and GDP begin to improve, and chip sales actually do increase in the higher single-digit range, equipment spending is expected to ride the same roller coaster, going even higher for 2013.

December 28, 2012 – The FlexTech Alliance has awarded 4D Technology (Tucson, AZ) a contract to develop an optical system that addresses a shortcoming in roll-to-roll (R2R) electronics manufacturing: in situ, high-resolution mapping of surface topography and defects on a moving, flexible web. The $956K development project, expected to be completed in early 2014, will enable new, real-time levels of process control and yield enhancement, according to the groups.

Surface metrology and defect detection of web materials in R2R are well-known needs for flexible electronics manufacturing. This project’s primary focus is on analyzing and measuring transparent substrates, but the partners claim it will be applicable to translucent and reflective materials. Suppliers and customers of web materials will be able to agree upon and implement practical specifications and quality metrics to ensure consistent materials (incoming and outgoing) at the lowest possible cost.

Surface roughness, defect density, and cleanliness, key parameters for R2R substrates, are difficult to measure with high-resolution on moving substrates, noted Malcolm J. Thompson, chief technical advisor to the FlexTech Alliance. “This project with 4D Technology was initiated in order to upgrade the equipment industry’s capability to provide a metrology tool that can be integrated into a manufacturing line.”

“The new metrology system, as an on-line instrument, will register, identify and classify defects for pre-processing and post-processing of transparent flexible web materials. This will help overcome current manufacturing obstacles by replacing qualitative specs and visual inspection methods with quantitative specs supported by data acquisition and analysis,” added James Millerd, PhD, president of 4D Technology.

December 28, 2012 – Researchers in Japan have devised a microelectromechanical system (MEMS) fabrication technology using printing and injection molding, fabrication of large-area devices with low capital investment, without a vacuum process, and lower production costs. Thus, MEMS devices can be made and applied for fields where manufacturing cost has been an issue, such as lighting.

The team from the Research Center for Ubiquitous MEMS and Micro Engineering of the National Institute of Advanced Industrial Science and Technology (AIST) integrated microfabrication technology and MEMS design evaluation technology, and combined it with Design Tech Co. Ltd.’s signal processing technology to fabricate a lighting device.

Conventional commercial MEMS devices use fabrication techniques with semiconductor manufacturing systems used to produce integrated circuits, including vacuum processes. Resins could be used to form patterns onto moving microstructures but production costs are high due to vacuum-based processes. Also, it has proven difficult to form and thin MEMS structures such as springs and cantilevers because resins harden immediately after mold injection.

AIST researchers now say they have realized low-cost printing and transferred the structure using injection molding, and improved the mold structure to fill thin moving structures. A film for transferring the MEMS functional laser is formed, and the release layer and MEMS functional layer are printed onto the film with a screen or gravure printer. The printed film is aligned and put into an injection mold, into which is injected a molten resin that is cooled and solidified into the MEMS structure. The mold is then opened and the MEMS structure is separated from the film; the ink layers printed on the film are transferred to the MEMS structure.

Figure 1: MEMS fabrication processes by printing and injection molding.

The printed MEMS functional layers can be changed according to the desired purpose of the MEMS device — from acceleration sensors and gas sensors to power generation devices. This enables low-cost MEMS fabrication in fields where costs are currently too high. One example the AIST highlights is in light distribution control of LED lighting. MEMS mirrors produced with semiconductor manufacturing processes are based on costs determined by devices per wafer; so large-area mirrors are costly, while more cost-friendly micromirrors necessitate a more complex optical system. This new MEMS fabrication technology, though, could produce low-cost large MEMS devices (larger than several mm across), which opens the door for MEMS-based active light distribution control devices. Future work will seek to improve the symmetry of the MEMS mirror synchronization with the LED timing, and expand the range of the light distribution by improving the arrangement of the optical system, the signal processing, and the control circuit.

Figure 2: MEMS mirrors for active light distribution fabricated by using only printing and injection molding (left), and examples of the resulting light distribution patterns (right).

Injection molding can be used easily to form complex 3D objects such as spheres; the researchers expect MEMS devices will be formed on the surface of, or inside, 3D objects. Moreover, injection molding processes are commonly available in Japan, and systems cost less than semiconductor manufacturing systems. AIST projects its work will lead to MEMS fabrication coming out of non-semiconductor industries, such as plastics molding — and participation from these other sectors into MEMS manufacturing will help develop new applications for MEMS devices.

Figure 3: Examples of MEMS devices fabricated with the AIST technology. Top & middle: A reflective mirror and a mirror displacement sensor incorporated into a MEMS mirror device for lighting. A mirror ink for the reflective mirror, a conductive ink for the strain sensor, and a magnetic ink for driving the mirror are printed on the film, and then the printed ink patterns are transferred to the MEMS structure by injection molding. The MEMS mirror device for lighting did not break after more than 100 million operations driven by an external coil. Bottom: A MEMS device array can be fabricated using an arrayed MEMS pattern mold.