Category Archives: Power Electronics

At this week’s International Solid State Circuits Conference (ISSCC2014), imec and Holst Centre, together with Olympus, demonstrated a low-power single channel implantable electrocardiography (ECG) acquisition chip with analog feature extraction, which enables precise monitoring of the signal activity in a selected frequency band.

Leadless Pacemakers with ultra-small size and ultra-low power consumption are emerging, improving analysis and clinical research of the intra-cardiac rhythm, and as a result, improving patients’ quality of life.

The new low-power ECG acquisition chip advances the state-of-the-art by consuming only 680nA when all features are active, and also provides competitive performance, such as input SNR>70dB, CMRR >90dB, PSRR >80dB without any external passive components. By equipping an ultra-low power analog feature extractor, the new chip is capable of assisting digital signal processor platforms for the implementation of low-power heartbeat detection algorithms.

Imec’s portfolio on integrated circuits for implantable cardiac monitoring applications is available for licensing. It also includes a low-power ASIC for intra-cardiac ventricular fibrillation detection, featuring best-in-class three low-power cardiac signal readout channel, one bio-impedance measurement channel, and low-latency beat detection feature, all with 20mW power dissipation (ISSCC2013).

imec

By SEMI contributors

The closing Executive Panel discussion at the SEMI Industry Strategy Symposium on January 15 provoked diverse views on the drivers and future of innovation in the microelectronics manufacturing supply chain.  While technology demand and manufacturing efficiency provide the motivation for continued innovation in the minds of some, others believe the supply chain is forfeiting its value proposition and places too much emphasis on cost reduction.

ISS-exec-panel-photo1In a wide-ranging discussion moderated by VLSI Research chairman Dan Hutcheson, the arguments and examples of these perspectives spanned the topics of new device architectures, lithography, and the 450mm wafer transition.

John Chen, Ph.D., vice president of technology and foundry operations at Nvidia Corporation, said that affordability is key due to price sensitivities in the consumer market place.  People want electronic gadgets with great features and a good interface between them; however, the vast majority of users are young individual users and price is very important.

Chen said that if the industry truly collaborates together early-on, it can have early engagement in concurrent engineering and eliminate waste and redundancy. This reduces total cost and increases profitability for all.

Chen said that he doesn’t believe in “squeezing the vendors”; however, there is still waste in the supply loop.  Chen prefers think in terms of a supply “loop,” in which the participants have to work together rather than a supply “chain,” which connotes a more one dimensional linear relationship.

Chen said, “It’s difficult to “out-smart” others in the supply loop because all the participants have great capabilities and the only solution is to increase the pie and share the rewards.”

He asserts that this kind of coordination is essential given greater complexity from challenging technology requirements and an increasing rate of change. As an example, he speculated that the industry faces three significant discontinuities as it adopts manufacturing technology for 20nm semiconductor devices.

First, is a good discontinuity — the introduction of 3D transistors or finfets. These new device structures reduce power requirements and greatly enable consumer products with longer battery life by providing better control of the gate and reducing leakage current. Chen said that without these kinds of design innovations and the accompanying manufacturing process technology, we cannot have a quantum jump in performance.

The second discontinuity accompanies the end of 193 lithography — the point at which multiple patterning is required. At 20nm, the number of masking steps has increased 15-20 percent. Chen characterizes multiple patterning, “as a brute dumb force.” It causes wafer costs to increase and yields to suffer. Both of these results contribute to a negative discontinuity in die cost.

Read more: Is the chip industry as important as we think? Depends on whom you ask

The third discontinuity is the wafer size. Chen argues that we are already in need of 450mm wafers.  He noted that every time the industry has migrated to a larger size wafer, additional innovation comes with the transition. Accordingly, he expects additional innovation to accompany 450mm technology development.

Mike Splinter, executive chairman of Applied Materials, offered an optimistic perspective on the semiconductor demand to be created by “the internet of things” and pervasive computing — labels for the massively interconnected sensing and computing capabilities, which he expects to help address complex business, healthcare and education issues that face society.

The sub-trends influencing pervasive computing are mobility and analysis of huge amounts of information from personal devices that will be available anywhere and anytime producing a gigantic amount of data.  Because of this rapid expansion, he believes that we are underestimating the need for bandwidth and memory. He contrasted the adoption rate of other products as a way to make the point that we face unprecedented demand acceleration.  He said that television took 40 years to acquire 50 million users; Facebook took a couple years; and now an app can have 50 million users in a few weeks.  Because of this data centers will grow at an increasing rate and we will need greater performance.  Outside the data center we need lower power and cost reductions.

The highest value technologies will increase performance, reduce power, and lower cost; and that is how he believes the industry should measure what we do and prioritize R&D resources.

Read more: New methods to reduce time and cost of R&D

Splinter was confident that the industry would continue to drive smaller dimensions down to 5nm. Splinter said the lithography is now essentially a “cost play.” Scaling is no longer the enabling play, it’s a cost play because there are alternatives such as precision material engineering.

Splinter said, “We haven’t seen this kind of demand for innovation since the 1970’s when the industry saw the emergence of non-volatile memory, DRAM and the shift away from aluminum and to silicon for logic gates.  That’s the environment we are in today.  There have been tremendous advancements in flash memory, but we need a new DRAM as well as 3D technology in logic devices.”

Equipment companies have become very efficient through productivity improvements, engineering, consolidation and offshoring.  He believes the industry is reaching the limits of how much more efficiency can be attained without significant R&D trade-offs. Investments in innovation should be evaluated on the criteria of power, performance and cost.

Regarding 450mm, Splinter said that the technology changes under consideration for the large wafer size can much more easily be achieved at 300mm if the industry concentrates its R&D dollars there.  Furthermore, he is concerned about the posture of memory makers because most of the wafers processed are for memory products and if memory makers don’t participate in 450mm we won’t see the volumes necessary to support the larger wafer area.

“Where there is a demand for innovation, innovation will happen.  I am excited about next 10-15 years. The only limitation we may have is assuring that we have the young people coming into the industry.”

In response to a question by panel moderator Dan Hutcheson, Mike Splinter rebutted an assertion earlier in the conference that consolidation and large mergers were creating mega-suppliers that are too big to fail, but also too big to innovate. Splinter expressed enormous optimism about the prospects of sparking innovation when the engineers from TEL and Applied Materials are allowed to get together and share diverse but complimentary capabilities.  He pointed to beneficial collaboration that occurred when Applied Materials acquired Varian and believes that, when combined with TEL, the new organization will be able to leverage real collaboration and focus more R&D dollars on innovative technology.

According to Kazuo Ushida, executive vice president and president of Precision Equipment Company for Nikon, lithography has long supported Moore’s Law in lowering the cost per transistor. However, it is reaching the limits of what can be achieved with wavelength reduction and numerical aperture enlargement.  EUVL has numerous and costly challenges, and therefore Nikon believes that it is necessary to migrate to a larger wafer size.  During the transition from 200-300mm, there was a quadrupling in in the optical lithographic performance improvement.

Ushida said that Nikon is willing to take a long view on the return on investment to support customers.  He compared the situation to Boeing’s investment in developing the 787 which will have approximately 20 year payback.

He said that throughput of 150 wafers per hour will be needed to be competitive with 300mm and that industry synchronization is essential to lower the time to recouping the cost of development.

Terry Brewer, Ph.D., president and founder of Brewer Science, bemoaned the persistent emphasis on cost reduction that is pervasive in industry dialog.  He fears the industry is drifting away from true innovation as a driver of technology. Picking up on an earlier topic about the industry’s need to recruit future talent, Brewer said that it will be hard for young technologists to be excited about manufacturing innovation because there is too much focus on cost.

Brewer cautioned that the manufacturing supply chain will decline in value if it positions costs reduction as the primary benefit of innovation. Brewer said, “At one time, Moore’s law was very valuable because chips were the main value proposition in electronics.  Sadly, it is not today.”  He suggested that semiconductor manufacturing is being supplanted as the “mainstream” value creator by companies like Apple and Google.

Brewer contrasted the industry mindset to that of Apple’s saying that, “Steve Jobs came out with an $800 phone when everyone else was trying to reduce cost.  Apple won because it had a better value proposition.”

Brewer suggested that the industry roadmap for the 450mm transition, EUV lithography will slow or be pushed out because of costs.  In contrast, the last two nodes were driven primarily out of chemical engineering and materials innovations.

The panel concluded with a consensus that innovation and collaboration are tightly related activities and that value-driven innovation is required to sustain the industry in a consolidating supply chain environment.

SEMI ISS-Europe is February 23-25. For information on all SEMI events, visit: www.semi.org/en/Events.

The Obama Administration today announced the selection of North Carolina State University to lead a public-private manufacturing innovation institute for next generation power electronics. Called the Next Generation Power Electronics Institute, the new consortium will provide shared facilities, equipment and testing to companies from the power electronics industry, focusing on small and medium-sized companies. The 18 companies already committed to the consortium include: ABB, APEI, Avogy, Cree, Delphi, Delta Products, DfR Solutions, Gridbridge, Hesse Mechantronics, II-VI, IQE, John Deere, Monolith Semiconductor, RF Micro Devices, Toshiba International, Transphorm, USCi and Vacon.

The institute, backed by a $70 million investment from the Department of Energy, will focus on power electronics using wide bandgap (WBG) semiconductors, bringing together over 25 companies, universities and state and federal organizations.

wide-bandgap-infographic

“This $140 million manufacturing hub in Raleigh has the potential to fast-forward development of some products by at least a decade,” said Greg Scheu, president and CEO of ABB Inc., a Raleigh-based power electronics manufacturer. “We expect that consumers will start to see some low-voltage products, like residential solar, coming out the quickest and within five years.  The high-power products like industrial motors and drives and hog-voltage gear will take a few more years to come to market, mainly due to the rigorous reliability testing requirements of the electric utility industry.”

Power electronics – such as inverters, transformers and transistors – help control and convert electricity and are playing a growing role in electricity generation, distribution and transmission. According to a study by the Oak Ridge National Laboratory, approximately 30 percent of all power generation today utilizes power electronics between the point of generation and its end use. By 2030, this is expected to jump to 80 percent of generated electricity – supporting greater renewable energy integration and increased grid reliability. WBG semiconductor-based power electronics will be able to better withstand the power loads and switching frequencies required by next generation utility technologies.

Power electronics that use WBG semiconductors will also be smaller, more efficient and cost less. A WBG semiconductor-based inverter, which switches electricity from direct current to alternating current, could be four times more powerful, half the cost and one-fourth the size and weight of a traditional inverter. At a larger-scale, WBG semiconductors could help reduce the size of an 8,000 lbs. substation to 100 lbs. and the size of a suitcase – ultimately helping to lower the cost of electricity and build a stronger, more reliable grid.

WBG semiconductors such as silicon carbide and gallium nitride can operate at higher temperatures and have greater durability and reliability at higher voltages and frequencies.

The state of North Carolina is expected to contribute at least $10 million to the new consortium, which is expected to help bolster employment in North Carolina, as well as to help focus on manufacturing as a potential source of economic growth.

According to the official statement from the Obama administration, The Next Generation Power Electronics Institute supports President Obama’s vision for a full national network of up to 45 manufacturing innovation institutes that help make America a magnet for jobs and manufacturing and ensure that U.S. workers have the training they need to lead in the global economy.

“I see it this way,” said Mr. Scheu, “the president asked the industry to work together and see where we can replace silicon with other semiconductor materials to reduce energy loss — meaning huge energy efficiency — for equipment that can handle higher voltages, higher temperatures and higher frequencies.  To me, this is the goal.  And this is where the imagination takes off.”

Imec celebrates 30 years


January 14, 2014

Nanotechnology research and development center imec, today announced the celebration of its 30th anniversary. Founded in 1984 as a non-profit organization, imec has grown to be a multi-disciplinary expertise center in the fields of semiconductor chips and systems, electronics for life sciences, body area networks, energy, photovoltaics, sustainable wireless communication, image sensors and vision systems, and flexible electronics and displays. Through innovations in nanoelectronics, imec has collaborated with numerous partners from universities, research institutes and top companies, creating solutions and developing emerging technology for a sustainable environment.

In the domain of semiconductor technologies, imec has enabled notable advancements in global semiconductor chip manufacturing in the three decades since its founding.  At the forefront in advancing immersion lithography, EUV, double patterning imec has driven lithography as a key solution to overcome the challenges in scaling down features in silicon chips. In 2013, imec and ASML broadened their partnership with the launch of a Patterning Center. When complete, this Center will offer the global semiconductor ecosystem the most advanced patterning knowledge for sub-10nm technologies, crucial to addressing future scaling and infrastructure challenges. This Center will be extended through partnerships with other suppliers into a “Suppliers Hub,” to collaborate on the development of next generation process technology solutions.

Launched in 2003, imec’s research platform addressed the needs of the semiconductor value chain during the crucial transition from 200mm to 300mm silicon wafers as a manufacturing standard. The platform allows companies to collaborate on advanced process module and device research, targeting technology generations two to three nodes ahead of state-of-the-art IC production. Today, this initiative has evolved to a global collaboration platform with global industry leaders such as Intel, Samsung, TSMC, GLOBALFOUNDRIES, Micron, SK Hynix, Toshiba, SanDisk, Panasonic, Sony, Qualcomm, Altera, Fujitsu, nVidia, Xilinx, and others, driving semiconductor industry innovations.
Imec’s main achievements in semiconductor process technology research include:

1)      Development of sub-22nm process technologies: From silicides to copper (Cu), to the introduction of low-k and high-k/metal gates, imec’s R&D has explored techniques to overcome interconnect metallization issues. In 2013, imec demonstrated the world’s first 3D compound semiconductor FinFET. Integrating III-V and silicon materials on the same 300mm silicon wafer through a unique silicon fin replacement process, imec demonstrated progress toward continued CMOS scaling at 7nm and below, enabling future hybrid CMOS-RF and CMOS-optoelectronics.

2)      Contributions to manufacturability and circuit performance of advanced devices: Imec’s outstanding cleaning expertise has resulted in wafer cleaning solutions with high particle removal efficiency and minimal chemical use. The Rotagoni cleaning method, developed in 2001, solved the challenges faced by single-wafer wet cleaning. Also, imec pioneered research on 3D integrated circuits as a potential road to build more complex, more powerful and more cost-effective electronic systems, combining different types of functionalities on an ever smaller footprint. In 2008, imec demonstrated, for the first time ever, 3D integrated circuits.

Imec’s innovation in nanoelectronics has been a driver for developments in many other domains including healthcare, energy, photovoltaics, communications, and mobility, where imec has applied its semiconductor technology expertise. In 2013, imec’s life science research gained momentum by forging new R&D collaborations with Johns Hopkins University, Janssen Pharmaceutica, Pacific Biosciences, Panasonic, JSR, and others. Such collaborations will lead to breakthroughs in healthcare with the development of the next generation of “lab-on-chip” concepts, powerful supercomputers for life sciences research, and sensor array tools to advance neuroscience research.

“It’s our ambition to further position imec as a unique innovation hub for Europe and the world, where disruptive technology ideas are generated and come to fruition,” stated Luc Van den hove, president and chief executive officer at imec. “We welcome scientists, researchers and engineers from companies of various fields to collaborate with us as they advance and tune their innovations. Imec has proven to be the birthplace of new discoveries, and we confidently look forward to the next 30 years of innovation that will be the backbone of the solutions that will help make the world a better, more sustainable place.”

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that the Fraunhofer Institute for Silicon Technology (ISIT) has purchased an EVG 850TB/DB fully automated bonding/debonding equipment solution.  The system has been shipped and installed at Fraunhofer ISIT’s facility in Itzehoe, Germany, where it is being used in the development and production of next-generation power devices, including PowerMOS and Insulated Gate Bipolar Transistors (IGBTs).

“We’ve collaborated with EV Group for several years in developing thin-wafer handling processes for power devices due to their extensive expertise in temporary bonding and debonding,” stated Dr. Wolfgang Windbracke, deputy director, Fraunhofer ISIT.  “The commitment and support that their process development team has provided—as well as access to EV Group’s cleanrooms, demo tools and applications labs—has been very helpful in our development efforts.  With EV Group’s automated temporary bonding and debonding system now installed at our development facility, we can further accelerate our research and development efforts and ramp up manufacturing of our newest generation of power devices faster at the joint-production facility in Itzehoe that we share with Vishay Semiconductor.”

Power devices are microelectronic components that are essential functional elements in electrical equipment such as voltage converters, power amplifiers and switch-mode power supplies.  Thinning power device wafers enables the devices that are produced to have lower electrical resistance, which reduces power loss and enhances product performance.  Temporarily bonding device wafers to carrier wafers helps ensure the integrity of the device wafers during the wafer thinning process.  Since even the smallest thickness variations of the final device can have a critical impact on performance, process reliability and uniformity are important characteristics in wafer handling and bonding/debonding to ensure safe processing and optimal yields.  Today, EVG’s temporary bonding/debonding tools are the most advanced in the world with the highest bond accuracy and unprecedented thickness uniformity results.

“We’re very pleased to be able to count Fraunhofer ISIT as a customer as well as a development partner on thin-wafer applications for advanced power device development and production,” stated Paul Lindner, executive technology director, EV Group.  “With more than 10 years of experience in temporary bonding/debonding and with the largest installed base of tools in volume production, EV Group is the clear leader in the temporary bonding/debonding market.  Customers and development partners alike leverage our leading process development team expertise and cleanroom facility to support their advanced process development efforts, as well as our cutting-edge process equipment to help take them to the next level and enable them to ramp up their next-generation processes into production.”

The EVG850TB/DB automated system is a highly flexible tool that can be configured to support a variety of bonding materials.  The system is used to temporarily bond a device wafer to a rigid carrier wafer for safe and efficient processing of the device wafer.  After subsequent power device processing (back thinning, etching, implantation, lithography, metallization, annealing, etc.), the device wafer is debonded from the carrier substrate using various techniques dependent of the intermediate material.  The EVG850TB/DB features a special robot end-effector handling solution and a cassette station for thin-wafer output providing customers with the highest flexibility available in a modular configuration.  These special features enable the system to fit any specialized customer process.

It’s known that electric vehicles could travel longer distances before needing to charge and more renewable energy could be saved for a rainy day if lithium-sulfur batteries can just overcome a few technical hurdles. Now, a novel design for a critical part of the battery has been shown to significantly extend the technology’s lifespan, bringing it closer to commercial use.

A “hybrid” anode developed at the Department of Energy’s Pacific Northwest National Laboratory could quadruple the life of lithium-sulfur batteries. Nature Communications published a paper today describing the anode’s design and performance.

“Lithium-sulfur batteries could one day help us take electric cars on longer drives and store renewable wind energy more cheaply, but some technical challenges have to be overcome first,” said PNNL Laboratory Fellow Jun Liu, who is the paper’s corresponding author. “PNNL’s new anode design is helping bringing us closer to that day.”

Today’s electric vehicles are commonly powered by rechargeable lithium-ion batteries, which are also being used to store renewable energy. But the chemistry of lithium-ion batteries limits how much energy they can store. One promising solution is the lithium-sulfur battery, which can hold as much as four times more energy per mass than lithium-ion batteries. This would enable electric vehicles to drive longer on a single charge and help store more renewable energy. The down side of lithium-sulfur batteries, however, is they have a much shorter lifespan because they can’t be charged as many times as lithium-ion batteries.

Most batteries have two electrodes: one is positively charged and called a cathode, while the second is negative and called an anode. Electricity is generated when electrons flow through a wire that connects the two. Meanwhile, charged molecules called ions shuffle from one electrode to the other through another path: the electrolyte solution in which the electrodes sit.

The lithium-sulfur battery’s main obstacles are unwanted side reactions that cut the battery’s life short. The undesirable action starts on the battery’s sulfur-containing cathode, which slowly disintegrates and forms molecules called polysulfides that dissolve into the battery’s electrolyte liquid. The dissolved sulfur eventually develops into a thin film called the solid-state electrolyte interface layer. The film forms on the surface of the lithium-containing anode, growing until the battery is inoperable.

Most lithium-sulfur battery research to date has centered on stopping sulfur leakage from the cathode. But PNNL researchers determined stopping that leakage can be particularly challenging. Besides, recent research has shown a battery with a dissolved cathode can still work. So the PNNL team focused on the battery’s other side by adding a protective shield to the anode.

The new shield is made of graphite, a thin matrix of connected carbon molecules that is already used in lithium-ion battery anodes. In a lithium-sulfur battery, PNNL’s graphite shield moves the sulfur side reactions away from the anode’s lithium surface, preventing it from growing the debilitating interference layer. Combining graphite from lithium-ion batteries with lithium from conventional lithium-sulfur batteries, the researchers dubbed their new anode a hybrid of the two.

The new anode quadrupled the lifespan of the lithium-sulfur battery system the PNNL team tested. When equipped with a conventional anode, the battery stopped working after about 100 charge-and-discharge cycles. But the system worked well past 400 cycles when it used PNNL’s hybrid anode and was tested under the same conditions.

“Sulfur is still dissolved in a lithium-sulfur battery that uses our hybrid anode, but that doesn’t really matter,” Liu said. “Tests showed a battery with a hybrid anode can successfully be charged repeatedly at a high rate for more 400 cycles, and with just an 11-percent decrease in the battery’s energy storage capacity.”

This and most other lithium-sulfur battery research is conducted with small, thin-film versions of the battery that are ideal for lab tests. Larger, thicker batteries would be needed to power electric cars and store renewable energy. Liu noted tests with a larger battery system would better evaluate the performance of PNNL’s new hybrid anode for real-world applications.

Compiled by Shannon Davis, Web Editor

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This week in Las Vegas, the 2014 International Consumer Electronics Show focused on the Internet of Things, displaying many connected gadgets and services. This year’s show featured more than 3,200 exhibitors, many of which were excited to show off new Internet-enable devices.

Click through our slideshow of highlights for an overview of the show.

CLICK HERE TO LAUNCH SLIDESHOW

Integrated Device Technology, Inc. today announced the industry’s first Qi-compliant single-chip wireless power transmitter solution supporting a 5V input. The highly-integrated solution enables the development of USB-powered wireless charging bases with 75 percent fewer ICs than competing solutions. IDT’s transmitter solution is ideal for use in wireless charging systems that seek to take advantage of a universal power port while minimizing system complexity and physical size.

The IDTP9038 is a single-chip wireless power transmitter IC compatible with the Wireless Power Consortium (WPC) 1.1 “Qi” standard for A5 and A11 coil configurations, enabling OEMs to develop charging bases that are fully compatible with any Qi-compliant portable device. The device operates with a 5V input, allowing it to be powered by any standard USB port, USB wall adapter, or traditional 5V adapter. Such ports and adapters are ubiquitous and already included with many popular portable electronics, streamlining the user experience and reducing solution cost. In addition, IDT’s device is designed as a single high-efficiency IC, whereas existing solutions require four or more ICs. This enables system designers to minimize system complexity, ease PCB routing constraints, and simplify the bill-of-materials.

“IDT continues to lead the market with the industry’s most integrated and feature-rich wireless power solutions,” said Arman Naghavi, vice president and general manager of the Analog and Power Division at IDT. “The IDTP9038 empowers our customers to create USB-powered wireless charging mats that use the same USB adapters they already bundle with their portable devices, or that can be plugged into a laptop or docking station for convenience. In addition, our highly-integrated solutions benefit customers by minimizing system complexity, easing PCB routing challenges, and simplifying the BOM – all factors that help ensure a successful product development and, ultimately, improve time-to-market.”

The IDTP9038 features an embedded microcontroller and integrated full-bridge inverter with low-resistance FETs for exceptional flexibility, minimized PCB real estate, and high-efficiency power transfer. IDT’s patent-pending control circuit offers world-class EMI performance measured at 15 dB lower than CISPR requirements, reducing concerns of cross-talk with other sensitive electronics. The 5V device features USB connectivity meeting the requirements of BCS 1.2 (D+/D- detection) for fully controlled power delivery and added safety.

In addition, the IDTP9038 features a proprietary high-power transfer mode capable of delivering up to 60% more power than specified by the Qi standard – transmitting up to 8 watts of power when paired with an IDT wireless power receiver. This enables OEMs to offer ultra-fast charging times between their IDT-equipped portable devices and IDT-equipped charging mats.

North America-based manufacturers of semiconductor equipment posted $1.24 billion in orders worldwide in November 2013 (three-month average basis) and a book-to-bill ratio of 1.11, according to the November EMDS Book-to-Bill Report published today by SEMI.   A book-to-bill of 1.11 means that $111 worth of orders were received for every $100 of product billed for the month.

The three-month average of worldwide bookings in November 2013 was $1.24 billion. The bookings figure is 10.1 percent higher than the final October 2013 level of $1.12 billion, and is 72.3 percent higher than the November 2012 order level of $718.6 million.

The three-month average of worldwide billings in November 2013 was $1.11 billion. The billings figure is 4.0 percent higher than the final October 2013 level of $1.07 billion, and is 22.4 percent higher than the November 2012 billings level of $910.1 million.

“The continuing rise in equipment bookings clearly points to year-end order activity that is substantially stronger compared to one year ago,” said Denny McGuirk, president and CEO of SEMI.  “This trend supports the current outlook showing a rebound in equipment spending for 2014.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

 

Billings
(3-mo. avg)

Bookings
(3-mo. avg)

Book-to-Bill
June 2013

1,213.7

1,334.2

1.10
July 2013

1,204.0

1,207.2

1.00
August 2013

1,081.9

1,063.9

0.98
September 2013

1,020.9

992.8

0.97
October 2013 (final)

1,071.0

1,124.5

1.05
November 2013 (prelim)

1,113.6

1,237.9

1.11

Source: SEMI, December 2013

The data are contained in a monthly Book-to-Bill Report published by SEMI. The report tracks billings and bookings worldwide of North American-headquartered manufacturers of equipment used to manufacture semiconductor devices, not billings and bookings of the chips themselves. The SEMI Book-to-Bill report is one of three reports included with the Equipment Market Data Subscription (EMDS).

This is a transmission electron microscope cross-section of the vertical TFET. The interface of the source and channel is the point where electron tunneling occurs. ILD is the interlayer dielectric separating the contacts. Top plane contacts are gold (Au), palladium (Pd), and molybdenum (Mo). Credit: Suman Datta/Penn State

This is a transmission electron microscope cross-section of the vertical TFET. The interface of the source and channel is the point where electron tunneling occurs. ILD is the interlayer dielectric separating the contacts. Top plane contacts are gold (Au), palladium (Pd), and molybdenum (Mo).
Credit: Suman Datta/Penn State

A new type of transistor that could make possible fast and low-power computing devices for energy-constrained applications such as smart sensor networks, implantable medical electronics and ultra-mobile computing is feasible, according to Penn State researchers. Called a near broken-gap tunnel field effect transistor (TFET), the new device uses the quantum mechanical tunneling of electrons through an ultrathin energy barrier to provide high current at low voltage.

Penn State, the National Institute of Standards and Technology and IQE, a specialty wafer manufacturer, jointly presented their findings at the International Electron Devices Meeting in Washington, D.C. The IEDM meeting includes representatives from all of the major chip companies and is the recognized forum for reporting breakthroughs in semiconductor and electronic technologies.

Read more: Slideshow: IEDM 2013 Highlights

Tunnel field effect transistors are considered to be a potential replacement for current CMOS transistors, as device makers search for a way to continue shrinking the size of transistors and packing more transistors into a given area. The main challenge facing current chip technology is that as size decreases, the power required to operate transistors does not decrease in step. The results can be seen in batteries that drain faster and increasing heat dissipation that can damage delicate electronic circuits. Various new types of transistor architecture using materials other than the standard silicon are being studied to overcome the power consumption challenge.

“This transistor has previously been developed in our lab to replace MOSFET transistors for logic applications and to address power issues,” said lead author and Penn State graduate student Bijesh Rajamohanan. “In this work we went a step beyond and showed the capability of operating at high frequency, which is handy for applications where power concerns are critical, such as processing and transmitting information from devices implanted inside the human body.”

For implanted devices, generating too much power and heat can damage the tissue that is being monitored, while draining the battery requires frequent replacement surgery. The researchers, led by Suman Datta, professor of electrical engineering, tuned the material composition of the indium gallium arsenide/gallium arsenide antimony so that the energy barrier was close to zero — or near broken gap, which allowed electrons to tunnel through the barrier when desired. To improve amplification, the researchers moved all the contacts to the same plane at the top surface of the vertical transistor.

This is a scanning electron microscope top view of the TFET.

This is a scanning electron microscope top view of the TFET.

This device was developed as part of a larger program sponsored by the National Science Foundation through the Nanosystems Engineering Research Center for Advanced Self-Powered Systems of Integrated Sensors and Technologies (NERC-ASSIST). The broader goal of the ASSIST program is to develop battery-free, body-powered wearable health monitoring systems with Penn State, North Carolina State University, University of Virginia, and Florida International University as participating institutions.