Category Archives: Slurries


Cabot Microelectronics Corporation (Nasdaq: CCMP), a supplier of chemical mechanical planarization (CMP) polishing slurries and a growing CMP pad supplier to the semiconductor industry, announced the appointment of Thomas F. Kelly, Vice President, Corporate Development, which is effective as of September 6, 2016. Mr. Kelly rejoins Cabot Microelectronics after serving as the Director of Global Raw Materials Procurement for Celanese Corporation from 2012 through 2016, and prior to that as the Vice President of New Business Development and the Program Management Organization of Chemtura Corporation, where he was employed from 2008 until 2012. He was employed by Cabot Microelectronics from 1999 through 2008, serving in various senior business operations, product management, and supply chain assurance roles.

“I am delighted to welcome Tom Kelly back to Cabot Microelectronics, and am confident his executive expertise from various global companies in the larger engineered materials and chemicals industries will benefit our company greatly in a number of important areas,” said David H. Li, Cabot Microelectronics’ President and Chief Executive Officer. “Tom knows our business, industry, customers and supply chain well, along with having developed important experience in mergers and acquisitions, business development, and corporate strategy from his more recent roles in helping to lead multi-billion dollar global businesses.”

In addition to this, the Company announced that as of September 1, 2016, Daniel J. Pike has resigned from his position as Vice President, Corporate Development, and will continue to serve the Company in a non-executive transition role until March 1, 2017. Mr. Li stated, “I would like to thank Dan for his significant contribution to the founding and growth of Cabot Microelectronics during his many years of service. All of us wish him well in his future endeavors.”

Chemical mechanical planarization (CMP) is a critical process technology step in the semiconductor wafer fabrication process. In this process step, the top surface of the wafer is polished or planarized to create a flat surface.

The CMP tool is comprised a rotating platen, slurry, pad, holding ring, brush, and pad conditioner. The mechanical element of this system applies downward pressure to a wafer surface, while the chemical reaction increases the material removal rate. The value chain of the CMP market consists of different players, including semiconductor material suppliers, CMP integrated solution providers, semiconductor wafer suppliers, semiconductor device manufacturers, slurry & pad manufacturers, technology solution providers, and CMP equipment manufacturers.

While CMP is still used for its traditional polishing applications for interlayer dielectrics, it’s also finding employment in more advanced applications, such as bulk oxide polishing, shallow trench isolation, “stop on poly” isolation, and polishing of various dielectrics in advanced transistor designs.

According to a recent market research report published by MarketsandMarkets, the global CMP market is expected to reach $4.94 Billion by 2020, at an estimated CAGR of 6.83% from 2015 to 2020.

Though the CMP market is at the mature stage, it still continues to evolve depending on the end users. The industry is being forced to adopt much innovation in process technologies and applications; as a result, different CMP processes have been evolved with technology nodes and newer applications such as MEMS, advanced packaging, and advanced substrates.

Applied Materials, Inc. (U.S.) and Ebara Corporation (Japan) are the major CMP equipment suppliers. Phoenix-based Entrepix offers unique CMP foundry services.

CMP includes consumable products, polishing pads and slurries. This CMP consumables market is dominated by major market players such as Cabot Microelectronics Corporation (U.S.), Fujimi Incorporated (Japan), and Dow Electronic Materials (U.S.).

Success in CMP lies in optimizing the many process variables. In addition to wafer variables such as film type and pattern density, CMP variables include: time, pressure (force applied to the wafer and pad), velocity, temperature, slurry feed rate, polishing motion, slurry chemistry and pH potential, slurry particle size, pad elasticity, pad hardness and pad condition method. An optimized CMP process also depends on removal rates of the film being planarized, adhesion stability of the film, minimal defects such as scratchs or pits, minimal corrosion (in the case of Cu), and the adhesion of organic or inorganic surface residues formed during the CMP process.

With alternate channel materials on the horizon for future logic transistor, III-V materials such as gallium-arsenide (GaAs), gallium-indium-phosphide (GaInP), and indium-phosphide (InP) are now in R&D which leads to questions regarding direct process costs as well as indirect EHS costs. Much of the concern involves the possible reaction and release of toxic hydrides such as arsine, and phosphine. SEMATECH worked with imec to monitor hydrides produced during CMP processes for high-mobility compound semiconductors.

Suggested Additional Reading:

Chemical Mechanical Planarization: Historical Review and Future Direction

Northern California Chapter of American Vacuum Society: CMP Users Group

CMP Technology Evolving to Engineer Surfaces

Reduced defectivity and cost of ownership of copper CMP cleans

Safe CMP slurries for future IC materials

The rule of three

By Jeff Dorsch

Chemical mechanical planarization (CMP) technology has been around for a long time. In addition to the semiconductor industry, CMP has applications in data storage, polishing the rigid disks and magnetic heads of hard-disk drives.

Those interested in learning about developments in CMP for hard drives and integrated circuits would do well to attend the CMP Technical and Market Trends session on Thursday, July 16, at 11 a.m. in the TechXPOT North area of Moscone Center’s North Hall. Representatives of Intel, HGST, Entegris, TDK, and other companies will be speaking.

While 450-millimeter wafers haven’t been much in the news this year, Thursday’s session will include a presentation by the Global 450 Consortium, with speakers from the College of Nanoscale Science + Engineering (CNSE) and SEMATECH.

CNSE is part of the SUNY Polytechnic Institute in Albany, N.Y., which also contains the Chemical Mechanical Planarization Center, a joint program with SEMATECH. Mitsubishi Chemical joined the program this spring.

While CMP is still used for its traditional polishing applications for interlayer dielectrics, it’s also finding employment in more advanced applications, such as bulk oxide polishing, shallow trench isolation, “stop on poly” isolation, and polishing of various dielectrics in advanced transistor designs.

CMP includes consumable products, polishing pads and slurries. Dow Chemical is the leading vendor in polishing pads, while Cabot Microelectronics dominates the CMP slurry market.

Late last month, Applied Materials and Cadence Design Systems announced that they are collaborating on optimizing the CMP process through silicon characterization and modeling for ICs with 14-nanometer features, and beyond that process node. Cadence, one of the leading vendors of electronic design automation software and services, will provide its CMP Predictor and CMP Process Optimizer tools. Applied will employ its Reflexion LK Prime CMP system.

“From our collaboration, we expect to more accurately predict gate height, dishing and erosion on each step of the CMP process, which could enable design and manufacturing teams to achieve higher yield and deliver advanced-node designs to market faster,” Derek Witty, vice president and general manager of Applied’s CMP Products Group, said in a statement.

Whatever your level of expertise in CMP, SEMICON West 2015 will help you polish up your knowledge of the field.