Category Archives: Semicon

By Paula Doe, SEMI

The future of contamination control in the next-generation supply chain for beyond 14nm-node semiconductor processes faces stringent challenges. While Moore’s Law is driving scale reduction, the industry is also facing ever-increasing process sensitivity, integration challenges of new materials and the need for unprecedented purity at process maturity.

“The supply chain needs a paradigm shift in thinking about defect control. What was just process variation for previous technology nodes can now be an excursion!” says Dr. Archita Sengupta, Intel senior GSM Technologist, leading the filtration and related supply chain contamination control program, who will discuss these challenges and possible solutions in the session on key materials issues at SEMICON West 2017 on July 11 in San Francisco at Moscone Center.

There are new materials being used for the first time, and even familiar materials need to be treated with new and different specifications. Even if the needed parameters are correctly specified, there may not be an accurate way to measure those parameters under HVM conditions, at least that most material suppliers can afford.  Chemicals, advanced filtration and purification, chemical delivery systems and equipment manufacturing can all be sources of wafer contamination. “The interaction between the tool and the chemicals is also increasingly important,” she notes. “All this is going to add more cost for the industry supply chain for quality control, but it will cost more in the end if we don’t proactively work together throughout the supply chain to figure out what matters to control and how!”

Stability is key

The most important thing material suppliers can do to meet customer quality demands is to maintain absolute stability of everything about their material and manufacturing process, suggests Jim Mulready, VP Global Quality Assurance, JSR Micro, who will also present at SEMICON West. “Traditional quality control, where the QC data at the end of my line only has to meet the customer’s specifications, doesn’t work,” he says, noting that the material supplier doesn’t have the same process tool, the same substrate, or the same process conditions as the customer, so the testing can’t duplicate the customer’s result. Moreover, the process sensitivity is getting tighter at every generation, with the tolerance of defects often being beyond the supplier’s ability to detect them. So, no specification can ever be precise enough to capture everything the customer really needs.  “Often tightening the specs doesn’t solve the problem,” he notes. “There are plenty of examples of material that was well within spec but didn’t function properly. The problem is not inadequate specs, it’s inadequate attention to other quality tools. The spec is necessary, but not sufficient.”

“The systematic (as opposed to technical) root cause of the material problems I faced as fab materials quality manager at Intel almost always came down to a problem in stability,” says Mulready, where there was a change to the material the supplier didn’t think was important, a change in the processing that they didn’t catch, or a change in the incoming raw material that they didn’t detect. “Material suppliers have to accept that the customers’ definition of quality becomes their definition of quality, and the main rule is to make sure that a material that’s working does not change at all. Consistency is the key for the end user, so it must be for us as well.  A spec alone will not measure or ensure that.  It takes robust change control, process control, and incoming raw material control.”

Semiconductor makers meanwhile, need to start paying attention not just to their immediate suppliers, but also to their suppliers’ supply chain; for example, not just the resist but also the resin and even the monomers used to make it. While the material suppliers need to qualify the incoming material, and serve as a kind of safety valve between the chemical industry and the IC makers, it can be difficult for them to control the supply quality when they are a very minor customer for the commodity chemical suppliers.  Those suppliers in turn may have no interest in investing in the tools needed to measure the particular properties of concern, and there may be a need for the IC customer to help inflict some pressure.

For more details on the SEMICON West 2017 Materials program, “Material Supply Challenges for Current and Future Leading-edge Devices,” organized by SEMI’s Chemical & Gas Manufacturers Group (CGMG), see www.semiconwest.org/programs-catalog/material-supply-leading-edge-devices. To see the full SEMICON West agenda, visit www.semiconwest.org/agenda-glance.

AMICRA Microtechnologies, a German-based vendor of advanced back-end assembly processing equipment for advanced packaging applications, has received an order for the AFC Plus System from Fabrinet West. The equipment will be installed in Fabrinet’s optical packaging service facility in Santa Clara, California. AMICRA and Fabrinet have agreed to establish a partnership agreement whereby both companies will work together to provide customers with best support for application and process development activities.

“For AMICRA, this is a strategic partnership to support our existing installed base and to support our rapidly growing USA market,” states AMICRA managing director, Dr. Johann Weinhaendler, on the latest purchase order.

The AFC Plus will provide Fabrinet with the die attach capability to maintain its leadership role in the Opto/Photonic contract manufacturing market, while providing sample build capability for AMICRA’s customers in the USA. The AFC Plus has the flexibility to process most advanced packages especially for in-situ eutectic bonding requiring 0.5µm placement accuracy.  The AFC Plus system which will be delivered in Q3/2016 and supports die placement accuracies down to ±0.5μm @ 3σ for both eutectic and epoxy bonding with cycle times down to 20 to 30 seconds/bond or 180 to 120 UPH making it well suited for processing VCSEL/AOC, Silicon Photonic, Laser Bar and MEMS components.

“Fabrinet is bringing its advanced optical packaging capabilities to Silicon Valley, where a large fraction of our customers are based. AMICRA’s AFC Plus die attach platform sets the industry standard for accuracy, throughput, and robustness. Along with many other capabilities, such as active optical alignment, wire bond, epoxy underfill, laser dicing, and various metrology tools, Fabrinet is planning to offer its customers process/product development services starting in August 2016” states Dr. Hong Hou, Fabrinet’s Executive Vice President and Chief Technical Officer. “The partnership with AMICRA allows Fabrinet to offer the best in class technical support to customers brought by both companies.”

The AMICRA die bonding product line also includes the NOVA Plus, which supports placement accuracies down to ±2.5μm @ 3σ with cycle times down to 3 seconds/bond or 1,200 UPH, and the NOVA FanOut, specifically for the FanOut market, offering a large bonding area of 550mm x 600mm while maintaining die placement accuracies down to ±3.0μm @ 3σ with cycle times down to 1.2 seconds/bond or 3,000 UPH.

Other AMICRA products include the fully automated, high-speed wafer inking system AIS, and the semi-automatic wafer inking system SIS, as well as the fully automated, high-speed precision dispensing system HDS, offered in a quad- or dual-headed configuration to support underfill, glob-top, general dispensing applications and more.

AMICRA will be exhibiting and available for equipment and technical application discussions at SEMICON West (July 12-14) and SEMICON Taiwan (Sept 7-9).

AFCPlus

With disruptive changes occurring in the electronics supply chain, 26,000 professionals will converge on SEMICON West 2016 (July 12-14) at Moscone Center in San Francisco to hear insider perspectives on what the future holds for the industry. Keynote speakers and expert panelists will discuss both challenges and opportunities to help companies navigate turbulent times.

On July 12, John Kern, Cisco’s senior VP of Supply Chain Operations, will give the Opening Keynote on “The Digital Supply Chain – The Next Breakthrough Opportunity.”  Kern states, “Of all the disruptive changes in the electronics sector, the biggest impact may come from the digitization of manufacturing and the emergence of the digital supply chain.”

On July 13, Denny McGuirk, president and CEO of SEMI, will moderate the CONNECT Executive Summit, with the theme “Everything Is Changing.”  With widespread mergers and acquisitions and China building more new chip fabs than any other country, the world has changed dramatically. Panelists Bertrand Loy (Entegris), Bridget Karlin (Intel), and Michael Campbell (Qualcomm) will discuss how they are realigning business models, strategies, and technologies to meet the challenges and embrace the opportunities.

On July 14, Atul Mahamuni, VP of IoT Product Management at Oracle, will present the Thursday Keynote on “Internet of Things in Smart Manufacturing: A Three Phase Journey to Operational Excellence,” focusing on how to extend your business applications to the physical devices in manufacturing operations.

In addition to executive events, SEMICON West will present eight business and technology forums, including three new and updated forums:

  • Extended Supply Chain Forum — includes IC Design Summit, Smart Manufacturing and Analog programs
  • Advanced Manufacturing Forum — includes lithography, scaling, MEMS/sensors, power electronics, interconnects, 3D integration, materials, 200mm, 3D printing, and more)
  • Advanced Packaging Forum — includes SiP, photonics, power, and flexible hybrid electronics

Five additional forums —Test, Sustainable Manufacturing, Silicon Innovation, Flexible Hybrid Electronics, and World of IoT — round out the extended electronics supply chain event.

To register for SEMICON West 2016, visit www.semiconwest.org. Learn more about keynotes and the executive summit. For a limited time, register for only $100 (includes admission to keynotes, TechXPOTs, Silicon Innovation Forum, World of IoT Theatre, 700 exhibits, and Intersolar).

By Paula Doe, SEMI

With many disruptive changes occurring in the electronics supply chain, the one with the biggest impact may come from smart manufacturing and the emergence of the digital supply chain.

“The digital supply chain is the next breakthrough opportunity for the industry,” says John Kern, Cisco Systems SVP, Supply Chain, who will give the opening keynote at SEMICON West 2016 (July 12-14) at Moscone Center in San Francisco. “It’s the biggest area of investment for us now because it’s where we see the most potential.” The ability to leverage data, cloud, collaboration and mobility are making it possible to eliminate, simplify and automate processes, orchestrate activities across the supply chain in real time, and empower the workforce to focus on higher value work.

Cisco began its own journey to a digital supply chain with an update of its enterprise resource planning (ERP) system.It targeted several use cases to improve processes, such as using data to manage energy consumption within a factory to drive productivity and improve sustainability. Another was automating test processes to improve quality and reduce capital costs. But now Cisco has moved on to a broader view, of automating systems so employees don’t have to spend time gathering the information, but instead can focus on analyzing the information presented to them. “That will be the big game changer,” Kern contends.

Another example is the Cisco Supplier Collaboration Platform, which allows suppliers to see directly into their supply chain data so they can fix issues that arise, such as over or under supply directly ─ without all the usual escalations, email exchanges and delays. “There’s one single source of truth for ‘supply and demand’ that everyone can see, minimizing ‘the bull whip’ effect and enabling real-time response,” he notes.

This Supply Chain digitization is happening in concert with a disruption in business models all across the sector, as users shift from buying physical assets to buying outcomes, and paying as they receive the benefits. “The impact of the cloud and the service model is changing the way we think about supply chains,” say Kern. “We need to be able to offer any options our customers want, whether it’s hardware, software or solutions, and in any way they want to consume. Our supply chain has to adapt rapidly to enable these multiple business models.” Kern will elaborate on the topic at SEMICON West on July 12 as part of the executive events. SEMICON West also will be presenting eight business and technology forums. To register for SEMICON West 2016, visit www.semiconwest.org. For a limited time, register for only $100 (includes admission to keynotes, TechXPOTs, Silicon Innovation Forum, World of IoT Theater, 700 exhibits, and Intersolar).

By Paula Doe, SEMI

Emerging opportunities for advanced packaging solutions for heterogeneous integration include a lot more than logic, memory and sensors. There’s also the challenges of packaging integrated photonics, flexible electronics, and high-voltage, high-temperature wide-bandgap power devices. Speakers from the National Network for Manufacturing Innovation Institutes targeting these new growth markets will update the SEMICON West 2016 audience on their efforts to cut the time and cost of moving from R&D to volume production for U.S. companies by supporting development of key technologies, U.S.-based facilities for fabrication and packaging, and education of the workforce.

ap forum 2016-1

Integrating silicon with optics

The new American Institute for Manufacturing Integrated Photonics (AIM Photonics) is ramping up its program to spur development of U.S. technology and manufacturing capability for integrated photonics, for next-generation high performance computing, telecommunications, and sensors. In the packaging space, first steps will be a university-industry effort to develop passive fiber-to-silicon assembly technology and automated test equipment, with a manufacturing facility targeted for 2017.

“We’re focusing on packaging, assembly and test since it accounts for most of the cost of integrated photonics,” says CEO Michael Liehr, who will update on the plans to facilitate U.S. manufacturing in this emerging sector in the Packaging Photonics session at SEMICON West on July 12.

Attaching an optical fiber of 120µm diameter to a waveguide of only several thousand angstroms remains a major challenge, typically requiring active alignment.  Volume production will need a passive alignment solution, which will require some combination of major improvement in precision of current placement tools (such as with image recognition) with some way to make the coupling more fault tolerant ─ such as by using an interposer to bridge the gap. Tool makers will need standard package interfaces to make common, not custom equipment. The institute will also work on the packaging issues of integrating the laser with the waveguides and other optical features on silicon.

“Key elements are also missing for test,” Liehr notes. “The in-line part is missing. No one has put together a commercially available system that includes the prober, the optical detection, and the coupler needed.”  The institute is putting together a university and industry team to develop solutions, and then will equip a facility to do the test, assembly and packaging of these photonic integrated circuits.

AIM Photonics also targets a Process Design Kit (PDK) design kit by the end of the year for its multi-project photonic wafers run in its front-end fab. Besides data center and telecommunications applications of integrated photonics, AIM Photonics is working with companies on phased arrays and optical sensors for healthcare and defense applications. The organization is a public-private venture, funded by the U.S. Department of Defense, the States of New York, Massachusetts, California, Arizona, and university and industry members.

Integrating silicon die into flexible, conformable electronics systems

Another emerging “packaging” opportunity is integrating silicon intelligence into  flexible, stretchable products. “People have been talking for decades now about a purely printed solution, but printed transistors do not have enough mobility for the needed performance, and in a switching application will burn out in about a day” notes Jason Marsh, Director of Technology at NextFlex, the Manufacturing Innovation Institute for Flexible, Hybrid Electronics, who will talk about this effort at the SEMICON program on flexible packaging July 14. “But there is real demand for flexible, conformable products for medical wearable and implantable devices and for IoT edge devices.”  The collaborative program aims to develop the manufacturing technology to enable these products, by integrating silicon die into flexible, stretchable environments.

This will require the development of new processes for bridging directly from ~100µm-scale printed electronic circuits to 50µm-scale PCB artwork to much finer die-level bond-pad pitch, eliminating the usual intervening steps ─ of wirebond/flip chip, package, interposer, circuit board, connector ─ all at low temperature and with good signal integrity. Potential approaches could include flip chip with an anisotropic conductor connection, or alternatively, printing the traces directly on bigger pond pads. The institute aims to develop the basic building blocks of the technology and put together a U.S. supply chain that companies can then use to develop and manufacture their own products. NextFlex is building a facility in San Jose for the technology, which members can use to develop prototypes and build their pilot products.

Building this new manufacturing supply chain means re-thinking the traditional food chain of circuit board, packaging and assembly. “We may need to do things in different order, with die attach to the substrate before circuitization, and may need big arrays on big substrates, with new process tools to handle them,” suggests Marsh. “Package and assembly suppliers will need to understand more of the full end-to-end process, with assembly companies understanding packaging, and packaging companies understanding interposers.” The project aims to help bring these suppliers together, and also to help develop the necessary technical expertise in the workforce in the U.S. “The goal is to accelerate the speed of development from some 5-6 years to 1-2 years,” says Marsh.

The program is funded by $75 million from the U.S. government, and $96 million from the City of San Jose, and other corporate, academic, and government partners.

Building a U.S. ecosystem for wide bandgap power semiconductor manufacturing

PowerAmerica, the Next Generation Power Electronics Manufacturing Innovation Institute, aims to build the U.S. ecosystem for manufacturing wide bandgap power semiconductors, by supporting R&D, production facilities, and workforce development to accelerate the adoption of these smaller, lighter and more energy efficient power systems, and to make it easier for new and small U.S. companies to develop products.

“It’s about driving down cost and validating the reliability of SiC and GaN for demanding power electronics applications. The physics are clear. Wide bandgap semiconductors can offer very high-power densities and higher performance with a lower cost bill of materials. We are rapidly approaching the tipping point where market demand and production volume will bring the price of wide bandgap devices down to match silicon in $/Amp,” says John Muth, PowerAmerica’s deputy director, who will update on the effort in the power packaging program at SEMICON West on July 12.

Taking full advantage of the physical properties of wide bandgap semiconductors for high performance will require highly optimized packages that can handle high voltages while minimizing inductance and efficiently remove heat, with more reliable materials for interconnections, die attach, and baseplate/substrates, and better cooling solutions. One result of the packaging projects to date are the low inductance, high performance power modules recently announced by Wolfspeed.

PowerAmerica activities across the supply chain range from the 6-inch SiC foundry at X-Fab in Lubbock, Texas, now being used by five members, to products under development by end users across in transportation, renewable energy, motor drives, data centers, and the power grid, at members such as ABB, Agile Switch, Atom Power, John Deere, Navitas, Lockheed-Martin, and Toshiba.

The institute has recently also started to invite unsolicited proposals that solve a technical problem to help grow and strengthen the supply chain or to accelerate adoption of SiC or GaN into new products. All projects have 1:1 cost sharing, and require a clear path to market. Other efforts include aggressive demonstrations of wide bandgap semiconductor performance by universities, industry-led road mapping activities, and curriculum development at member universities, and tutorials and short courses to bring industry engineers quickly up to speed in GaN and SiC technology.

The five-year $146 million program is funded by $70 million from DOE and another $76 million from cost matching from its members and the state of North Carolina.

To learn more about SEMICON West 2016, visit the Schedule-at-a-Glance and learn about the eight forums.

Correction: The first draft of this article stated in error that Jason Marsh’s talk would take place on July 12. Jason Marsh will speak on flexible packaging at SEMICON West on July 14.

Each year at SEMICON West, the “Best of West” awards are presented by Solid State Technology and SEMI. More than 700 companies exhibit at SEMICON West and 26,000+ professionals attend, from the electronics manufacturing supply chain. The “Best of West” award was established to recognize new products moving the industry forward with technological developments in the electronics supply chain.

The Best of West 2016 Finalists will be displaying their products on the show floor at Moscone Center from July 12-14:

  • Coventor: SEMulator3D – A 3D semiconductor process modeling platform that can predicatively model any fabrication process applied to any semiconductor design. Starting from a “virtual” silicon wafer, the product performs a series of unit processes like those in the fab to create highly accurate 3D computer models of the predicted structures on wafer. (Facilities and Software category; Booth #2622)
  • CyberOptics: WaferSense® and ReticleSense® Auto Multi Sensors (AMS) – Wireless sensor devices capable of multiple measurements (leveling, vibration and relative humidity) to save time and expense while improving yields. WaferSense AMS travels through virtually any tool with its thin and light form factor, while ReticleSense AMSR has the same measurement capabilities in a reticle shaped form factor. (Metrology and Test category; Booth #2323)
  • Graphenea: Graphene Integration on CMOS-Fab – Allows large-scale manufacture of 200mm CMOS-compatible graphene wafers (SEMI Standards), with low metal contamination levels. The industrial production method will produce uniform, large-scale/high-performance graphene in high yields and a reliable manner. (Advanced Materials and Materials Management category; Booth #632)
  • Kulicke & Soffa Industries: IConn MEM PLUS High Performance Wire Bonder for Memory Devices – A new high-performance memory device bonder for gold and silver alloy wire bonding. With its advanced process, looping, overhang control and ease of use capabilities, it delivers high quality and productivity benefits in complex multi die stack package applications. (Assembly/Packaging Solutions category, Booth #6060)
  • Rorze Automation: Rorze N2 Purged LP – Maintains low humidity during critical steps. A typical bottom purged LP can only offer control of an average of 30 percent RH. However, N2 purge LP from Rorze (patent pending) can offer a humidity control that is better than 5 percent. (Components and Subsystems category; Booth #1613)
  • SPTS Technologies (an Orbotech company): Rapier-300S – A production silicon DRIE module, designed specifically for dicing of 300mm  wafers mounted on 400mm frames. It builds on SPTS experience in plasma singulation of framed 150mm and 200mm wafers, and employs patent-protected end-pointing and process control techniques, critical to delivering stronger die than traditional dicing methods. (Assembly/Packaging Solutions category; Booth #1417)

The Best of West Award winner will be announced during SEMICON West (www.semiconwest.org) on Wednesday, July 13, 2016.

Today, SEMI announced that the latest packaging solutions will be the topic of an in-depth session at the SEMICON West 2016 Advanced Packaging Forum – and on display on the exhibition floor. Rapidly changing technologies and accelerated product life cycles are driving the need for new assembly and packaging solutions suited for next-generation products such as Internet of Things (IoT) devices and wearables. To meet these packaging needs, semiconductor technologies with smaller form factors, lower power consumption, and flexible designs are increasingly in demand.

Advanced Packaging Forum 

Six complimentary packaging sessions are offered at the Advanced Packaging Forum at SEMICON West’s TechXPOT North stage. Pre-registration is required. Sessions explore what’s ahead in the world of packaging and assembly. The three-day forum will explore the challenges posed by new and emerging devices and offer solutions capable of enabling them. Technical sessions include:

  • SiP Next 1: Processor – Memory/Analog Integration
  • SiP Next 2:  IoT & Smart Things – SiP Integration
  • Sensing the Future: Enabling Applications for a Smarter World
  • Packaging Developments for Flexible, Hybrid Electronics
  • Packaging Power: Enabling a Variety of Applications and Efficiency
  • Packaging Photonics for Speed & Bandwidth

Sessions feature speakers from Cisco, Mentor Graphics, Texas Instruments, and more.  Attendees will learn about the latest in electronic packaging, thermal management, additive manufacturing, simulation, and reliability assessment; system optimization and differentiation through heterogeneous integration and SiP; sensor technologies for monitoring and analyzing complex data streams; and other advanced developments.

Packaging and Assembly Equipment Exhibitors

This year’s SEMICON West exposition also features packaging solutions on the show floor. Attendees can view more than sixty new products from some 200 exhibitors.

The industry is seeing dramatic changes and SEMICON West 2016 has expanded its technical programming by nearly 50 percent to help attendees get a clear view of the road ahead. To learn more about SEMICON West 2016’s eight new forums (Extended Supply Chain, Advanced Manufacturing, Advanced Packaging, Test, Silicon Innovation, Flexible Hybrid Electronics, and World of IoT), visit www.semiconwest.org.

By Paula Doe, SEMI

The changing market for ICs means the end of business as usual for the greater semiconductor supply chain. Smarter use of data analytics looks like a key strategy to get new products more quickly into high yield production at improved margins.

Emerging IoT market drives change in manufacturing

The emerging IoT market for pervasive intelligence everywhere may be a volume driver for the industry, but it will also put tremendous pressure on prices that drive change in manufacturing. Pressure to keep ASPs of multichip connected devices below $1 to $5 for many IoT low-to-mid end applications, will drive more integration of the value chain, and more varied elements on the die. “The value chain must evolve to be more effective and efficient to meet the price and cost pressures for such IoT products and applications,” suggests Rajeev Rajan, VP of IoT, GLOBALFOUNDRIES, who will speak on the issue in a day-long forum on the future of smart manufacturing in the semiconductor supply chain at SEMICON West 2016 on July 14.

“It also means tighter and more complete integration of features on the die that enable differentiating capabilities at the semiconductor level, and also fewer, smaller devices that reduce the overall Bill of Materials (BOM), and result in more die per wafer.” He notes that at 22nm GLOBALFOUNDRIES is looking to enable an integrated connectivity solution instead of a separate die or external chip. Additional requirements for IoT are considerations for integrating security at the lower semiconductor/hardware layers, along with the typical higher layer middleware and software layers.

This drive for integration will also mean demand for new advanced packaging solutions that deliver smaller, thinner, and simpler form factors. The cost pressure also means than the next nodes will have to offer tangible power/performance/area/cost (PPAC) value, without being too disruptive a transition from the current reference flow. “Getting to volume yields faster will involve getting yield numbers earlier in the process, with increasing proof-points and planning iterations up front with customers, at times tied to specific use-cases and IoT market sub-segments,” he notes.

Rapid development of affordable data tools from other industries may help

Luckily, the wide deployment of affordable sensors and data analysis tools in other industries in other industries is developing solutions that may help the IC sector as well.  “A key trend is the “democratization” – enabling users to do very meaningful learning on data, using statistical techniques, without requiring a Ph.D. in statistics or mathematics,” notes Bill Jacobs, director, Advanced Analytics Product Management, Microsoft Corporation, another speaker in the program. “Rapid growth of statistics-oriented languages like R across industries is making it easier for manufacturers and equipment suppliers to capture, visualize and learn from data, and then build those learnings into dashboards for rapid deployment, or build them directly into automated applications and in some cases, machines themselves.”

Intel has reported using commercially available systems such as Cloudera, Aquafold, and Revolution Analytics (now part of Microsoft) to combine, store, analyze and display results from a wide variety of structured and unstructured manufacturing data. The system has been put to work to determine ball grid placement accuracy from machine learning from automatic comparison of thousands of images to select the any that deviate from the known-good pattern,  far more efficiently than human inspectors, and also to analyze tester parametrics to predict 90% of potential failures of the test interface unit before they happen.

“The IC industry may be ahead in the masses of data it gathers, but other industries are driving the methodology for easy management of the data,” he contends. “There’s a lot that can be leveraged from other industries to improve product quality, supply chain operations, and line up-time in the semiconductor industry.”

Demands for faster development of more complex devices require new approaches

As the cost of developing faster, smaller, lower power components gets ever higher, the dual sourcing strategies of automotive and other big IC users puts even more pressure on device makers to get the product right the first time. “There’s no longer time to learn with iterations to gradually improve the yield over time, now we need to figure out how to do this faster, as well as how to counter higher R&D costs on lower margins,” notes Sia Langrudi, Siemens VP Worldwide Strategy and Business Development,   who will also speak in the program.

The first steps are to recognize the poor visibility and traceability from design to manufacturing, and to put organizational discipline into place to remove barriers between silos. Then a company needs good baseline data, to be able to see improvement when it happens. “It’s rather like being an alcoholic, the first step is to recognize you have a problem,” says Langrudi. “People tell me they already have a quality management system, but they don’t. They have lots of different information systems, and unless they are capturing the information all in one place, the opportunity to use it is not there.”

Other speakers discussing these issues in the Smart Manufacturing Forum at SEMICON West July 14 include Amkor SVP Package Products Robert Lanzone, Applied Materials VP New Markets & Services Chris Moran, Intel VP IoT/GM Industrial Anthony Neal Graves, NextNine US Sales Manager Don Harroll, Optimal+ VP WW Marketing David Park, Qualcomm SVP Engineering Michael Campbell, Rudolph Technologies VP/GM Software Thomas Sonderman, and Samsung Sr Director, Engineering Development, Austin, Ben Eynon.

Learn more about the speakers at the SEMICON West 2016 session “Smart Manufacturing: The Key Opportunities and Challenges of the Next Generation of Manufacturing for the Electronics Value Chain.” To see all sessions in the Extended Supply Chain Forum, click here.

By Debra Vogler, SEMI

A forum of industry experts at SEMICON West 2016 will discuss the challenges associated with getting from node 10 — which seems set for HVM — to nodes 7 and 5. Confirmed speakers at the “Node 10 to Node 5 ─ Dealing with the Slower Pace of Traditional Scaling (Track 2)” session on Tuesday, July 12, 2:00pm-4:00pm, are Lode Lauwers (imec), Guy Blalock (IM Flash), Kelvin Low (Samsung), Mike Chudzik (Applied Materials), Kevin Heidrich (Nanometrics), and David Dutton (Silvaco). SEMI interviewed Lauwers and Chudzik to see what challenges they see ahead as the industry progresses from node 7 to node 5.

According to Mike Chudzik, senior director, Cross-Business Unit Modules Team at Applied Materials, “The top tw or three process development challenges facing the industry at node 7 are RC reduction, RC reduction, and RC reduction,” Chudzik told SEMI. “At the 7nm node, parasitic resistance and parasitic capacitance delays are predicted to be greater than the inherent transistor delay.” Among the solutions he cites are new materials such as cobalt for the contact fill, lower-k spacers, and integration solutions, such as air-gap and replacement contact schemes. “While FinFETs are expected to scale to the 7nm node, their days are numbered. If you want to scale to the true historical 0.7X 7nm node, it’s a challenge for FinFETs because continuing to scale the gate length requires scaling the fin width.” He also explained that the variability in patterned fins will cause serious device performance challenges at near 5nm fin width on account of quantum confinement. “Something new like gate-all-around (GAA) devices are needed to fuel the next-generation of device scaling.”

Figure 1: At the 7nm node (CD of 13nm), the resistance of the TiN/W fill materials for the contact plug is expected to become higher than the interfacial contact resistance. SOURCE: Applied Materials

Figure 1: At the 7nm node (CD of 13nm), the resistance of the TiN/W fill materials for the contact plug is expected to become higher than the interfacial contact resistance. SOURCE: Applied Materials

Among the materials challenges in getting to nodes 7 and 5 are cobalt implementation for the contact, and Si/SiGe superlattices for the 5nm node, explained Chudzik. “The former challenge concerns replacing tungsten in the contact plug, and the latter is needed to form horizontal GAA structures.” Figure 1 shows that at the 7nm node (CD of 13nm) the resistance of the TiN/W fill material for the contact plug is expected to become higher than the interfacial contact resistance. “A TiN/Co solution provides relief.”

In addition to improving the performance of the interconnect, Lode Lauwers, VP, business development for CMOS technology at imec, told SEMI that getting to node 7 will require very advanced fin technology combined with a patterning solution. Looking ahead to node 5, he said it is expected that the fin will still be the reference technology, along with the introduction of new materials such as SiGe, and a high concentration of Ge in the channel as a mobility improvement, and possibly even the consideration of III-V materials (particularly at N5) (see Figures 2 and 3).

Figure 2: Performance and energy efficiency roadmap: devices architectures. SOURCE: imec

Figure 2: Performance and energy efficiency roadmap: devices architectures. SOURCE: imec

Figure 3: Performance and energy efficiency roadmap: transistor features that are driving the logic roadmap. SOURCE: imec

Figure 3: Performance and energy efficiency roadmap: transistor features that are driving the logic roadmap. SOURCE: imec

In looking out towards the horizon, Lauwers pointed out that the industry has to consider alternatives to the fin because there is an engineering limit to how small the fin dimensions can be made. “There is the possibility that at node 5 the industry will consider alternatives to the traditional fin, said Lauwers. “For example, the GAA structure (also referred to as a lateral or horizontal nanowire, HGAA) is superior in terms of gate control and will have better leakage control. That means you will be able to have better performance over a lower supply voltage with a lower threshold voltage.”

Beyond HGAA structures, Lauwers observed that the industry could move to a vertical nanowire structure (VGAA). But there are several contenders (see Figure 2). “It’s not up to imec to choose and it’s too early to say what will be the right option,” Lauwers told SEMI. “Maybe for certain applications or a certain technology positioning, a device maker might make a different compromise.”

In addition to imec and Applied Materials, speakers from IM Flash, Nanometrics, Samsung, and Silvaco will present at the “Scaling: Node 10 to Node 5” session of the three-day Advanced Manufacturing Forum (see Schedule-at-a-Glance) at SEMICON West 2016 which takes place July 12-14 in San Francisco, Calif.

As the opening day of SEMICON West (July 12-14) approaches, the electronics manufacturing industry is experiencing disruptive changes, making “business as usual” a thing of the past. To help technical and business professionals navigate this fast-changing landscape, SEMICON West programming has been upgraded extensively ─ increased from 170 hours to 250 hours this year. New brand and deep programming provide insights into the latest megatrends and helps attendees identify new opportunities and refine sound strategic plans.

At this year’s expo, several new forums designed to enhance collaboration within shared communities of interest will debut. Lead by technical experts, top analysts, and leaders from some of the biggest names in electronics, the new forums are generating significant advance interest and buzz, key among them:

  • Advanced Manufacturing Forum: Twelve cutting-edge sessions — from What’s Next in MEMS and Sensors to Power Electronics and 3D Printing — will be presented by Samsung, Applied Materials, Texas Instruments, and more. Attendees will learn about new technologies on the horizon and how they impact semiconductor manufacturing.
  • Flexible Hybrid Electronics Forum: Flexible Hybrid Electronics is driving new processes and packages, providing innovative approaches for health-monitoring, wearables, soft robotics, and other next-generation products. Attendees will get details on thinned device processing, system design, reliability testing and modeling from experts at Qualcomm, PARC, and GE Global Research.
  • World of IoT Forum: Forecasters predict that IoT will soon become a $6 trillion market. The World of IoT Forum brings together leading suppliers, integrators, and solution providers at the forefront of innovations in mobility, network-connected devices, and automotive and healthcare applications, among others. Attendees will learn about the trends impacting the market, including big data and analytics, smart things, and MEMS and sensor manufacturing.

With so many disruptive trends driving the market, it is critical for industry professionals to have a clear view of the road ahead. With its vastly expanded technical and business programming, this year’s expo will deliver the strategic insights needed to survive and thrive. To learn more and to register, visit SEMICON West Forums.