Advanced process uses existing fab technology
07/01/2002
By John Haystead
In the semiconductor in dustry, there are lots of holy grails. But perhaps one of the holiest is the ability to advance Moore's law using existing process equipment and facilities.
One recent quest in pursuit of this goal has led to a partnership between IQE Silicon Compounds Ltd (Car diff, UK) and fabless design firm Amber Wave Systems Corp. (Salem, NH). Under the terms of the agreement, IQE will be the first high-volume manufacturer of 150 and 200 mm epiwafers based on Amber Wave's proprietary "(epsilon) MOS" strained silicon technology.
Integrated circuits manufactured from strained silicon operate at higher speed and consume less power than conventional silicon devices. Equally important, however, Amber Wave's strained silicon manufacturing process uses the existing silicon infrastructure, so no additional capital investment is necessary.
"This is the solution the industry has been searching for, and we're thrilled to work with AmberWave to deliver it," says Dr. Drew Nelson, IQE's president and chief executive.
"The high-speed, high-transconductance devices manufactured from strained silicon wafers are targeted at next-generation digital, wireless and optoelectronic applications.
Process in brief
To produce strained silicon; a layer of silicon is grown on top of a graded silicon germanium (SiGe) layer, which is itself grown on top of a normal silicon substrate. In the process, the thin top layer of silicon modifies its lattice structure to conform to the top-most silicon germanium layer, becoming stretched or "strained." Because the SiGe layer is much thicker, the larger germanium atoms stretch the silicon atoms in the active layer, generating higher electron mobility and somewhat higher hole mobility in complimentary metal oxide semiconductor (CMOS) devices.
Growing the kinds of SiGe graded layers required to produce strained silicon, however, presents two major problems-defect propagation into the strained silicon layer and surface "crosshatch." As the composition of germanium increases, the atomic lattice is distorted to the point at which crosshatching occurs, leading to high surface quality defect levels and material unsuitable for fabricating state of the art ULSI circuits. Building on materials development work conducted at the Massachusetts Institute of Technology (Cambridge, MA), AmberWave and its founder, MIT Professor Dr. Gene Fitzgerald, has developed a process that solves these problems. AmberWave's approach incorporates a chemical mechanical polishing (CMP) step into the epitaxial growth process. The patented technique allows grading of the epitaxial layer from 100 percent silicon to 100 percent germanium.
Particle measurement challenge
Although most compound semiconductor fabs work at the ISO Class 7 to 6 level, IQE's Cardiff facility includes a ISO Class 3 cleanroom equipped with state-of-the-art ASM CVD epitaxial structure deposition reactors, as well as wafer preparation and characterization tools. The facility has been up and running since August of 2000.
Here, crosshatching creates an additional contamination-monitoring problem for IQE's deposition process. As described by Robert Harper, technical sales manager, IQE Silicon Compounds Ltd, "When particle analysis systems try to measure particles on the stepper layers prior to CMP, any particles much below two microns are lost in the crosshatch."
IQE is working to develop new particle measuring techniques to address the challenge such as the use of different oblique angles of incidence, but Harper says, "We're still very much at the start of that road."
Fortunately, in the AmberWave process, the SiGe layer is polished to the point where conventional particle detection techniques and systems can be employed. This is true for the final thin silicon layers as well.
The other way that IQE monitors the particle performance of its deposition process, however, is by growing identical control films but without introducing Germanium, and therefore crosshatching. These films can then be analyzed using conventional tools and approaches.
As emphasized by Harper, however, there are no unique new sources of contamination in the strained-silicon process and, "other than this pre-CMP monitoring step, the contamination control and defect measurement challenges are no different than those of conventional merchant substrate suppliers."
Currently, IQE is supplying initial samples for qualification and is working on development of a process for 300 mm production.
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