Device Architecture

DEVICE ARCHITECTURE ARTICLES



IGI releases WYSIWYG phototool editing, definition, viewing, and ordering product

06/30/2010 

Infinite Graphics Incorporated (IGI) debuted the IGI Phototooling Toolbox for niche applications with specialized requirements not addressed by traditional mainstream PCB and IC products.

IITC Day 3: Sub-30nm SoG gapfill, 22nm airgaps...and enforcing Zafiropoulo's Law

06/15/2010 

Techcet's Michael A. Fury concludes his observations from this year's IEEE International Interconnect Technology Conference (IITC) meeting near San Francisco. From Day 3: Intel's airgaps for 32-22nm, Si nanowires, more on 3D bonding and TSV schemes, electromigration in Au nano-junctions -- and enforcing "Zafiropoulo's Law."

IITC Day 2: Backend memory, MEMS, 3D/TSV -- and no firearms

06/14/2010 

Techcet's Michael A. Fury continues his observations from this year's IEEE International Interconnect Technology Conference (IITC) meeting near San Francisco. From Day 2:  Back-end memory, MEMS, reliability/characterization, and posters spanning the breadth of interconnect topics, especially 3D TSV and MEMS integration.

IITC Day 1: 3D/TSV, Cu barrier films, critical collaboration

06/11/2010 

Techcet's Michael A. Fury continues his observations from this year's IEEE International Interconnect Technology Conference (IITC) meeting near San Francisco. From Day 1: Themes including variations on 3D and through-silicon vias (TSV), and barrier films for reducing copper electromigration.

IMEC Tech Forum roundup: Expansion, germanium TPV, "electronic nose"

06/08/2010 

A slew of announcements and developments out of this week's IMEC Technology Forum (June 7-8, Leuven, Belgium) span the gamut from facilities expansion to GE photovoltaics and gas sensor devices.

IITC Day 0: Short course reflects interconnects' maturity

06/07/2010 

Techcet's Michael A. Fury opens his series of observations from this year's IEEE International Interconnect Technology Conference (IITC) meeting near San Francisco, reporting from the opening-day "short course" where more holistic discussions showed just how far interconnect technology has come in the past decade.

450mm wafers: More at stake than just a new wafer size

06/04/2010 

The ongoing debate over the next wafer-size transition to 450mm, with discussions about pros and cons in costs and technology gains, misses the point -- it's the message we send about the semiconductor industry's mindset and future, argues Semico's Joanne Itow.

Key takeaways from AMAT: Silicon strong, memory floats, solar sags

05/24/2010 

Comments in Applied Materials' fiscal 2Q10 conference call (May 19), and from analysts examining them and the numbers, highlights several key observations for company's various businesses (semiconductors, solar, FPD) and overall market observations.

Deconstructing Samsung's capex splurge

05/21/2010 

Samsung says it will spend nearly $10B in capex just for semiconductor manufacturing, and $B overall -- nearly double its initial plans, and two-thirds higher than in 2009. Analysts tell SST what's significant inside the numbers (foundry), and what it means for the rest of the industry -- and why 2011-2012 might now look a lot different.

ConFab video: Consensus, collab are key to industry progress

05/20/2010 

SEMATECH's Dan Armbrust underscores the need to determine up-front what areas are truly important to keep pushing scaling and cost-effectiveness in the semiconductor industry.

ConFab: Flash memory set for strong growth

05/18/2010 

In his Monday keynote at The ConFab in Las Vegas, SanDisk's Eli Harari described the evolution of flash memory storage due to "relentless" cost improvements, current joint development that could "usher the second solid-state drive wave," and the future of a "post-NAND" world.

NOR flash revenue set to grow in 2010 after downturn

05/14/2010 

Buoyed by improved demand and a brightening macroeconomic environment, NOR flash memory market revenue is projected to return to growth in 2010, according to iSuppli Corp. The climb will be modest: from $4.6 billion in 2009 to $4.8 billion in 2010.

Novellus tips WN film for ≤3X memory Cu interconnects

05/10/2010 

Novellus says it has devised a new process technology for connecting tungsten vias to Cu interconnects in 3X node and below memory devices.

Analyst: DRAM "lurched" to profits in 2009; DDR3 changeover imminent

05/05/2010 

The year 2009 started at one extreme (bad), but by year's end the DRAM sector had managed to "lurch" to the high end of the scale to finish the year with its first profitability since 2007, according to data from iSuppli.

IBM: 3D nanopatterning goes sub-15nm, beats e-beam litho

04/27/2010 

A new nanopatterning technique demonstrated by IBM can achieve 15nm resolutions, and could supplant e-beam lithography in applications ranging from CMOS to self-assembled nanoscale objects, and for materials including "molecular glass."

Fairchild, Infineon compatibility agreement aligns power MOSFET packages

04/22/2010 

Fairchild Semiconductor and Infineon Technologies formed a packaging partnership for their power MOSFETs in the MLP 3x3 (Power33 or S3O8) and PowerStage 3x3 packages.

MRS Day 4: TSVs and CMOS+MEMS, wafer bonding, CNT interfaces, ALD for rare-earth HK, graphene redux

04/19/2010 

Highlights from Day 4 of the 2010 MRS Spring meeting, reported by Techcet's Michael A. Fury: TSVs and flexible interconnects for 3D CMOS/MEMS; 300mm BCB wafer bonding; carbon nanotube interfaces for interconnects and vias; phase-change memory devices; interfaces during ALD of rare earth-based high-k dielectrics; and graphene's use in on-chip interconnects and transparent conductor electrodes.

MRS Day 2: CVD for Cu, low-k etch stop, future FETs, graphene "atom hopping"

04/14/2010 

Techcet's Michael A. Fury continues his series of observations from this year's MRS Spring meeting in San Francisco. From Day 2: CVD for Cu interconnects, controlling low-k etch-stop layers, materials challenges for future FETs, "atom hopping" in graphene, and oxide nanoelectronics on demand.

MRS Spring 2010 meeting, Day 1: Charge-trapping NVM, organics, graphene, PV

04/13/2010 

In an SST exclusive, Techcet's Michael A. Fury offers a series of observations from this year's MRS Spring meeting in San Francisco. First up: Day 1 discussions ranging from memory architectures, organic electronics, graphene, and solar photovoltaics.

EU group takes stride toward optical interconnects

04/12/2010 

An EU-funded project has come one step closer to its goal of building silicon photonics circuits, with the creation of a fully CMOS-compatible laser source coupled to a silicon waveguide.




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