07/03/2007  July 3, 2007 - STMicroelectronics is looking to offload CMOS image sensor work to both TSMC and ProMOS Technologies in an effort to reduce manufacturing costs ahead of an expected transition from 200mm to 300mm production requirements, according to a Digitimes report.

07/02/2007  July 2, 2007 - Chinese flagship foundry SMIC is transferring IP and "know-how" of 90nm process technologies to Israeli development partner Saifun Semiconductors Ltd., as the two firms get ready to launch 90nm-based 2GB NAND flash products later this year.

07/02/2007  July 2, 2007 - After a slight downtick in April, global chip sales moved back into positive growth again in May -- but just barely, according to new data from the Semiconductor Industry Association (SIA). Worldwide semiconductor sales moved back above the $20 billion benchmark to $20.3 billion in May, a scant 1.2% growth vs. April and 2.4% above May 2006 levels.

06/29/2007  June 29, 2007 - Kingston and Smart Modular Technologies continued to lead the DRAM module sector in 2006, but other firms shot up the ladder riding success at customers Lenovo and Hewlett-Packard, according to data from iSuppli Corp.

06/29/2007  June 29, 2007 - Acacia Research Corp. says it has purchased three portfolios of patents from Alliance Semiconductor that include 36 US patents covering technologies ranging from memory (flash and DRAM), and computer and gaming console graphics.

06/29/2007  June 28, 2007 - Nearly half (48%) of global wafer capacity comes from the semiconductor industry's biggest 10 firms, and nearly a third of all capacity in 2006 came from the top five companies: Samsung, TSMC, Intel, Toshiba, and UMC, according to a new report from IC Insights.

06/27/2007  June 27, 2007 - Qimonda AG and Taiwan's Winbond Electronics Corp. have extended their DRAM foundry agreement, under which Qimonda will transfer 75nm and 58nm DRAM trench technology to Winbond's 300mm facility in Taichung, Taiwan.

06/26/2007  Andrew Chien is head of all Intel research, responsible for thinking about new microprocessors, new applications, and novel fab-able devices. He talked with WaferNEWS during the chipmaker's Research Day about where opportunities exist in the intersection of digital CMOS fabrication technology and biological applications, how Intel is trying a super-computer architecture end-run on IBM's Blue Gene, and why it's becoming much easier for designers to innovate at the architectural level.

06/26/2007  Last week, WaferNEWS reported on research revealed at the recent VLSI Symposium in Japan about high-k dielectrics and metal gates (HK+MG) from top chipmakers including Intel and IBM, as well as NEC, Toshiba, and Samsung. This week we look at HK+MG work and other leading-edge research being done by consortia, through exclusive interviews with SEMATECH and IMEC.

06/25/2007  June 25, 2007 - Hynix Semiconductor reportedly will migrate its 60nm NAND flash to 57nm production at its 200mm fabs in 3Q07 in a move to cut costs by around 20%, as rivals Samsung and Toshiba continue to press on to 56-50nm, according to a Digitimes report citing "downstream customers."

06/20/2007  In an exclusive interview with WaferNEWS, Mukesh Khare, project manager for IBM's high-k/metal-gate development, discusses details of the company's new high-k/metal-gate (HK+MG) transistor technology, a "gate first" approach that keeps the same processing sequence used by traditional SiON gates, allowing for both technologies to be run on the same line and minimizing integration costs. "We picked the approach that is simple, scalable, and also migrate-able," he explained.

06/19/2007  This year's VLSI Symposium (June 12-14, Kyoto, Japan) revealed there will be not one, but many different solutions for the production implementation of hafnium-based oxides at the 45nm node and beyond -- e.g., poly or MIPS gate electrodes, single- or dual-metal, and various gate process flow integration approaches, from gate-first to gate-last and even a hybrid. The question is, how long can the industry support these multiple approaches? Will they converge beyond the 32nm node -- if at all?

06/15/2007  June 15, 2007 - NEC Corp. and NEC Electronics Corp. say they have jointly developed a "breakthrough" yield-evaluation method to enable robust design of low-power, high-performance system LSIs.

06/15/2007  June 15, 2007 - Renesas Technology Corp. has developed a technology for implementing SRAM in 32nm processes and beyond for on-chip SRAM incorporated into a microprocessor or SoC.

06/15/2007  June 15, 2007 - Renesas Technology Corp. is reporting improved results for its high-performance transistor technology with "low-cost fabrication capability" for 45nm-and-below microprocessors and SoC devices, utilizing the company's complimentary metal insulator semiconductor (CMIS) hybrid structure first disclosed at IEDM in December 2006.

06/14/2007  As part of research designed to manufacture carbon nanotubes (CNTs) as viable replacements for copper in 3D die-stacking applications, researchers at Rensselaer Polytechnic Institute have implemented a method for compacting CNTs into bundles, enabling better thermal and electrical conductivity. Densification occurs post-growth, allowing scientists to use a known, conventional CNT growth process. CNT density was increased 5–25× in the experiments.

06/14/2007  June 14, 2007 - Samsung Electronics Co. Ltd. has opened its new 300mm NAND flash memory wafer plant in Austin, TX, a $3.5 billion facility nearly twice the size of Samsung's adjacent existing 200mm fab. The new 300mm site will start operation later this year initially focusing on 16Gbit flash chips and 50nm process technologies, and ramp to 60,000 wafers/month output by 2008.

06/14/2007  June 14, 2007 - Silterra Malaysia says it has signed a "joint development project" with European R&D consortium IMEC to create a foundry-compatible 90nm CMOS process technology, based on IMEC's process, with intention to scale to 65nm (while developing a 110nm derivative in parallel). The two already had worked on 0.13-micron process technology under a deal signed in June 2004.

06/14/2007  June 13, 2007 - Providing updates on work performed with its 32nm CMOS research partners at this week's VLSI Symposium, IMEC says it has improved its process to yield "reproducible" finFETs with fin widths down to 5nm, and high aspect ratios, using 193nm immersion lithography and dry etching. However, "several bottlenecks have to be overcome" before the finFETs can be viable in manufacturing.

06/14/2007  June 13, 2007 - With prices showing signs of firming up and demand on the rise, Toshiba Corp. says it will increase production capacity of mainline flash memory by 70% over the next 12 months, according to the Nikkei daily paper.