Issue



Manufacturing flexible displays: The challenges of handling plastic


05/01/2013







NICK COLANERI, Flexible Display Center, Arizona State University, Phoenix, AZ


The first flexible high-resolution displays will be produced using materials handling techniques that have been developed to allow the use of existing thin transistor fabrication facilities.


After more than a decade of development, the release of the first commercial products containing flexible displays is expected later this year. The companies that have made product release announcements have been relatively quiet about technical details, but it is likely that the mechanical flexibility of these products will be limited. Most of the effort to date has been focused on issues related to producing flexible display panels, with relatively less attention given to the mechanical vulnerability of interconnects and the other components of the systems incorporating these displays. Still, the arrival of the first products will be an important milestone along the path to truly flexible electronics.


The fabrication of flexible displays presents two key challenges. First, a glass substrate underlies all flat panel displays, and conventional display glass is both rigid and frangible. A number of flexible alternatives have now been investigated. Second, all high-resolution displays use an array of thin film transistor circuits to supply voltages or currents to modulate the appearance of the individual pixels. These thin film devices are produced using vacuum deposition and photolithographic patterning techniques that exploit the flatness and high-temperature tolerance of the glass substrate. To shorten development time it is desirable to use this existing infrastructure, so alternative substrates should closely mimic these features of glass.


The principal substrate alternatives investigated over the last decade have been metal foils and polymer films. Recently, Corning and other glass manufacturers have also developed flexible glasses that are suitable for use in displays. In the last year, many companies have established the capability to produce these materials in rolls resembling polymer film, but this is a recent development. The most advanced prototypes shown at recent trade shows, such as FPD International in Yokohama or the Consumer Electronics Show in Las Vegas, have all relied on polymer substrates.


In order to process polymer films through conventional thin film transistor lines, it is necessary to develop methods for handling them. It is also necessary to modify certain process steps to avoid exceeding their temperature limits. Thus far, two different approaches have been developed for handling the films. Both essentially bond the material to a rigid carrier panel and then release the film after transistor fabrication. More exotic approaches involving "roll-to-roll" handling of the substrate are also frequently discussed, but layer-to-layer registration with a conventional deposition and patterning process remains a formidable challenge when the film is handled in this way.


The first approach to immobilizing a polymer film, pioneered at Philips Electronics over a decade ago, involves the coating of a thin layer of the polymer onto a rigid carrier from a solvent. Most of the groups practicing this technique are using a polyimide. The polyimide layer is sufficiently thin (typically only a few tens of microns) so that it will mechanically mimic the properties of the carrier, which is usually ordinary display glass. The thermal expansion or contraction of the thin polymer layer is constrained by the carrier, so the only limitation on process temperatures is the degradation that will begin to occur somewhat above 250??C (depending on the specific chemical composition of the polyimide). After transistor arrays have been fabricated on the free surface of the polymer, it is released by rastering a laser across the back side through the carrier. The laser, which generates a wavelength corresponding to a strong absorption band of the polymer, ablates a very thin layer where it is in contact with carrier, thereby releasing it.


The laser release process is intrinsically slow and generates debris that must be managed, but this process has been successfully employed by a number of groups. Other challenges are associated with the mechanical stresses that accumulate in the stack of materials comprising the transistor array during the fabrication process. This can lead to delamination of the transistors, either during the release or when the display is subjected to a mechanical shock. In addition, because the polymer substrate is so thin, it is not self-supporting. If it is simply released from the carrier, the stresses in the transistor layers will cause it to curl up into a tube with a curvature radius of several millimeters. The post-process must therefore be carefully designed to accommodate this fact.


Despite these challenges, a number of groups have sufficiently mitigated them to produce impressive prototypes using this handling process. E-Ink holdings, for example, have shown 9 in. diagonal electrophoretic display prototypes with a resolution of about 150dpi that are made on a pilot production line which uses this process. The electrophoretic laminate is stiff enough to overcome the tendency of the backplane substrate to curl, and the entire structure is about as flexible as a credit card.


The Flexible Display Center at Arizona State University has developed a second approach to flexible substrate handling in which a polymer film is bonded to a rigid carrier using an engineered adhesive. As in the technique discussed above, this composite substrate is then processed in conventional thin film transistor fabrication tools, after which the polymer film is released using a simple mechanical process. In the remainder of this article some of the details of this process will be described.


The substrate handling process has been done with a wide variety of flexible materials, including stainless steel foil, polyimides, and thin glass. The most extensive experience, however, is with Teonex?? PEN film from Dupont-Teijin Films, a heat-stabilized high-temperature polyester. It has been expressly designed for optical applications, and exhibits excellent transparency and dimensional stability during processing. The film used has 125??m thickness, although other thicknesses are available. The details of the transistor fabrication process must be varied depending on this thickness, as it has an impact on the evolution of film stresses during the process.





FIGURE 1. 370mmx470mm carrier panel with bonded PEN substrate, following fabrication of twelve 320x240 thin film transistor circuits using IGZO as the active semiconductor.
FIGURE 1. 370mmx470mm carrier panel with bonded PEN substrate, following fabrication of twelve 320x240 thin film transistor circuits using IGZO as the active semiconductor.

The PEN (or other) film is bonded to a carrier made of a high temperature ceramic which is stiffer than display glass and has a coefficient of thermal expansion much closer to that of the polymer. Panels are routinely processed with this material which are provided at Gen II size, i.e. 370mmx470mm (FIGURE 1). The carriers are fired after use to clean them and are then re-used.





FIGURE 2. Experimental tool debonding a PEN substrate from a carrier panel after fabrication of thin film transistor circuits. The tool is applying between 0.1 and 0.2N of force.
FIGURE 2. Experimental tool debonding a PEN substrate from a carrier panel after fabrication of thin film transistor circuits. The tool is applying between 0.1 and 0.2N of force.

The temporary adhesive has to meet a number of requirements. It must not induce unacceptable variation in the thickness of the composite substrate comprising the carrier, adhesive, and flexible substrate. It also must not out-gas any volatile organic compounds (VOCs). It must endure temperature transitions up to the limits of the deposition, and maintain bond integrity during exposure to high vacuum as well as wet and dry etch environments. Most importantly, once the transistors are fabricated, it must release without adversely impacting transistor performance. An experimental tool debonding a PEN substrate from a carrier panel is shown in FIGURE 2. An IGZO thin film transistor array fabricated using the bond-debond substrate handling protocol is shown in FIGURE 3.





FIGURE 3. Full color active-matrix OLED display fabricated on an IGZO thin film transistor array fabricated using the bond-debond substrate handling protocol.
FIGURE 3. Full color active-matrix OLED display fabricated on an IGZO thin film transistor array fabricated using the bond-debond substrate handling protocol.

After screening hundreds of adhesives across a broad range of chemistries, the experts at Flexible Display Center turned to a team now at Henkel Electronic Materials to engineer a solution. Their proprietary high molecular weight adhesive meets all of the requirements outlined above. It also has the additional advantage that it adheres preferentially to the carrier plate rather than the polymer film during the release process. This eliminates the need for a post-fabrication clean step.


The composite system consisting of the carrier plate together with the adhesive layer and bonded polymer film exhibits complex dimensional changes during the process of transistor array fabrication. Temperature ramp rates and deposition rates must be carefully managed to control stress accumulation and minimize film distortion during these steps. To monitor these changes, a suite of metrology tools has been developed. An Azores Gen II photolithographic stepper fitted with distortion compensation software in its optical system enables the identification of pattern mismatches arising from dimensional change during a given process step. It is also important to measure out of plane "bowing" due to stress mismatches between the polymer film and the carrier plate. If this exceeds tolerances it will cause photolithography errors and produce handling errors by the robots in the process equipment.


This substrate handling protocol has been used to produce Gen II panels with multiple display transistor circuit arrays employing either amorphous silicon or indium-gallium-zinc-oxide (IGZO) as the active semiconductor. In both cases the highest nominal process temperature is about 180 ??C. Despite the lower process temperatures, the amorphous silicon transistors exhibit operating characteristics that are indistinguishable from those in conventional glass-based displays, apart from the well-known drift in threshold voltage when they are used in current-drive mode. These have proven completely adequate for use in displays employing voltage-driven electro-optic effects, such as electrophoretic displays. The IGZO transistors are more suitable for current-driven displays such as OLEDs. Devices made with the low-temperature process exhibit about a 25-fold increase in carrier mobility and about a 10-fold increase in threshold voltage stability.


An important question for mobile display applications concerns the display resolution that can be achieved with these carrier handling techniques. A number of flexible OLED display prototypes have been shown, presumably made on polyimide substrates coated onto a glass carrier and released using a laser. These displays have resolutions of order 200 dpi (full color), although very little information has been made publicly available regarding their long-term electrical performance. Flexible Display Center has not yet investigated the resolution limits that can be achieved using their adhesive bonding technique, although the data on dimensional distortion throughout their unique process suggests that resolutions of 200 dpi and higher ought to be achievable.


In summary, the appearance of the first flexible high-resolution displays in the market is imminent. They will be produced using materials handling techniques that have been developed to allow the use of existing thin transistor fabrication facilities. These techniques are still under intensive development, including the evaluation of the relative merits of different design trade-offs.


Solid State Technology | Volume 56 | Issue 3 | May 2013