Yield challenges and the 450mm learning curve

03/01/2012

Brian Trafas,

chief marketing officer at KLA-Tencor, Inc.

As the industry evolves to meet consumers' increasing demand for smaller, faster and cheaper devices, chipmakers are growing more focused on the wafer size transition from 300mm to 450mm.

The transition to 450mm wafers are intended to combat the rising costs of manufacturing next-generation design nodes by increasing chipmakers' overall yield. The increased die each wafer yields from 450mm wafers will improve costs and increase fab output while offering significant environmental benefits as increased productivity will lead to reduced energy, water and emissions from fewer facilities.

The move toward 450mm is underway with early support from industry heavyweights. In fact, the Global 450 Consortium that formed late last year marked a critical turning point as the world's leading international chipmakers announced a collaboration to develop and deploy 450mm wafer process tools and capabilities. Several equipment companies have already begun to build 450mm-capable tools and have encouraged industry-wide collaboration to support a smooth transition.

While 450mm will eventually lower die costs for manufacturers, it will not happen without higher die yields. In addition to the yield challenges resulting from the processing of advanced design rules; the manufacturing of 450mm wafers will bring significant yield challenges. Increased chip density, new, immature process tools, tighter process windows, center-to-edge process variations and wafer edge defects all present significant challenges to obtaining the necessary yields for success. Industry focus will be heavily centered on ensuring a fast yield ramp with particular emphasis on edge-die defectivity and quickly understanding their process variation windows for a particular process. The 450mm learning curve will indeed be steep with process control playing a critical role in helping wafer suppliers, OEMs and IC manufacturers develop their initial tools and production processes, ensuring they have the right capabilities when they move into production. Many of the yield challenges the industry saw during the transition to 300mm will reappear. Due to the increased value of a 450mm wafer, yield and process variation concerns will also become all the more critical.

A larger wafer with increased chip density per wafer, center-to-edge variations, tighter process windows, and initially more defects can mean higher cost per wafer. Industry focus will be heavily centered on ensuring yield at the 450mm level, with particular emphasis on edge-die defectivity and improving process uniformity understanding.

Addressing process control issues across larger substrates will be particularly critical for equipment companies as it is yet unclear what the technology node will be when 450mm goes into production. Looking towards the 2018-2019 timeframe, the industry will be well into production at technology nodes smaller than 1X nanometer, furthering industry concern around the right time to move forward with significant R&D investment in 450mm production.

Given these challenges, continued collaboration between chipmakers and equipment suppliers, close partnering and early learning will be the driving forces behind a successful transition to 450mm manufacturing. As the industry addresses the challenges posed by a period of complex scaling, tighter collaboration is essential to surpass the numerous hurdles, while containing R&D costs, resources and maximizing the industry's financial investment.

Solid State Technology, Volume 55, Issue 2, March 2012

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