SPIE roundup: EUV/EBMI demo, 11nm NIL, the skinny on DOE
04/01/2010
Several discussions and presentations at this year's SPIE Advanced Lithography Conference deserve special note—from work with e-beam EUV mask inspection, to nanoimprint achievements (11nm!), an EUV tool platform roadmap, mask productivity and cost issues at 22nm, and more on SMO and tunable DOEs.
Global Foundries' joint project with Applied shows feasibility of EBMI for EUV
Obert Wood, principal member of the technical staff at GlobalFoundries, summarized results of a joint e-beam EUV mask inspection project with Applied Materials at the company's annual Technical Symposium at SPIE.
Stating that the e-beam lab setup demonstrated the feasibility of the technology for EUV mask inspection, Wood noted that EBMI (e-beam mask inspection) is a very sensitive option for EUV mask inspection, with increased sensitivity at small absorber pitches. He noted that DUV laser wafer inspection is needed as a complementary method to detect the relatively small number of defects missed by an EBMI or optical mask inspection tool.
Future work includes using Applied's Aera2 (non-actinic) EUV mask inspection in reflective mode and comparing results to the EBMI and UVision data.
Samsung's 11nm NIL success
Engineers at Albany doing imprint lithography on Molecular Imprints' Imprio-300 tool, showed an 11nm L/S image, taken by Samsung (Figure 1); Thanks to SEMATECH's Matt Malloy for the image.
No EUV for mainstream SoCS? And why DFEB is good
Speaking at the SPIE eBeam Initiative event held in conjunction with , Franklin Kalk, EVP/CTO at Toppan Photomasks, pointed out how masks have become increasingly and dauntingly complex, especially since the 90nm node, with an array of tricks and tweaks. One of the tradeoffs to these extensions of 193nm technology is productivity—aggressive optical proximity correction (OPC), for example, increases e-beam shot count by >10×. (D2S researchers have said e-beam shots must instead be reduced by an order-of-magnitude to make EBDW throughput practical for maskless SoCs.)
 |
| Figure 1. (Image courtesy of SEMATECH and Samsung) |
The other tradeoff, relatedly, is mask costs. Productivity (line output) and capital costs have been heading in opposite directions for a long time (output lower, costs soaring), and this is especially glaring in the past few nodes. At 22nm, a per-mask capital cost would be ~$60K.
 |
| Figure 2. An example of the diffractive optical elements that are used to produce off-axis illumination in lithographic scanner systems. The required phase structure is etched directly into the glass substrate, creating an element that is extremely resistant damage from the excimer laser. |
Ultimately, Kalk explained, EUV is likely to be too expensive for mainstream SoCs. Therefore, extending 193i lithography is critical.
 |
| Figure 3. The output from a diffractive optical element is typically specified by a ~200×200 array of pixels with 256 discrete grey levels for 107 degrees of freedom in the design of SMO sources. This quadrupole shows just how flexible the output can be both in resolution as well as pixel energy level. |
Kalk said that critical layer masks should be written in 8-12 hours to be economically viable. He concluded that the proposed design for e-beam (DFEB) masks are good for merchant mask makers.
The skinny on SMO, DOE
James Carriere, senior optical engineer at Tessera, discussed increasing process windows with SMO and customized free-form illumination sources. He also described tunable diffractive optical elements (DOE) and how they can be used to create hybrid patterns (Figures 2-3). — D.V., J.M.
More Solid State Technology Current Issue Articles
More Solid State Technology Archives Issue Articles