Issue



Optimizing feedback time using high-throughput darkfield imaging


09/01/2008







A fab’s inspection strategy is based on many variables, including the process technology, defect mechanisms, inspection equipment, fab logistics, and financial parameters [1]. Adjustments are made to the inspection strategy for many reasons: the identification of new yield or reliability issues; the introduction of new materials or process technologies; or, the progression to new stages of the yield ramp. Modifications to the strategy are also made when new inspection technologies are introduced. This paper summarizes several inspection strategy changes made in a DRAM fab and the resulting benefits, including increased lot sampling and shortened yield-learning feedback loop for production defect monitoring.

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As a leading memory manufacturer in Taiwan, Powerchip uses advanced process technologies in its 300mm manufacturing facilities for volume production of DRAM products. A darkfield imaging patterned wafer inspector, KLA-Tencor’s Puma 9130, is part of the production defect monitoring strategy at Powerchip Fab P1/2. This darkfield imaging inspector uses laser line scanning and a multi-pixel sensor to achieve high sensitivity at high production throughputs [2,3]. The tool also successfully suppresses inspection noise sources using multiple technologies, including selectable polarizers, programmable filters, multiple collection channels, and a range of pixel sizes. The introduction of this tool at Powerchip allowed for adjustments to the inspection strategy in three areas: inspection at earlier process steps, new inspection points, and a multiple inspection technology strategy.

Current layer inspection

Ideally, defect engineers implement inspection points at the process layer where the yield-limiting defects are generated. Inspecting at the current layer reduces yield loss by shortening the production feedback loop and, in certain cases, by enabling process rework. In reality, however, certain process layers can be challenging to inspect. Nuisance suppression capabilities can be tested by noise sources such as prior-level defects, metal grain, or process variations, while the optical properties of certain materials can result in a poor defect signal.

Engineers make adjustments to the inspection strategy to account for process layers where meaningful inspection results cannot be generated. This most often is done by moving the inspection point to a later process level. This compromise strategy adds complexity as the defect root cause must be traced back to the layer of origin. Also, by inspecting at a later process step, the production feedback loop is lengthened, with many wafers possibly going through the line before the process issue is identified.

For the 90nm DRAM production line, the introduction of the darkfield imaging tool enabled inspection at earlier process levels where previous inspectors showed sensitivity limitations or poor nuisance suppression.

The following results from three process layers show how inspection at earlier process steps reduced the production yield learning feedback loop.


Figure 1. Puma 9130 inspection results on a 90nm metal 2 ADI DRAM layer showing the successful detection of photoresist line collapse repeater defects.
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Because metal 2 after-develop inspection (ADI) results were often overwhelmed with metal grain nuisance defects, inspection was performed after-etch. The darkfield imaging inspector successfully suppressed metal grain nuisance at metal 2 ADI while maintaining sensitivity to key defect types such as photoresist line collapse, top loss, current layer particles, and in-film particles. The tool also detected a repeating line collapse defect in production, providing engineers with the information required to identify a photo tool defocus issue. Moreover, by inspecting at ADI instead of the later after-etch step, process issues were identified one-half to one day earlier, and wafer scrap was prevented by enabling the re-work of defective lots. Figure 1 shows inspection results demonstrating the capture of the repeater line collapse defect by the darkfield imaging inspector.

For a second photo layer, landing pad ADI, the darkfield imaging inspector had the sensitivity required to detect single and multiple missing contacts, surface particles, and in-film particles. The primary defects of interest, missing contacts, were caused by a defocus issue and were not captured by other darkfield inspectors. By inspecting at ADI with the darkfield imaging tool instead of at the later oxide etch step, excursions were found one to two days earlier, and wafers could be reworked, thereby reducing the yield loss associated with the defocus issue.


Figure 2. Inspection results from the Puma 9130 showing the correlation between small particles at W/WN deposition and yield-killer pattern shorts at gate etch.
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On a third layer, W/WN deposition, the optical architecture of other darkfield inspectors generated high background noise that limited the sensitivity to small particles. Engineers had determined that these small particles caused yield-killer pattern shorts at a later gate etch process step. By detecting small particles (~0.2μm), the new darkfield imaging inspector demonstrated the necessary sensitivity to monitor the gate W/WN deposition process step. By moving the inspection point to this process level, excursions were detected two to three days earlier (four process steps earlier), thereby preventing significant yield loss. Inspection results from the darkfield imaging tool showing the correlation between small particles at gate W/WN deposition and pattern shorts at gate etch are shown in Fig. 2.

New inspection point

Adding a new inspection point increases a fab’s inspection costs. These costs must be weighed against the cost of yield loss due to undetected process excursions. Effective inspection strategies balance the cost of inspection with the risk of excursions [4]. In general, adding new inspection points can result in faster detection of excursions, faster resolution of process tool issues, lower numbers of lots exposed to process tool issues, and ultimately higher yield [5].

During via formation for 90nm DRAM production, occasional oxide CMP tool issues result in the formation of micro-scratches. In the subsequent processing steps (barrier seed deposition, W deposition, and W CMP), these micro-scratches can be filled with tungsten, causing shorts within the device. Therefore, monitoring for oxide CMP micro-scratches is critical for preventing yield loss due to these shorts.


Figure 3. Defect Pareto showing Puma 9130 inspection results at the Via TiN process step. The detector images demonstrate strong micro-scratch signal in both the periphery and array die regions.
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While other darkfield tools were unable to detect these yield-limiting micro-scratches, the high sensitivity and nuisance suppression capability of the new darkfield imaging inspector enabled the detection of micro-scratches at the Via TiN process step. Micro-scratches were found in both the array and periphery die regions. The defect Pareto in Fig. 3 shows micro-scratch detection, while the detector images demonstrate strong micro-scratch signal in both die regions. In addition, the line scanning and multi-pixel sensor technologies implemented in the darkfield imaging inspector enable high production throughputs. This high throughput, micro-scratch detection capability allowed engineers to implement a new inspection step, providing early feedback for potential issues with the oxide CMP tool.

Multiple inspection technology strategy

To tailor an inspection strategy to its unique requirements, a fab will often employ several different inspection technologies. This mix of inspectors provides the flexibility required to optimize inspection sensitivity and cost of ownership for any application. A common inspection strategy uses one particular inspector for a specific application, for example, using high-sensitivity broadband brightfield inspectors for all photo-related inspections.

A more cost-effective strategy uses complementary inspection tools for the same application, exploiting the unique advantages of the different inspection technologies. For example, an optimal photo-cell monitoring (PCM) strategy could utilize high-sensitivity broadband brightfield inspectors for steps such as incoming resist qualification when maximum capture of critical defects is required, and darkfield inspectors for daily tool monitoring when adequate sensitivity at high throughput is required [6]. This multiple inspection technology strategy preserves the balance of inspection sensitivity and throughput, provides increased sampling, and enables better excursion control at a lower cost.


Figure 4. SEM images of a blind contact defect found on a poly CMP layer by the Puma 9130.
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For the poly CMP process during 110nm DRAM production, the darkfield imaging tool was able to detect most of the key defects of interest previously found by only high-sensitivity brightfield tools. The defect types captured by the darkfield imaging inspector included blind contacts (Fig. 4); pattern shorts and small CD sizes caused by defocus issues; pattern shorts caused by prior-layer particles; CMP induced scratches; and poly residues caused by gouges in the oxide.

The darkfield imaging inspector detected blind contact excursions in the production line at high throughput with a low nuisance rate. This allowed for the implementation of a complementary brightfield and darkfield inspection strategy for this poly CMP layer. Brightfield tools were used for ?? lot sampling, and the higher-throughput darkfield imaging tools were used for ¼ lot sampling. The darkfield imaging inspector’s sensitivity-at-throughput also proved suitable for whole lot sampling for engineering troubleshooting when defective lots were encountered. Overall, the high-throughput darkfield imaging inspections complemented the higher sensitivity brightfield inspections by providing an increased sampling option at poly CMP.

Conclusion

The introduction of a new darkfield imaging inspector at Powerchip Fab P1/2 provided the opportunity to adjust the inspection strategy for DRAM production. The Table provides an overview of the five layers discussed in this paper, including a summary of the inspection strategy changes and the resulting production benefits. Currently, these layers are all run in production on the darkfield imaging inspector. With high sensitivity at production throughputs, the darkfield imaging inspector enabled enhanced lot sampling and a shorter production feedback loop, helping to produce a more effective inspection strategy with reduced yield loss.

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Acknowledgments

The authors would like to thank the Yield Engineer members of Powerchip Fab P1/2 for their support.

References

  1. R. Nurani, M. Stoller, D. Gudmundsson, and J. Shanthikumar, “Evaluating Inspection Strategies Using Advanced Statistical Methods,” Yield Management Solutions, Spring 1999.
  2. A.E. Braun, “Resolved Darkfield Imaging Extends Wafer Inspection,” Semiconductor International, July 2005.
  3. C. Perry-Sullivan, C. Chua, and M. McLaren, “Advanced Darkfield Inspection for =65nm Design Rules,” Solid State Technology Taiwan, Vol. 63, September 2006.
  4. L. Lin, S. Chen, A. Bousetta, R. Yang, and J. Liao, “Improving Defect Capture Rate for Excursion Detection,” Semiconductor International, August 2005.
  5. B. Trafas, “Process Control Strategies for Driving Yield Management,” Yield Management Seminar, Singapore, August 2007.
  6. I. Peterson and N. Khasgiwale, “Cost- and Sensitivity-Optimized Defect Photo Cell Monitor,” Yield Management Seminar, July 2005.

Luke Lin received his BA in chemistry from Tamkang U. in Taiwan and a PhD in physical chemistry from the National Tsing-Hua U. He has more than 10 years’ experience in the semiconductor industry and holds more than 20 patents in the area of defect control strategy. He is a department manager of yield engineering at Powerchip Semi-conductor Corp. Fab P1/2, No. 12, Li-Hsin 1st Rd., Hsinchu Science Park, Hsinchu Taiwan, R.O.C.; e-mail [email protected].

Felix Kuo received his MS in industrial engineering and management from the National Tsing-Hua U. and is a senior engineer at Powerchip Semiconductor Corp. Fab P1/2.

Eric Chou received his BS in chemical engineering from National Taiwan U. of Science and Technology (NTUST) and a masters’ degree in chemical engineering from the National Tsing-Hua U. He is a section manager of yield enhancement at Powerchip Semiconductor Corp. Fab P1/2.

Steve Lin received his MS in chemical engineering from Cornell U. and is an applications manager at KLA-Tencor Taiwan, 22 Tai Yuen Street, Chupei City, Hsinchu Hsien 302 Taiwan, R.O.C.

Catherine Perry-Sullivan received her BA in chemistry from Oberlin College and PhD in chemistry from Stanford U., and is a product marketing manager for wafer inspection products at KLA-Tencor Corp., 1 Technology Drive, Milpitas, CA 95035, USA; e-mail [email protected].