Lithography’s future: tougher than ever
05/01/2008
The industry struggle from node to node along the semi-log Moore’s Law track gets ever tougher. The road ahead in lithography is as fuzzy as it’s ever been, as the recent SPIE Advanced Lithography Conference in San Jose, CA, demonstrated. Will extreme ultraviolet (EUV) stepper/scanners be there in time for 22nm? How far can double patterning/double exposure and intensive resolution enhancement techniques (RETs) be pushed, and with what effect on chip economics? Long-shot contenders, such as multiple e-beam projection or nanoimprint lithography, are emerging. These might help short run/high mix fabs and fill other niches, such as patterned media for data storage. There are unresolved issues for all of these potential tracks to further shrinks. Plenty of investment will be needed to get any of these to commercial viability, and there is even a question of whether it will be worth it, because it appears that device performance may not improve with shrinks beyond 32nm.
Just in case the nodes begin to stretch out in the next decade, chipmakers are backstopping their bets by putting 3D technology on their road maps (see &ldqou;Will 3D keep the chip industry rolling?” Solid State Technology, December 2007, p. 14). This could effectively increase circuit density, and performance, too, with the help of through-silicon vias (TSVs), without requiring smaller features on the chip. But this approach also needs extensive development to resolve issues such as cost for adding TSVs, overlay, and removing heat from stacked chips or multilayer ICs.
In spite of uncertainties, priorities have to be set to allocate available R&D dollars, and so far EUV has gotten the lion’s share of investment. Several chipmakers said they were counting on the timely emergence of EUV, and exposure tool makers detailed work toward commercial EUV tools in the 2011 time frame. While steady progress was reported on both tool capabilities and EUV infrastructure, there are still glaring holes in the picture. A major concern is source power: Today’s 6W at intermediate focus must grow to perhaps 200W to reach wafer throughput goals, an improvement of two orders of magnitude! Better resists could help, but this effort also faces an uphill battle. Contamination of super-sensitive mirror surfaces could also be troublesome, requiring frequent, highly costly replacements.
The EUV team detailed its efforts at an evening session and presented targets that would be needed to fit a cost model that would beat projected economics for double patterning/double imaging 193nm immersion lithography. Kit Ausschnitt of IBM rose to challenge them: &ldqou;You don’t have any of that stuff!” he charged. While the industry has beaten what seemed to be impossible odds before, one panelist admitted that this was the first time in optical lithography history that the quest for the next exposure technology did not start with a suitable source.
The history of chipmaking abounds with clever tricks to stretch out the life of existing technologies. Unexpected solutions often pop up just in time. We predict this trend will continue. Immersion will stretch beyond what now seems feasible. There were hints of future surprises in many technological nooks and crannies explored in SPIE sessions.
Computational lithography with efficient algorithms and new highly parallel multiprocessor architectures could enable RETS to go far beyond what is now expected. Polarization variations between the TE and TM modes of immersion exposure light, being explored at Rochester Institute of Technology, suggest that multilayer resists using reflective interference might enable double patterning with single exposures, greatly aiding throughput.
Beyond that, experiments with self assembly of block copolymers, described by groups from IBM’s Almaden Research Center, perhaps using lamellar frameworks defined by lithography for longer range, regular self-assembly, could lead to new ways to build nanostructures into devices. Already IBM is readying air gap dielectric devices for commercialization by next year with processing that incorporates block copolymer techniques.
While the view ahead is still dim, one thing we can be sure of is that there will be plenty of surprises along the way.
 |
Robert Haavind
Editorial Director