Issue



Two keys that unlock 45nm OPC


05/01/2008







Click here to enlarge image

Tom Kingsley
Mentor Graphics,
Wilsonville, OR, USA

Stepping into the sub-180nm world creates a new reality far different from what we have known and relied on in the past. The virtual halt of the steady progression of scanner resolution improvements to achieve shrinking geometries has created radical changes in the post-tapeout (PTO) flow.

Starting at the 130nm process node, a new set of lithography correction and verification applications, known collectively as computational lithography (CL), emerged to compensate for the inability of scanners based on 193nm light sources to print without significant distortion of the image. CL uses software to modify mask data to ensure it will print as designed. Techniques include modifying polygons to correct for optical proximity effects (OPC), adding subresolution assist features, and decomposing the design to enable phase-shifting masks or multiple exposures techniques such as double-patterning or dual-dipole.

OPC is an optimization problem requiring several iterative cycles of simulation, analysis, and correction to achieve best results and requires massive amounts of computer time. Prior to 45nm, sparse simulation was the best approach to ensure OPC accuracy while minimizing the computational burden. Sparse simulation works only on specific features in specified areas of concentration. To meet delivery schedules, manufacturers turned to clustered CPU platforms to speed up turnaround times. The initial development and application of CL using sparse simulation on multithreaded symmetric multiprocessing (SMP) platforms defined the first inflection point in the PTO flow.

Now, a second inflection point has emerged from the 45nm development effort. Two new technologies that are key constituents of this inflection point are dense simulation (DS) and co-processor acceleration (CPA).

There is a crossover point at about 45nm where dense simulation, which overlays a grid of simulation points on the entire layout, actually results in more efficient calculation than sparse simulation for the most dense layers such as the first layer of metal, or poly. The number of layers where dense is superior will increase as we move to 32nm and 22nm nodes. However, the performance advantage of dense simulation alone is still not enough to handle the increased run times for advanced ICs. Simply continuing to scale applications onto thousands of processors becomes economically and logistically impractical. This leads to co-processor acceleration (CPA) as the second key enabling technology for 45nm and below.

Adding a CPA cluster of specialized processors to general-purpose CPUs reduces the total number of CPUs needed for OPC tasks by dramatically increasing the total computing power of the combined computing infrastructure. A CPA cluster of 25 to 50 cell broadband engine technology processors complementing 100 to 200 general-purpose x86-based CPUs can achieve the same computing throughput as 600 to 1000 CPUs without CPA. Cost, space, and power consumption are dramatically reduced compared to a general-purpose architecture.

Some significant process changes are also emerging in the development of new 45nm PTO flows. Users need more flexible flows where the decision of whether or not to apply dense simulation and/or CPA is determined by situation. In this way, users can optimize the mix of sparse and dense simulation based on what is most effective for their needs. They can make this decision on a layer-by-layer, design style-by-design style, or process-by-process basis, and can continue to do so through the 22nm node. Users can maintain their standard compute farm and simply add co-processors as needed to speed up dense simulation.

If the goal is to get to success at 45nm and beyond, the industry needs both sparse and dense simulation, and coprocessor acceleration in their CL toolbox with the ability to apply the right combination when and where it is needed.

Tom Kingsley is the director of product marketing for Calibre RET at Mentor Graphics, 8005 SW Boeckman Rd., Wilsonville, OR 97070; ph 503/685-7732; e-mail [email protected].