3D IC technology drives public investment in 300mm

10/01/2009

Dietrich Tönnies,
SÜSS MicroTec, Garching, Germany

About 10 years ago, the industry got ready for 300mm wafers. Today, 300mm wafers account for almost 50% of the worldwide IC production. But while the industry is increasingly embracing 300mm technology, research organizations (witha few exceptions, such as IMEC) have been reluctant to invest in 300mm equipment. This is not surprising. A large wafer diameter does not facilitate interesting new technologies, it just increases productivity—important for the industry, but not for research organizations.

In the last several months, however, research organizations have been setting up consortia to drive investments in 300mm lines for 3D integration technology. The list of organizations is quite impressive: IMEC, Leti, ITRI, ASET, IME, SEMATECH, and the Fraunhofer IZM are procuring 300mm equipment, or at least have announced plans to do so in the future. Obviously, these organizations find it increasingly difficult to establish fruitful projects with industrial partners without being able to process 300mm wafers.

Or, is it just because of the current economic situation that governments are more willing to spend money for their national research organizations?

Public research has lost ground against industrial research when it comes to front-end technology, simply because public organizations cannot invest in high-end 300mm production lines. But 3D technology offers significant opportunities for academia to win back recognition from the industry. One reason is that investment in 3D technology is within reach for larger public organizations, and a second is that the industry may, in fact, need an open platform to exchange ideas on how to leverage the opportunities offered by 3D IC technology. After all, it is expected that 3D technology may change the industry's supply chain.

New ideas are needed on how to work together. Fraunhofer IZM, for example, is planning a full 200/300mm line for heterogeneous integration of different wafer technologies in 3D systems. Such open platforms, headed by a research organization, will be very helpful indeed.

The holy grail of 3D technology continues to be cost-effective and high-yielding through-silicon via (TSV) processing, the reliable handling of very thin wafers, and vertical chip integration by either die-to-wafer or wafer-to-wafer bonding. Wafer bonding technology has been developed mostly for MEMS, and thus for wafer diameters of 200mm and smaller. For 300mm, wafer bonding techniques are just now being introduced into IC fabrication.

For example, in temporary wafer bonding (which is not a new technology—power device makers have been processing thin wafers for many years), the prevalent solution is wax bonding of the wafer onto a glass or sapphire carrier. But can this technology be scaled towards 300mm, and will IC manufacturers accept the same manufacturing solutions followed bypower device makers? The answer is not a simple "yes." 3D IC makers, for example,are looking for higher temperature budgets than what current temporary waferbonding solutions offer, and expect a different level of automation.

Earlier this year, a seminar hosted by SÜSS MicroTec and other industrial partners, together with IMEC, highlighted new technology options for 300mm temporary wafer bonding. Given the many challenges ahead, it is important that material and equipment providers join forces with research organizations to work on solutions. And as with temporary wafer bonding, the impact of public research organizations to break other technology barriers in 3D IC manufacturing can be very significant.

Research organizations have always been important partners for our company. We, therefore, are very curious to see how these new 3D consortia will reshape the relationship between industry and public research.

Dietrich Tönnies, director of process technology development, SÜSS MicroTec, Schleissheimer Str. 90, 85748 Garching, Germany.

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