Burn-in Test Socket Challenges
03/01/2009
By Gail Flower, Editor-at-Large
This article provides a broad review of the issues affecting socket usage: lead-free challenges, finer pitch adjustments, cost control, standardization, practical customer concerns, and improvements needed for 3D packages and other innovations on the horizon. Through conversations with industry experts, we explore a few common themes from this year’s Burn-in and Test Socket Workshop (March 8-11, 2009) in Mesa, AZ.
The life of a socket begins when designer models a finite element analysis for the force required to make stable electrical contact between the socket and the device under test (DUT). The designer considers pad pitch, pad composition, and I/O count, then refers to past data, and, depending on this, takes a hit-or-miss approach until the right results are obtained. Design represents the first step in a series of challenges to modern socket production.
Lead-free Changes
When lead-free joined the mix, the designer’s job became more complex. When RoHS mandates became effective in July 2006, sockets had to test lead-free components with harder, more forceful contacts. Unlike with tin/lead, historical data was not applicable. Variations plagued probe tip geometries, spring parameters, DUT metallization, and design..
Electrical, mechanical, and cost of ownership remain the constant concerns of test hardware engineers, but the hardness of lead-free materials such as nickel/palladium/gold can wear contact pins quickly and transfer excessive force to load boards, adding to maintenance and replacement concerns. One solution is to use a crown tip on a spring pin to balance off the hardened stress of lead-free materials. As more force is required to make solid contact, wear issues become more critical.
A lead-free oxide-rich matte tin solder causes increased and variable resistance. Matte tin solder builds up on contact pins, hurting yields. Frequent cleaning solves this problem, but causes a drop in throughput.
One manufacturer designs and builds spring probes for lead-free testing using new alloys, hardening procedures, and surface finishes, as well as different test socket engineering design sets and mechanical properties (geometries, force, bias, internal pin capture). Next, they validated changes in test, using modified IC test handlers and pin cycling machines with test coupons plated with lead-free finishes.
Though some problems with lead-free have been solved, questions remain. For example, some customers are still experimenting with different lead-free BGA formulations with varying ratios of tin, silver, and copper. Interconnect quality is still in question. It is clear that there is not “one“ solution to lead-free. For instance, an optimized contacting solution for a pure-tin IC device lead is not the same for a nickel/palladium-plated device. Some probe styles prove suit to hardened connections, depending on the device metallurgy and how contact is applied in a test environment. Research continues as lead-free contacting solutions are still being developed and optimized.
At the 2008 BiTS workshop, Nick Langston Jr. presented “An Examination of the Causes of Cres Degradation Which Affect the Life of a Test Socket.“ He looked at SAC alloys 105, 305, and 405, the lead-free formulations most often associated with BGAs. SAC 105 is easy to use because it requires little transition from tin/lead. However, gold/tin intermetallic compounds form at gold/SAC interfaces, and these cause Cres degradation, which affects the life of a test socket. Other problems that lead-free introduces is the need to use a stab-like contact with a crown headed probe. Cleaning contact pins repeatedly is necessary with lead-free.
Each package type and terminal geometry (solder ball and pad size) introduces its own set of variables. The number of solutions matches the number of lead-free solders (NiPdAu, NiAgCu, matte Sn, etc.). Solutions must consider all variables: package type, test application, terminal type, terminal geometry, device type (digital, RF, high-speed digital, high-power).
The Standards Issue
What standards are needed for sockets? In a user’s eyes, the industry has done a poor job establishing standards. Measurement methods for electrical signal integrity and insertion loss should be standardized. Suppliers should know how customers will use their sockets. If a supplier says that one million cycles represent socket life, what does that mean exactly? Both supplier and user should use the same approach to determine socket life.
Pin-life specifications need to state resistance level at insertion count and test conditions. In many testing cases, once pins exceed 100 mΩ or so of internal resistance, they are worn out. In others, the test can tolerate even 1 Ω of pin resistance, so a specification that states a statistically reasonable resistance level at X number of insertions would be much more illustrative of the useable pin life.
Traditional IC packages have been quite standardized already to some degree. Leaded packages (2- or 4-sided) already have very standardized pitches: 1.27, 1, 0.8, 0.65, 0.5, and 0.4mm, etc.
“Each leaded package generation pretty much is just a scaled-down version of its predecessor,“ said Valts Treibergs, R&D engineering manager, Everett Charles Technologies ??? STG. “Socket suppliers have had the option to use traditional contact designs and manufacturing processes to build test and burn-in sockets. Sockets suppliers tried to squeeze every penny out of the design to compete on cost, and squeeze the socket outline to maximize density on burn-in boards (in the case of memory burn-in). Sockets for leaded packages are basically all the same, and this results in a commodity socket battle.“
IC packages for area arrays also started out standardized. “BGAs and LGAs, and PGAs to some extent, followed the same pitch progression as leaded packages; however, due to the array format, had a much higher I/O density,“ said Treibergs. Socket designers responded with a series of contact solutions that used complex pinching contacts, buckling beams, or expensive vertical contact solutions such as pogo pins. A handful of socket designs for these packages became the standard, and each design has found its application niche in either test or burn-in. Again, sockets for area-arrays have become commodity items, with a few basic designs.
Semi manufacturers are departing from standardized IC packages, exploring wafer-scale packages, which are less costly, smaller, and have better electrical performance. Wafer-scale interconnects are not restricted to standardized pitches, grids, or sizes. This is where socket standardization breaks down. Socket suppliers need to be as flexible as chip designers. A portfolio of interconnects that can be placed at the same random pitches as the wafer-scale package should be deployed as needed. Socket suppliers must work with package designers and PCB manufacturers to provide an interconnect solution integrated with the manufacturing equipment. Socket suppliers need to understand whether the test application requires Kelvin testing or high speed. They must deploy solutions that use the same level of advanced manufacturing technology.
Low volumes, high-technology, high-mix, and short lead-times are the issues faced by socket suppliers for today’s advanced IC packages. Standardization in IC packages and socket outlines should no longer be considered because this ends up being an exercise in futility.
The only standardization that socket suppliers and socket users need is standardized test methods and characterization techniques. Unfortunately, socket suppliers may not have resources to tackle these issues. Chipmakers themselves have little resources to help.
At times, there are new applications that require more than standardization allows. “Applications can be simplified by communicating a clear and complete requirements list and working with test socket suppliers to provide a customized solution,“ says Ann Cibelli, director of communications at Advanced Interconnections Inc. Advanced doesn’t produce burn-in, only test sockets (Fig. 1). Reducing the board space, allowing device test on production-level boards, eliminating screws through the PCB, or reducing the overall cost of test by providing a pluggable socket can go beyond standard.
 Figure 2. Yamaichi’s 0.4 mm QFN NP506 ??? 30grb burn-in socket matches newer, smaller package types. |
In January 2009, Yamaichi Electronics introduced a QFN socket series with 0.4 and 0.5mm pitch in open-top design for the test and burn-in of small IC packages (Fig. 2). The NP506 socket series is distinguished by active centering of the IC module and twin-beam contacts to ensure bonding and signal integrity. As packages get smaller or stacked higher, socket suppliers will be ready to meet these needs as well. The active centering of the IC module enables balancing of larger module tolerances for sawed as well as punched QFNs.
Though challenges remain for burn-in socket providers, the issues of making sound electrical/mechanical connections, the need for standards, the requirements of lead-free, the cleaning requirements caused by new materials, and meeting the needs of the latest packaging designs are the issues that will be discussed at BiTS 2009.