Methods for analyzing and compensating for systematic mask CD errors
12/01/2006
Systematic errors are becoming the dominant contributor to mask CD uniformity. This article looks at methods to model some of the more prominent error sources in advanced mask lithography and gives examples of how these models can be applied to analyze and actively compensate for these errors.
Mask CD uniformity requirements continue to tighten in response to the shrinking wafer CD uniformity budget and the upward trend of the mask error enhancement factor (MEEF). While the International Technology Roadmap for Semiconductors (ITRS) continues to assume that the wafer CD uniformity budget can remain at 10% of the minimum half-pitch, the mask CD uniformity budget in real terms is more stringent than the equivalent wafer CD uniformity budget. To meet these challenging requirements, it is necessary to define the various components of mask CD uniformity error as systematic or random, and to reduce or eliminate the systematic components. In this article, we will focus on the systematic errors related to exposure and process mechanisms of variable shaped beam (VSB) electron-beam mask lithography techniques to model these error sources, and methods to compensate for them.
Introduction to VSB-related error sources
CD control in advanced mask lithography is dominated by systematic error sources [1]. To deliver masks with acceptable CD control, one must understand these error sources well enough to develop practical solutions to reduce or eliminate them. While first principles models and simulation tools can be extremely accurate, the approach taken by the mask industry is similar to that of the OPC industry. Models must be “good enough” to reduce errors effectively, but they also must be fast enough to run in production. While OPC for wafer lithography can be leveraged over many wafers, each mask is unique and therefore the compensation strategy must be optimal for single-lot processing.
Figure 1. Beam blur impact on beam profile. |
Understanding VSB mask CD errors begins with comprehending how these tools work. While there are some similarities to projection optical wafer lithography, many of the VSB error characteristics are unique. A VSB mask lithography tool exposes photoresist by projecting the superimposed image of a pair of apertures illuminated by a uniform flood of electrons accelerated to 50keV beam energy. The superimposition of apertures results in a rectangular or triangular exposed area that is adjustable in size and aspect ratio by changing the nature of the superimposition through shape deflector controls. The area exposed in this manner, typically 2µm × 2µm or smaller in size, is known as a “shot.” The desired circuit pattern is serially composed of multiple shots, typically 109-1010 in number for a critical 65nm mask layer. Shot dwell times are about 1-2µsec for chemically amplified resists (CARs), so mask write-times are typically 3-12 hrs [2].
Systematic mask CD error sources fall into five primary categories, including functions of the electron beam itself; functions of the electron interactions with the mask substrate and resist; material processing effects (develop and etch); VSB tool imprecision; and temporal in nature, i.e., functions of the long write times. While all of these are interesting and important subjects, this article will focus on a subset of these, including beam blur, forward electron scattering, backward electron scattering, the fogging effect, and develop-loading effects. Except for the develop-loading effect, these error sources are unique to VSB lithography and must be resolved to achieve acceptable CD performance on the mask.
Beam shapes/interactions
The ideal cross-sectional shape of a projected shot’s electron flux is a top-hat (Fig. 1). The relative electron flux inside the shape is 1, outside the shape is 0, and the slope at the edges of the shape is infinite. In reality, the quality of the projected image is degraded by diffraction effects at the apertures, chromatic aberrations, and other scattering sources that cause the shape image edge profile to have a finite slope. This effect is known as “beam blur.” Beam blur has a range of influence of about 20-30nm laterally and an error magnitude of about 25nm [3].
The beam interaction with the resist is complex and not completely understood (Fig. 2). To effect exposure, electrons must be absorbed by the resist. Electrons penetrating a material are scattered as a function of the beam energy and the atomic number of the material. Scattering of electrons in their initial trajectories through the resist is referred to as forward scattering.
Figure 2. Electron beam/material interaction effects. |
Electrons that are not absorbed by the resist can enter the substrate material and be absorbed there. Some electrons are reflected back from the substrate and then absorbed by the resist via a process known as backscattering [4]. Other electrons are reflected from the surface of the resist to physical elements of the electron column, then reflected once again back to the resist where they are finally absorbed by the resist. This interaction is known as the “fogging (or foggy) effect” [5]. Forward scattering has a lateral range of influence of ~200nm and an error magnitude of ~25nm; backward scattering has a range of influence of ~15µm and an error magnitude of ~50nm; the fogging effect has a range of influence of ~20mm and an error magnitude of 10-40nm.
Forward and backward scattering are functions of the incoming beam energy and the electronic properties of the mask materials (resist, underlying films, and substrate). Beam blur and the fogging effect are tool-specific. Beam blur is determined by tradeoffs in column design [3]. The fogging effect is a function of the physical layout of the final lens elements in the electron column and mitigation strategies specifically deployed to capture unwanted electron scatter [6].
Develop loading
The resist develop step for VSB lithography exhibits a “loading” effect where areas of high pattern density appear to develop at a different rate than areas of low pattern density. This has also been observed for optical wafer lithography where it has been called “chemical flare” [7]. This loading effect has a magnitude and range similar to that of the fogging effect, which makes it difficult to separate from fogging.
Basic modeling approach
We have established that there are many possible error sources and that the range of influence for these error sources extends six orders of magnitude from tens of nanometers to tens of millimeters. Accurately simulating the composite error is challenging. A “first principles” model that attempts to track a large number of electrons through their trajectories is made impractical by the overall interaction range [8-10].
All the error sources described above, however, can be effectively modeled by Gaussian point-spread functions with appropriate ranges and magnitudes. In addition, these errors are purely additive, which means that each can be considered separately. Some error sources have similar ranges and magnitudes and are difficult to isolate and characterize experimentally. Errors of roughly the same influence range can be lumped together into a single model. A simulation strategy must account for the range of the errors. In a grid-based simulation approach, the cost function of the simulation is related to the density of grid points and the size of the convolution kernel. For small error ranges, a grid on the order of the feature sizes is possible. For longer range errors, the grid spacing must be increased.
On-tool error compensation
VSB mask lithography tools have on-board compensation for backward scattering (proximity effect compensation, or PEC) and the fogging effect compensation (FEC) since these have interaction ranges long enough to cause CD interdependence between features. Except for very small, densely-packed features, beam blur and forward scattering primarily affect individual features and are manifest as linearity error or line-end shortening.
The on-tool compensations for backscatter and fogging use similar strategies. The pattern is divided into a 2D grid or “mesh.” For each mesh element, the pattern density is calculated, and the contribution of dose from nearby mesh elements is calculated with a Gaussian point-spread function. The incident dose for each mesh element is reduced to account for the additional dose from backscatter or fogging effects. Since changing the nominal exposure time to compensate for backscatter or fogging effects for one mesh element changes its influence on the surrounding mesh elements, a more exact compensation is achieved by running two or more iterations of the exposure computation to converge to a stable correction map. The incident dose is reduced when writing the mask by reducing the shot exposure time. Typical mesh sizes are 0.5-2µm for PEC and 0.5-1.0mm for FEC [11].
Compensation in mask pattern data
While on-tool compensation is convenient for PEC and FEC, it is less effective for correcting other error sources. A more general approach is to use EDA software tools to generate compensations expressed as size adjustments to the pattern data, similar to OPC. One example is to develop loading effect compensation (LEC)-depicted in Fig. 3-which is similar to PEC and FEC. The pattern is divided into a mesh of a certain size, and the pattern density of each mesh element is determined. A convolution is applied to the pattern density values to create a correction map, which is used to size the pattern data in each mesh element. The convolution kernel can be determined in various ways. A typical convolution kernel for compensating process loading effects is a single or double Gaussian function, but any suitable function can theoretically be used.
When performing compensation with data sizing, it is necessary to pay attention to pattern contiguity across correction field boundaries by imposing soft boundary strategies, and to comply with pattern size restrictions imposed by mask manufacturing rules. In the most advanced VSB tools, a hybrid strategy is possible. The same methods used to create a size compensation map can be applied to calculate a dose compensation map, which the tool can read and apply when the mask is written. This allows a much wider range of systematic error signatures to be compensated for than are addressed here, including side-to-side and radial effects and using more complex convolution kernels. Which method to use is often debated. Dose compensation is typically used to compensate for dose errors, while data sizing techniques are considered more suitable for non-dose related errors like etch effects.
Mask simulation
We have discussed mask error models that can compensate for mask CD effects, but we have avoided any comprehensive discussion about using these models for mask simulation. A comprehensive first principles model of mask lithography would be useful, but more practical is a simulation strategy that predicts mask pattern shapes as manufactured; thus, certain errors are assumed to be already compensated.
Simulation in this manner is useful, for example, to determine the impact of the residual, uncompensated mask errors on OPC strategies [12]. Typically, mask errors that are not compensated (beam blur and forward scattering) result in nonlinearity, local iso-dense bias, line-end shortening, and corner roundness errors. We find that a single Gaussian model does a reasonably good job of replicating the resist image on a VSB produced mask if PEC and FEC have already been applied by the mask lithography tool. This also is the case for masks produced with Gaussian-beam laser mask lithography tools [11].
Etch bias
Simulation of etched features is more complex than simulation of resist features (Fig. 4). The chromium oxynitride and molybdenum oxynitride films used as mask absorber layers present unique etch challenges. For example, the CrOxNy etch is not completely anisotropic, and therefore some etch bias is observed. While the 1D effects of etch bias can be compensated with data sizing, and therefore are not present on the completed mask, the 2D effects result in different corner radii between inside (concave) and outside (convex) corners.
The isotropic etch tends to increase the radius of inside corners and decrease that of outside corners. One approach we used is to emulate an isotropic etch process using sizing functions in design-rule check (DRC) tools. The output of a single Gaussian convolution of the mask pattern data is converted to a GDS2 or Open Artwork System Interchange Standard (OASIS) file with very small (typically 1nm) segment lengths, preserving the curvilinear shape of the simulated pattern in a format that can then be manipulated. This pattern is then sized by the amount of the known etch bias. When inside corners are sized in this manner, the radii increase, while the radii of outside corners decrease, thereby emulating the effects observed in the etched images. To retain the intended target size of the simulated pattern, the pattern input to the initial Gaussian convolution (simulating image development) must be undersized by the etch bias prior to the etch simulation step. This more closely resembles how a mask is actually manufactured.
Conclusion
Simulating VSB mask shapes is challenging due to the variety of CD error sources and their associated ranges. A practical approach is to apply multiple grid-based compensations to the mask data to achieve the most accurate replication of the input pattern data possible. The remaining mask error signature can then be simulated through simple Gaussian convolution methods, optionally combined with a biasing etch model. Once analyzed, strategies using existing OPC techniques can be utilized to compensate for many of these mask error components.
null
References
- R. Cinque, et al., “Experimental Characterization of Constituent Errors in E-beam Lithography,” Proc. SPIE, Vol. 6283, 2006.
- 2. Y. Nakagawa, “Development of a Next-generation E-beam Lithography System,” Proc. SPIE, Vol. 3546, pp. 45-54, 1998.
- D. Herriott, “Electron-beam Lithography Machines,” Electron-beam Technology in Microelectronic Fabrication, ed. by George Brewer, pp. 144-172, Academic Press, 1980.
- J. Greneich, “Electron-beam Processes,” Electron-beam Technology in Microelectronic Fabrication, ed. by George Brewer, pp. 61-78, Academic Press, 1980.
- SH. Yang, et al., “Fogging Effect Consideration in Mask Process at 50kev E-beam Systems,” Proc. SPIE, Vol. 4889, pp. 786-791, 2002.
- N. Shimomura, et al., “Reduction of fogging effect caused by scattered electrons in an electron beam system,” Proc. SPIE, Vol. 3748, pp. 408-415, 1999.
- T. Brunner, et al., “A New Long-range Proximity Effect in Chemically Amplified Photoresist Processes: Chemical Flare,” Proc. SPIE, Vol. 5753, pp. 261-268, 2005.
- C. Mack, “Electron-Beam Lithography Simulation for Mask Making, Part 1,” Proc. SPIE, Vol. 3236, pp. 216-227, 1997.
- N. Kuwahara, et al., “PEC-fogging Effect Analysis Using High-Performance EB Simulator Capable of Large Area Mask Pattern Simulation,” Proc. SPIE, Vol. 4889, pp. 767-775, 2002.
- S. H. Tang, et al., “A Study on the Effect of Beam Blur in Mask Fabrication,” Proc. SPIE, Vol. 4186, pp. 468-473, 2001.
- N. Takahashi, et al., “Performance of JBX-9000MV with Negative Tone Resist for 130nm Reticle,” Proc. SPIE, Vol. 4186, pp. 22-33, 2001.
- P. Buck, et al., “Advanced Write Tool Effects On 100nm Node OPC,” Proc. SPIE, Vol. 4889, 147-155, 2002.
Peter Buck is director of DFM applications at Toppan Photomasks Inc., 23932 NE Glisan Street, Gresham, OR 97030; ph 503/491-3003, e-mail [email protected].
Franklin Kalk is chief technology officer at Toppan Photomasks Inc., in Round Rock, TX.
Kent Nakagawa is a member of the technical staff at Toppan Photomasks in Gresham, OR.