World News
07/01/2006
BUSINESS TRENDS
Capex big spenders swell ranks in 2006
Membership in the elite group of chipmakers spending at least $1 billion will expand to 16 companies this year, with memory firms particularly aggressive in their capacity investments, according to IC Insights Inc.
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According to initial budgets, Intel will retake the top spot in 2006 with $6.6 billion in capex spending, a 13% increase from a year ago, although below previous projections due to soft PC demand and rising inventories. No. 2 capex spender Samsung isn’t far behind ($5.7 billion), with investments down about 7% from a year ago. The most aggressive spenders on the top 10 capex list are Hynix and Powerchip, with year-on-year increases of 48% and 39%, respectively. Powerchip was ranked 39th in semiconductor sales last year, for a 2006 capex/2005 semi sales ratio of 116%-vs. Intel with a ratio of only 19%. Similarly, Hynix is projected to be aggressively spending this year, vaulting to the No. 3 spot with $3.6 billion, likely split between its DRAM and flash memory operations.
WORLDWIDE HIGHLIGHTS
Total silicon wafer area shipments were 1884 million sq. in. (MSI) in 1Q06, up 3% from 4Q05 and nearly 29% from a year ago, according to data from SEMI. Since early 2005, wafer demand has slowed from 8%-9% quarterly growth to 3%-4% now, but demand is still straining current supplies.
Applied Materials Inc., Santa Clara, CA, and Japan’s Dainippon Screen Mfg. Co. Ltd. (DNS) are forming a joint venture to offer track technologies for semiconductor manufacturing. New company Sokudo Co. Ltd. (52% DNS-owned) will incorporate DNS’s existing coater/developer track business and related IP from both firms, as well as a ¥16.6 billion (~US$151M) investment from Applied.
USA
Nantero Inc., Phoenix, AZ, and ON Semiconductor will continue development efforts to integrate carbon nanotubes into CMOS fabrication, work that was being done at LSI Logic’s facility in Gresham, OR, which ON acquired earlier this year.
ASIAFOCUS
China Resources Logic has proposed a $113 million buyout offer to double its 26% ownership in semiconductor foundry CSMC Technologies to a majority stake. The company hopes to bolster its plans “to become an influential player in the PRC semiconductor industry,” according to a statement.
Renesas Technology Corp. and Nanya Technology Corp. have settled four pending lawsuits alleging patent infringement by Nanya’s DRAM products, and have signed an undisclosed cross-licensing agreement.
Chartered Semiconductor Manufacturing Ltd. is ready to deliver new microprocessors utilizing 300mm/90nm process technologies to partner Advanced Micro Devices (AMD), several months earlier than expected, according to a Reuters report. The initial orders are for 1000 300mm wafers using 90nm technology, targeting July shipments, with an option to increase to 3000 wafers/month.
Having completed Cadence Design Systems’ qualification, TSMC and UMC say their 65nm process technologies are ready for chip designs utilizing the X Architecture, which utilizes diagonal interconnects instead of traditional right-angle layout resembling Manhattan street grids to shorten wiring across a die and reduce the number of vias.
Formosa Komatsu Silicon Corp., a silicon-wafer making venture between Taiwan’s Formosa Plastics Group and Japan’s Komatsu Electronic Materials Co. Ltd., plans to start pilot production at its first 300mm wafer fab in November, starting with output of 50,000 wafers/month according to the Taiwan Economic News. A second phase of production ramp, costing an estimated $459 million, will double capacity to 100,000 wafers/month by 2008.
EUROFOCUS
AMD plans to spend an additional $2.5 billion over the next three years to boost output at its semiconductor production facilities in Dresden, Germany, by converting some 200mm capacity to 300mm and building a new cleanroom to handle growing bump and test requirements. The upgrades could boost overall production at AMD’s Dresden operations to full capacity of 45,000 300mm wafer starts/month by the end of 2008.
European microelectronics consortium IMEC and Riber, a French supplier of molecular beam epitaxy (MBE) technology for compound semiconductors, are collaborating to introduce germanium (Ge) and III-V materials for CMOS scaling beyond the 22nm manufacturing node. Ge has been touted as a potential replacement for planar silicon due to higher mobility, resulting in lower intrinsic gate delay.