Issue



Integrating MEMS devices using low-temperature wafer bonding


02/01/2006







S. Farrens, P. Lindner, V. Dragoi, G. Mittendorfer, EV Group, St. Florian/Inn, Austria

Long-term limitations of wafer bonding methods include surface roughness and substrate bow/warp considerations. For MEMS products, the patterned surfaces decrease the likelihood that these requirements can be maintained, but several polymers can be used as planarization layers or compliant layers. The polymer layer is easily spin- or spray-coated onto virtually any surface topography and then bonded using the plasma activation process. The combination of spray coating on challenging substrates and subsequent plasma activated bonding enables many exciting new applications in the areas of microfluidics, bioMEMS, compound semiconductors, and general MEMS packaging.

Synthesis of one material onto another by deposition or growth is often impossible because of differences in lattice constant, thermal expansion coefficients, or extreme heats of formation. However, surface modification techniques such as plasma activation simplifies materials integration. Plasma activation involves attaching ions or radicals to the surface to change the surface chemistry, heats of formation, etc. Other techniques to circumvent growth methods include depositing polymer layers with multiple purposes. Polymers can be used to planarize rough surfaces, create a dielectric layer, and provide a bonding agent. The following sections describe methods to extend the present technologies for wafer bonding.

Plasma activation

Plasma-activated bonding using low frequencies does not etch or change the surface roughness of the substrates exposed to the ions, but it does allow for manipulation of the plasma chemistry to include higher densities of multiply ionized species on the surfaces. These species create an adsorbed layer with altered dielectric properties that increases the van der Waals attractions to prebond two surfaces together. Subsequent thermal annealing then leads to diffusion and chemical bond formation to achieve a final bond interface that is identical to a bulk material.

The most attractive feature of plasma activation is the low temperature of the annealing process. Most wafer bonding methods require temperatures over 400°C. With plasma activation, the final bonding occurs at 200-300°C for semiconductor materials and <100°C for a variety of polymer materials. This situation allows for the use of wafer bonding techniques with applications that are limited by metallization layers or pre-existing circuits. Additionally, integration of materials with vastly different thermal expansion coefficients can be integrated by using reduced temperature plasma bonding methods.


Figure 1. Surface energy vs. annealing time for bonded silicon dioxide-to-silicon wafers. Effect of activation on one substrate only is shown.
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Samples that exceed the bow/warp criteria needed for spontaneous bonding also benefit from using plasma activation. For severely warped wafers, the substrates are loaded into a bonding chuck so that the activated wafers can be aligned (if needed) and placed in a conventional thermal compression bonder. After plasma activation of one or both substrates (Fig. 1), the wafers are positioned into a wafer chuck. The wafers are typically held in separation using “separation flags” (10-100s of microns) and loaded into a compression bonder that may already be idling at an elevated temperature. Because the plasma activation is unaffected by the initial preheating of the wafer chuck up to 120°C, a throughput advantage is realized by preheating the chamber. Then, using the compressive piston force, the wafers can be forced into contact and annealed regardless of the wafer bow conditions.


Figure 2. Data for silicon-to-thermal oxide annealed at 300°C for 1 and 2 hrs. The annealing station is preheated to 150°C before loading.
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The advantage of the plasma activation step is to reduce sensitivity to microroughness and warp while catalyzing the bonding reactions so that lower annealing temperatures can be used. Figure 2 shows the data achieved for silicon to thermal oxide, revealing the lack of sensitivity to preheating [3]. Higher yields are realized because wafers with excess bow/warp can continue in the processing line instead of being scrapped. As an example, triple stack bonds with patterned wafers can be successfully plasma bonded even when all three of the individual wafers have an initial bow of >60µm.

Polymer layers for planarization

Surface roughness of a sample often prevents intimate contact of the surfaces and continuous interface bonding. Unlike bow/warp, the use of an applied force cannot press the surfaces together if roughness specifications are exceeded. For these cases, there are several polymers that respond to plasma activation and achieve bonding below 100°C. These polymers can be spin- or spray-coated onto processed wafers including patterned substrates. The polymers are then pre-cured, activated with the plasma, and bonded. Only one surface needs to be coated and the final bonds anneal to full strength at roughly 50-75°C within minutes.

Polymer methods are quite popular for packaging applications in which the interface must be sealed against moisture and is ultimately robust to operating temperatures up to 300°C. Another useful application is for the bonding of epitaxial layers such as AlGaInP or GaN to other integration substrates. Many of the epitaxial optical layers are very rough with growth spikes that are not easily removed. The polymer layers can be introduced at the bond interface because they are transparent to wavelengths down to 280nm. Additionally, the polymer layer acts as a compliant interface to mediate the stress that develops between the epitaxial layer and the integrated substrate material.

Several bulk polymers (e.g., PMMA) can be bonded to glass or silicon or themselves [4]. The use of plastics allows for rapid prototyping of designs and the creation of low cost, disposable, and biocompatible devices. The bond strength of these materials exceeds bulk limits, and the plastics will tear in a 3D mode rather than experience pure interface failure. Hence, the strength is equivalent to injection molded parts, but with significantly reduced feature sizes.

The standard techniques of anodic, thermal compression, and silicon direct bonding all require temperatures >400°C and, in the case of anodic bonding, high voltage. The evolving technologies of today are increasing the level of integration of MEMS and optical components with standard silicon technology. Emerging biotechnology devices require disposable, low-cost solutions. Wafer bonding offers solutions to many of these problems by using plasma activation to reduce processing times and temperatures and increase materials compatibility.

References

  1. V. Dragoi et al., to be published in the Proceedings of the MRS Conference, Spring Meeting, San Francisco, CA, 2005.
  2. J. Mizuno et al., “Fabrication of Micro-Channel Device by Hot Emboss and Direct Bonding of PMMA,” ICMENS, 2004.

Shari Farrens is chief scientist at EV Group, DI Erich Thallner Strasse 1, 4782 St. Florian/Inn, Austria; ph 43/7712 5311 5207, e-mail [email protected].

Paul Lindner is VP and CTO at EV Group.

Viorel Dragoi is currently chief scientist at EV Group.

Gerald Mittendorfer is supervisor of process technology at EV Group.