Product News
01/01/2006
Ion implanter achieves 500wph throughput
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The VIISta 900XP ion implanter is designed to address sub-MeV n- and p-type retrograde well implants for high-performance devices. It has an increased upper energy range and features a single-wafer architecture that enables precise, zero implant-angle capability and achieves 500wph. The implanter incorporates the Varian Control System, the Varian Positioning System, and a common single-wafer endstation. Commonality across the platform allows process matching and provides flexibility in managing capacity, product mix changes, spare parts, and training. Varian Semiconductor, Gloucester, MA; ph 978/282-2000, e-mail [email protected], www.vsea.com.
Automated system fully inspects wafers for HB-LED production
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The Candela CS20 is the first automated wafer inspection system designed to manage defects in the high-brightness LED (HB-LED) market. With multichannel detection, the system nondestructively inspects transparent substrates and epi layers at up to 25wph. Optical profilometry, scatterometry, phase shift, and reflectometry methods are combined to inspect materials such as sapphire, gallium nitride, and silicon carbide for defects including micropits, crystal defects, lattice mismatch, stains, and particles. KLA-Tencor, San Jose, CA; ph 408/875-6033, e-mail [email protected], www.kla-tencor.com.
Embossing/imprinting system demonstrates 1-3 min cycle times
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The HEX 04 hot embossing / imprinting system is suited for high-volume polymer-embossing applications, such as optical gratings, microfluidic chips, and wafer-scale sensor packaging, that require high-throughput systems. Feature sizes range from several microns to <50nm with aspect ratios approaching 100:1. An automated substrate-handling system results in 1-3 min cycle times and can emboss substrates up to 300mm. Proprietary active de-embossing technology is designed to ensure effective separation of the embossing mold from the substrate, minimizing induced stress, reducing separation time, and providing process uniformity. Jenoptik Mikrotechnik GmbH, Jena, Germany; ph 802/879-6480, e-mail [email protected], www.jo-mt.com.
System provides full-chip litho model per ITRS requirements
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The focus exposure modeling (FEM) system is a one-model, full-chip, full process-window lithography simulation technology that predicts design weaknesses before they cause failures in photomask or wafer production. This capability is integrated with the lithography-manufacturability check (LMC) system on the Tachyon platform, using advanced algorithms that combine image-based simulation with EDA-style polygon and contour-based geometry processing, to meet ITRS requirements for sub-90nm-node devices at full-chip capacity and throughput. Brion Technologies Inc., Santa Clara, CA; ph 408/653-4304, e-mail [email protected], www.brion.com.
Nanopositioning stage
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The P714 is a high-speed stage for x-y nanopositioning and scanning in alignment, microscopy, imaging, and resolution enhancement applications. The 45×45×6mm piezo-driven stage has a high resonant frequency of 2.2kHz for submillisec. response. Integrated high-resolution position sensors and piezoelectric drives provide subnm resolution. PI (Physik Instrumente) LP, Auburn, MA; ph 508/832-3456, [email protected], www.pi.ws.
PECVD system for FPDs
The AKT-50K PECVD system for manufacturing Gen-8 TFT-LCD panels can process up to six 52-in. flat panel screens per substrate using glass substrates ~2160×2400mm in size. With up to five process chambers, the system has a throughput of more than 30 substrates/hr for sequential three-layer deposition, and more than 60 substrates/hr for single-layer films. AKT Inc., an Applied Materials company, Santa Clara, CA; ph 408/563-0647, [email protected], www.appliedmaterials.com.
Dielectric etch chamber
This super capacitively coupled module (SCCM, development code JIN) chamber for 300mm Telius platforms is available for next-generation BEOL dielectric etch processing for 45nm and beyond. New hardware targets plasma sheath shape, electron energy, and other parameters to improve performance. The chamber is compatible with other productivity enhancements including a patented nonplasma-particle cleaning process and enhanced throughput hardware. Tokyo Electron Ltd., Tokyo, Japan; ph 512/424-1757, [email protected], www.tel.com.
Gap fill process
Sequential profile modulation process technology, a high-density plasma gap-fill process for the Speed NExT 300mm CVD system, provides a gap-fill solution for high aspect-ratio features in 65nm devices. The process is scalable to accommodate technology shrinks and device design changes without extensive process reoptimization. Short, in situ plasma treatment steps enable FEOL and BEOL applications. Novellus Systems Inc., San Jose, CA; ph 408/943-9700, [email protected], www.novellus.com.
Wafer-handling workcell
WaferMate workcells feature a PC-based (or optional Adept Technology) control system that enables custom programming. The WaferMate200 accommodates 100-200mm wafers, and can be configured with end effectors. The WaferMate300 accommodates 200-300mm wafers via Semi-standard automated loadports. Both are Semi S2, S8, and CE compliant. Chad Industries Inc., Anaheim, CA; ph 714/938-0080, [email protected], www.chadindustries.net.
Nondestructive metrology tool
The nondestructive Mentor OC23 uses statistical process control to measure material characterization properties and determine whether manufacturing process steps are operating correctly. The small-footprint tool is capable of 75 wph throughput. The weighing capability of <0.04mg, which equates to ~0.7nm or roughly two atomic layers, can be used on product, test, and blanket wafers independent of substrate size or material. Metryx Ltd., Bristol, England; ph 44/127-586-6260, e-mail [email protected], www.metryx.net.