Using the same line for processing Cu and Al
01/01/2006
Jae Song, DongbuAnam Semiconductor Inc., Seoul, Korea
Aluminum has served as an excellent interconnect metal for 40 years, but its limitations become evident at chip geometries in the sub-0.18μm range. Limitations include the difficulty of packing dielectric into the smaller gap between aluminum interconnects, intolerable RC time delays for high-speed circuits, and reliability concerns that occur with increasing current densities.
Led by IBM’s R&D from the late 1980s to the late 1990s, other IDMs began using copper in place of aluminum for high-performance chips. Semiconductor foundries soon followed suit, with TSMC initially offering a Cu interconnect option for just the top two layers where it could most fully leverage Cu benefits at the 0.18μm node. Although Cu interconnect technology remains a work in progress, it appears to be on track to become the interconnect metal of choice - for all layers - at 130nm geometries and smaller.
Cu conducts electricity much better than Al and has a significantly higher electromigration performance. However, Cu interconnect processing in the wafer fab is not a simple task. Cu diffuses rapidly in the oxide, and if it is not encapsulated with a reliable diffusion barrier, it can taint the oxide and potentially damage the underside transistors. Despite the benefits of Cu over Al for sub-0.18μm geometries, it is not likely that foundries and IDMs will be giving up their Al processing lines anytime soon. Aluminum interconnect processing technology is proven and inexpensive by comparison. Moreover, there is still significant demand for chips at the 0.18μm node and above for both mainstream and special applications.
Major cost savings
Conventional wisdom would argue for processing Cu and Al interconnects on totally separate lines to avoid cross-contamination. However, the cost of adding dedicated Cu processing lines can quickly approach $100M.
At DongbuAnam, it was found that the high cost of Cu processing can be dramatically reduced by running both Cu and Al processes on the same line. DongbuAnam estimates that it has saved >$90M by effectively processing both Al and Cu metals on a single line, along with using krypton fluoride (KrF) wavelength lithography systems, instead of more expensive argon fluoride (ArF) lithography, which is widely used at the sub-0.18μm node. In addition to the direct monetary cost savings, production workflow was simplified and less fab floor space was needed, making expansion possible.
Preventing cross-contamination
Coexistent processing of Al and Cu on the same line requires highly disciplined procedures. To prevent cross-contamination, the protocols are challenging but can drive a substantial return on investment if they are well managed. The methodology and protocols that were applied to control and prevent contamination are shown in Figure 1.
The most important aspect of contamination control is establishing a separation or segregation policy - it is critical to clearly separate those vectors of Al and Cu that may be dangerous when combined together. Sources of contamination are found by using the “5M, 1E” method (man, machine, material, method, measurement, and environment). The essence of contamination control is to ensure that the following four categories are not intermingled: dedicated Cu, shared Al/shared Cu, dedicated Al, and FEOL (front end of line). This categorization clearly separates Cu and FEOL vectors, where cross-contamination is most likely to occur.
Essential protocols may be divided into two types: for prevention of Cu and FEOL contamination, and for damage control after accidents. Activities conducted to prevent contamination include regular enterprise-wide training on relevant protocols, periodic audits, periodic monitoring of contamination levels, change management for processes and equipment, and adherence to contamination prevention specifications. To control damage after accidents, unscheduled training sessions are conducted; accident handling procedures are created; contamination accident causes are analyzed; and consultation committee meetings are held.
Extending KrF lithography
Additional cost savings can be realized by extending the use of KrF scanners that specify a light source wavelength of 248nm at the time of exposure. The light source wavelength has the biggest impact on resolution: the smaller the wavelength, the higher the resolution. The light source wavelength of the more expensive ArF scanners is 193nm at the time of exposure.
By developing the gate process for all interconnect layers with KrF lithography instead of the more expensive ArF lithography, both technology development and production costs were substantially reduced. Moreover, the KrF lithography scanners used at the 130nm node were the same as those used for the 0.18μm and 0.25μm nodes, thereby simplifying tool use and enhancing process compatibility across all three nodes. Figure 2 offers more detail about using KrF lithography at the 130nm node.
Acknowledgment
DongbuAnam’s Nano Team deserves recognition for fully qualifying the Korean foundry’s Cu interconnect process within one year and for formulating the essential protocols to run both Cu and Al interconnect processes on the same line.
Contact Jae Song at DongbuAnam Semiconductor, 32F, Dongbu Financial Center, 891-10, Daechi-Dong, Gangnam-Gu, Seoul, Korea, 135-523; ph 82/11-9736-3482; e-mail [email protected].