Issue



Simulation software enables DFM for MEMS


12/01/2007







EXECUTIVE OVERVIEW

Mask aligners are usually used as proximity printing tools where the mask is printed on the wafers using a “shadowing” technique. MEMS applications are just one of the applications that use mask aligners. A new simulation software platform dedicated to MEMS processes is described that enables the use of DFM methodologies and will save cost and reduce time-to-market for new processes and products.

Mask aligners have been the tool of choice for micro-structure manufacturing. As a low cost lithography solution for high volume production, mask aligners offer a high degree of flexibility and the ability to pattern thick resists. They are commonly used in production application areas such as final manufacturing processes for integrated-circuit manufacturing, manufacturing of power devices, in III-V semiconductor technology (e.g., lasers, LEDs, and optical sensors), flat panel displays, and MEMS processes.

The major limitation of mask aligner lithography, however, is its limited resolution compared to projection lithography where steppers and scanners are superior. But while mask aligner lithography falls short in resolution, it makes it up with other economical and technical advantages that include cost of ownership, better throughput due to single full-field exposure, and capabilities to more effectively deal with thick resists, large areas and nonstandard substrates.

Traditionally, mask aligner processes are developed by time consuming and expensive experiments. The cost of development remains high due to the length of time it takes to go from a design layout until the first pattern is printed on the wafer, often taking several weeks. Developing and optimizing the process by experimentally screening process parameters, “burning” wafers, and inspection requirements consume valuable time and resources. Of more importance, the cost of using lithography equipment and materials in addition to the overhead related to pre-processing, post-processing, and inspection is expensive.


Figure 1. Simulation of 3µm lines with 0.5µm resist on a silicon wafer with a proximity gap of a) 2µm and b) 20µm.
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As device designers and fab managers look to DFM methodologies for cost reduction and improved time-to-market, it remains difficult to improve the bottom line when the designs cannot be printed with a sufficient process window. Furthermore, failure to reduce design re-spins that require the fabrication of new masks and take up valuable time to conduct new experiments is counter-productive and costly. The development of these demanding processes may take months and require considerable costs for materials, (production) line occupation, and, most importantly, human resources.

Design and process optimization

In the same way projection lithography deals with the challenges described above, proximity aligner litho engineers can utilize powerful lithography simulation software to significantly reduce the number of experiments and the need for expensive and time-consuming design and process development cycles. Using fast and accurate software models, parameter variations can be run and evaluated within minutes without using the production line. Designs and processes can be optimized for manufacturability without burning wafers. In addition, the impact of resolution enhancements such as assist features, or even phase shift printing, can be evaluated quickly.

Lithography simulation is the most important tool used to enable design for manufacturing (DFM). Several commercial simulation software packages are available in the market, but these tools are limited to projection lithography modeling, and cannot be used for mask aligner lithography process simulation.

Layout LAB software, a new solution from GenISys GmbH, was developed in close collaboration with mask aligner equipment manufacturer, EV Group (EVG). Layout LAB models the optical system of a mask aligner consisting of source, mask pattern, and wafer stack, to calculate the resulting intensity and resist contour on the wafer within seconds.

Modeling the optical system

A mask aligner lithography system comprises the parts outlined below.

Illumination system. Mask aligners usually use mercury arc lamps (350-1000W) with broadband illumination in comparison to the single-wavelength laser illumination used by state-of-the-art steppers/scanners. The spectrum depends on the lamp type and filters used. An additional parameter of the illumination system is the coherence of the source, which is defined by its effective area. The light of the source is collimated by an optical system to provide parallel illumination of the mask. The illumination is ideally perpendicular in the center of the mask, and a lot of effort is taken to minimize the small incident angle at the outer parts of the mask.

Mask. The mask has transparent (clear) and opaque (dark) areas. The light generated by the illumination system is “shadowed” below the mask. Coherence, non-parallel illumination, and most important, deflection/scattering by the opaque structures of the mask (in most cases realized with chromium), results in “blurring” the image (“shadow”). The distortion of the image gets worse by increasing the distance to the mask.

Wafer stack. The wafer stack with resist and underlying layers is positioned at a distance (proximity/exposure gap) below the mask. There is a need to keep the proximity gap at a minimum for best image resolution, but to avoid damage or contamination of the mask by contacting the wafer with its nonplanar wafer stack (topography), it is necessary to use certain exposure gaps. Controlling the proximity gap precisely is difficult but can be handled with state-of-the-art mask aligners, but nonplanar wafer surfaces caused by topography cannot generally be compensated.

The light meets the interface between the air and resist at the distance of the proximity gap below the mask, resulting in refraction and reflection depending on the refractive index (n) difference of the materials. Passing through the resist, light will be absorbed, depending on the absorption coefficient (k). At the interface between the resist bottom and the layer below the resist, the light will again be refracted
eflected-depending on the refractive index and absorbance difference. Parts of the light will be reflected back (upwards) into the resist and will be overlaid to the initial exposure light, also causing standing waves.

Calculating the image

The complex optical system can be modeled by solving the electromagnetic field equations (Maxwell). The base of the optical simulation is the kernel calculating the light intensities (aerial image) on the wafer, depending on the mask design and properties of the optical system. Layout LAB uses the Fresnel theory for calculating the image of the mask for mask aligner systems.

The Fresnel-Kirchhoff diffraction:

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in the near field limit:

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leads to the Fresnel approximation:

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This integral is solved using fast methods in order to enable reasonable simulation areas for typical mask aligner applications. The solution is universal so that it can be applied to arbitrary layouts and allows the simulation of phase effects. The effect of the wafer stack (refraction
eflection at interfaces of different layers) is modeled using thin film theory (TMM-transfer-matrix-model). The full physical model of the optical kernel is complemented by the simple, robust resist model DAIMS (diffused aerial image model), which combines the threshold model with “blurring” the image.


Figure 2. Simulation and experimental results of 7µm lines and spaces for a) a soft contact proximity gap, and b) a 40µm proximity gap.
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Simulation platform
In addition to the accurate modeling kernels, the specific environment of MEMS manufacturers with a large variety of different processes and products requires high flexibility, ease-of-use, and support for automation and work-flow management. Layout LAB’s VisualFLOW graphical user interface (GUI) enables flexible and easy (drag and drop) design of complex hierarchical process flows

The database concept gives immediate access to predefined functional modules and enables the user to create and save custom modules or process flows as user-defined modules for later re-use. In this way, the user builds a corporate knowledge base of tools and processes that can be leveraged by others, thus increasing productivity and reducing cost. This capability is especially important in MEMS fabrication lines where a large number of processes and products need to be handled and managed by different groups and this sharing of knowledge offers many benefits.

Simulation example

Simulation supports the process development for finding the best parameter settings for a given product. Possible parameters-such as, illumination spectrum, coherence, intensity, layout, proximity gap, resist type and thickness, and types and thicknesses of layers below the resist-can be optimized to find the best process conditions; the sensitivity to parameter variations can also be analyzed. The ability to run virtually thousands of different process conditions within a reasonable time frame and analyze the results will minimize the need for experimental screening. At this stage, simulation will also help to provide design rules like minimum CDs, distances, bias requirements, or support structures.

Figure 1 shows the simulated intensities in the resist layer for 3µm lines and spaces at different proximity gaps. Reflection from the resist bottom (interface to silicon wafer) results in standing waves in the resist. The standing waves can be avoided by using a coating with adjusted refractive index and thickness below the resist. The image in the resist gets distorted with increasing proximity gap.


Figure 3. Simulation and experimental results of a) a nonoptimized process and b) an optimized process.
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Figure 2 shows results of a 7µm wide line and space pattern with a resist thickness of 7µm at different proximity gaps. The simulation images show the intensity distribution and the corresponding, simulated resist image of this pattern exposed in soft contact mode and with a proximity gap of 40µm on an EVG620 mask aligner with a standard wavelength range of 350-450nm. To get a comparison between simulation and reality, SEM images of actual processed patterns are shown as well. Figure 3 shows a comparison of the simulation and real wafer results of an alignment structure before and after process optimization.

Pushing the resolution limits

The low cost of mask aligner lithography is driving its use for smaller dimensions, but scattering effects are limiting the resolution. Submicron structures can be printed in vacuum contact between mask and wafer, but the image gets distorted as the distance to the mask increases, leading to printing results that are difficult to understand. Simulation of the “aerial image” below the mask is an excellent technique for understanding, controlling and optimizing the effects.


Figure 4. Intensity of 1µm lines over distances from mask (gap).
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Figure 4 shows the aerial image of 1µm lines. Experiments will show that this dimension can be printed at very small gaps below 1µm (vacuum contact) and using thin resist. As the gap gets larger in order to minimize or avoid mask contamination, the image will be distorted. This can be seen first at the line ends getting the “V” shape (Z = 1.4µm). The center of the lines get thinner and break (z = 1.8). The three lines then break into six lines at z = 2µm, and the image is inverted at z = 2.6. The deflection and scattering caused by the mask pattern can be clearly seen and understood at the x-z view of the image. Understanding the effects gives the opportunity to develop techniques for pushing the resolution limits (resolution enhancement techniques) to sub-micron dimensions.

Process window optimization

The production yield is very much dependent on the process window of a given mask at the process parameter. The process window defines the dependency of a target parameter (e.g., CD of a line) on process parameter variations. The standard process window in projection lithography is defined with a variation of defocus and dose. The standard measure for qualifying a process is the so-called focus-exposure matrix (FEM).


Figure 5. Process window over proximity gap and dose for 3µm lines.
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The most important parameters with variation during manufacturing for mask aligner lithography are proximity gap and exposure dose. Therefore, the analysis of the target parameter as a function of gap and exposure dose will display the function as a matrix, “gap-exposure matrix” (GEM), which is an equivalent quality measure for process stability in mask aligner lithography. The area in the graph (gap at x-axis, exposure at y-axis, resulting CD as a set of curves) between the curve of CDmin and CDmax is the process window. The largest rectangle or ellipse fitting into the area is the process window, where the width is the gap variation latitude and the height is the intensity (exposure) latitude (Fig. 5). Simulation helps to analyze and maximize the process window under different conditions, saving time, cost, and maximizing yield.

Conclusion

Mask aligner lithography simulation for MEMS applications is a useful tool to save costs and time-to-market of new processes and products. Layout LAB is a new simulation software platform dedicated to MEMS processes, enabling the use of DFM methodologies for the development of processes, verification and optimization of layouts, and optimizing production yield. The early applications are in process development for understanding and optimizing process effects.

Acknowledgment

VisualFLOW is a trademark of GenISys GmbH.

Rainer Födisch received his masters degree in mechanical engineering at the Technical U. Ilmenau in 2004 and is product manager at EV Group (EVG), DI Erich Thallner Strasse 1, A-4782 St. Florian, Austria; ph 43/7712-5311-0, e-mail [email protected].

Alois Malzer received his masters degree in electrical engineering at Graz U. of Technology in 1999 and is product manager at EV Group (EVG), St. Florian, Austria.

Nezih Ünal received his masters degree in electrical engineering at Wuppertal U. in Germany at 1988 and is VP of sales and marketing at GenISys Gmbh, Taufkirchen-Munich, Germany.