A variable batch size DCS nitride process using low-temperature LPCVD
08/01/2007
K. Williams, E. Brenniman, J. Su, Aviza Technology Inc., Scotts Valley, California, United States; H. Lee, X. Zhao, J. Sun, Semiconductor Manufacturing International Corp., Beijing, China
As thermal budgets for nitride deposition have decreased to meet sub-90nm process requirements, silicon nitride films have been widely used in LPCVD or plasma enhanced chemical vapor deposition (PECVD) to deposit spacer, etch stop layer, oxynitride-oxide stacks, and oxide masks for front-end-of-line applications [1, 2]. Dichlorosilane, SiH2Cl2 (DCS), and ammonia (NH3) have been typically used in LPCVD furnaces for nitride deposition at temperatures >700??C [3]. Due to the need to reduce the thermal budget to meet the sub-90nm process requirements, this approach has been pushed to lower temperatures, between the range of 600??-680??C in conventional batch furnaces on 300mm production lines.
 Figure 1. Example of temperature rising curve for NF3 dry clean monitoring. |
As throughput requirements rise, the pressure to fully utilize fab capacity increases. To support stringent capacity requirements and meet fab production forecasts, multiple types and quantities of device wafers are processed, which drives the demand for a flexible batch furnace solution. A flexible batch furnace allows for better production control and optimization and enables users to easily process with variable batch sizes. A total of 25, 50, 75, or 100 wafers can be treated in the same furnace without any process, hardware confirmation, or qualification. This promotes better wafer work-in-progress (WIP) cycle time and reduces inventory [4]. The challenge associated with the variable batch size is the need to maintain the same process conditions over the entire batch load size. Each wafer in the batch must see an identical process independent of different load sizes.
To achieve optimum results in a flexible batch furnace, a wide and stable process window is required to deliver repeatable wafer results with variable load sizes. Deposition rates, uniformities, conformality, and particle performance should be independent of load size. One approach in meeting the aforementioned requirement can be summarized as first creating a single wafer environment for each wafer in a batch furnace system and second, providing a hardware set that is capable of a wide process window, so many applications can be run in the same furnace. These two requirements, coupled with lower temperature processing, must also address the higher probability of the NH4Cl (ammonium chloride) or SixNyClz byproduct formation [5].
The objective of this work is to deliver a methodology and approach to address the needs of running a low-temperature DCS nitride process in a flexible batch furnace. The method should result in a robust low-temperature DCS/NH3 nitride process, capable of running variable load sizes, with low particle adders, high system availability, and low frequency preventive maintenance.
Process mechanism and particle control
The silicon nitride reaction from DCS/NH3 chemistry follows the reaction as shown [5]:
3SiH2Cl2 + 5NH3 -→ Si3N4 + NH4Cl +5HCl + 6H2
The gas phase NH4Cl forms a white condensate in the low temperature areas of the exhaust system and plenum. As with all DCS nitride systems, an exhaust and plenum design must eliminate all cold spots to ensure minimal NH4Cl condensation, thus avoiding particulate and exhaust line obstructions [5, 6]. Extensive hardware modifications were undertaken to address the partial pressure of NH4Cl associated with the lower temperature and higher operating pressures commonly required for this process. Well-managed temperatures in all wetted surfaces eliminate NH4Cl formation. Also, many DCS nitride systems use cold traps to effectively contain the NH4Cl byproduct within the system, extending the life of the pump. With the proper heating of exhaust components, it was determined that particle generation was significantly reduced by placing the cold trap farther away from the process chamber. In addition, this relocation reduces the concern of byproduct back streaming to the chamber, causing defects in the devices. An optimized thermal chamber and proper process tuning will also reduce intermediate SixNyClz byproduct condensation.
Conventional silicon nitride films have encountered difficult-to-control SixNy particle issues [7]. One aspect of the problem is the high stress exhibited by nitride films. Also, different process conditions within the same system, temperatures, and ratios can worsen the effects of stress. To overcome the challenges of film stress, a process recipe sequence optimization was completed. Recipe steps were optimized to reduce disturbances of pressure, gas flow, and temperature to existing nitride-coated surfaces. Particle performance is further enhanced by a well-controlled N2 (nitrogen) mini-environment and optimized wafer loading/unloading strategy [3, 7, 8]. The study shows that combining wafer loading sequence and recipe sequence optimizations reduces 70% of the average particle counts.
To further manage particle control, a practical in situ dry clean was developed and implemented to maintain particle performance under the control limit. The cleaning eliminates the need for a costly and timely quartzware change. However, underetching and overetching are two issues often encountered during the cleaning stage. The effects of an uneven etch have been resolved through optimized temperature tilting and gas ratio. A sensitive temperature endpoint detection mechanism enhances the dry clean process to avoid over etch. When the etch breaks through the nitride film, the F (fluorine) reacts with quartz, causing an exothermic reaction, resulting in a temperature rise, which is detected by a thermocouple. Figure 1 shows an example of using NF3 (nitrogen tri-fluoride) dry clean with this temperature control technique. NF3 has been selected over F2 (fluorine) or ClF3 (chlorine tri-fluoride) in production because it is less corrosive, does not require double contained delivery, and the toxicity is much lower. NF3 is also widely available to most 300mm fabs today.
A single wafer environment
Both temperature and gas flow depletion are challenges faced in delivering repeatable wafer results with varying load size. The key to ensuring consistent results is to have an isothermal designed chamber and a single wafer gas flow environment in a batch furnace system.
 Figure 2. The DCS/NH3 nitride film coating conformity from the single wafer environment concept. |
To maintain a uniform thermal profile across the flexible batch furnace, the heating element needs to be thermally balanced. The single wafer environment in the batch furnace uses a gas injector with numerous holes on one side that is balanced by a number of pumping slots on the opposing side of the chamber to eliminate the nonuniformities encountered in a standard up flow batch furnace [9]. An example of coating conformity from low temp DCS/NH3 nitride film is shown in Fig. 2.
Process characterization
At 600°-680°C, the deposition rates of DCS/NH3 nitride are depressed; and pressure, gas ratio, and total flow are modified to increase deposition rates in order to provide production worthy throughput values while maintaining good uniformity and desired film properties. Initially, we found that increasing just the pressure resulted in higher deposition rates. However, the initial benefits gained in deposition rate were offset by adverse effects to both film etch rates and film uniformities. Flows were then adjusted to equalize inlet gas concentration to the wafers in conjunction with selecting the appropriate DCS:NH3 gas ratio.
Results proved that a high quality DCS/NH3 nitride film was achievable, such that within-wafer (WiW) and wafer-to-wafer (WtW) uniformities met expectations while maintaining desired film properties. Optimized chamber and exhaust hardware design and configurations, such as a variable hole injector and a manifold design without o-rings, were determined key to avoiding process conditions that potentially favored Si-rich or NH4Cl byproduct formations.
 Figure 3. The process trends from ±10% variation. |
For this study, process optimization began by selecting the most favorable DCS:NH3 gas ratio and a pressure that was adequate for achieving production-worthy deposition rates. This was followed by a design of experiment (DOE) to explore parameters for better WiW uniformity with targets below 1% (1σ). Once the WiW uniformities were met, automatic temperature control (ATC) was used to fine-tune the WtW uniformity to meet 1% (1σ). This last step completed the recipe optimization.
 Figure 4. The process stability of final recipe (PDC test). |
A surface response DOE sequence was run to measure and evaluate the process window of the gas flows, temperature, and pressure of the final recipe. The experiment was based on the philosophy of ±10% variation for each of those variables. The process trends and results are summarized in Fig. 3. The DOE plots indicate that a lower pressure has better uniformity, but lower deposition rates for a low-temperature DCS/NH3 process; therefore, process parameter changes can be made by end users to tailor the process to specific production needs. An example of process stability is passive data collection (PDC) data, which is shown in Fig. 4.
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Etch rate resistance degradation is another challenge of DCS nitride film at low temperature. The minimal requirement is to have ≤10Å/min loss in a 100:1 hydrogen fluoride (HF) solution. The etch rate resistance is mainly affected by temperature and gas ratio. Table 1 shows the dependence of temperature to etch rate. The data indicate it will be very challenging going below 630°C using a DCS/NH3 nitride chemistry without sacrificing etch rate resistance. Etch rate resistance will be a limiting factor and must be a focal point when using lower deposition temperatures.
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A flexible batch mode operation is demonstrated by confirming the minimal deposition rate and uniformity shifts using the optimized process recipe and variable load size wafer processing. The results are summarized in Table 2, which shows minimal process shift between different wafer loads. The device yields of 90nm DRAM devices are compared between 50-wafer and 100-wafer loads in the production line and no significant differences were observed.
Conclusion
A detailed process optimization of a low temperature DCS/NH3 nitride process has been demonstrated in a flexible batch furnace that meets or exceeds current 90nm device requirements. The process window and trends were characterized to show process robustness. An optimized recipe has been confirmed, yielding no differences between 50-wafer and 100-wafer loads in an advanced 300mm volume production fab.
Nitride deposition rates at 630°C require critical process parameters such as high pressure, high gas ratio, and uniform gas distribution across the chamber. These process parameters provide production-worthy deposition rates, high-quality nitride, and low wet-etch-rate film. However, to maintain such operating space at the expense of a byproduct environment, an optimized hardware package is required for byproduct management and particle reduction.
An isothermal chamber design to maintain temperature stability across the boat and a single wafer processing environment are the keys to delivering optimal process performances in a nitride CVD system. Combined with the concepts studied, the flexible batch furnace provides a wide process window to run a low temperature DCS/NH3 nitride process.
Acknowledgments
The authors would like to thank David Song and Harold Song for their support at SMIC; Jimmy Li, Sergio Luna, Eddie Chiu, Khalid Mohamed, Alex Kolessov, Cole Porter, Thomas Qiu, Billy Cho, Jimmy Nguyen, and Jeff Bailey for their laboratory activities and simulation work at Aviza Thermal Lab.
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Karl Williams received his BS in electronic engineering technology from California Polytechnic, San Luis Obispo, CA, and is a technologist at the Thermal Business Unit of Aviza Technology Inc., 440 Kings Village Road, Scotts Valley, CA 95066, United States; ph 831/439-6403, e-mail [email protected].
Eric Brenniman received his BS in chemical engineering from the U. of Wyoming and is a process development engineer for the Thermal Business Unit at Aviza Technology..
Jim Su received his PhD in materials science from the USC and is director of technology for the Thermal Business Unit at Aviza Technology..
Hsiuyuan Lee received his BS in nuclear engineering from Tsing- Hua U., Hsinchu, Taiwan. He is an assistant director at Semiconductor Manufacturing International Corp. (SMIC), Beijing, China; e-mail [email protected]..
Xing Zhao received his MS in electronic engineering from National U. of Singapore. He is a process manager in the diffusion department at SMIC..
Jianjun Sun received his BS in communication engineering from Beijing Jiao Tong U. of China. He is an equipment engineer in the diffusion department at SMIC.