Issue



BUSINESS TRENDS


07/01/2007







Analyst: 193nm requirements, BARCs driving resists market

Extending 193nm lithography through the 45nm and 32nm nodes while EUV litho struggles to gain traction will require performance improvements such as multilayer patterning and multiple exposure schemes, and this will drive more use of spin-on patterning materials, according to a report from Linx Consulting.

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The analyst firm projects the resist market will grow about 7% this year to $1.5 billion, and expand by roughly 9%/year through 2011 to exceed $2.0 billion (see figure). That includes little or no growth for “older” resist materials (e.g., g-line, i-line, and DUV), vs. the newer crop of materials for 193nm and related litho technologies, such as spin-on hard masks, amorphous carbon layers, and silicon containing bottom antireflective coatings (BARCs). Growth will be driven by a variety of high-volume applications (e.g., DRAM, NAND flash, and some advanced logic), as more critical implant levels move to 193nm.

WORLDWIDE HIGHLIGHTS

Intel and STMicroelectronics have formed a new flash memory company combining ST’s flash memory assets and Intel’s NOR assets, as well as parallel programs on phase-change memory. Private equity firm Francisco Partners is a minority partner (~6%).

Investments to equip fabs will slow to 3% growth in 2007, down from 25% in 2006, with fab construction investments also in the low single digits (4%-5%), according to SEMI.

“Common Platform Alliance” partners IBM, Chartered, Samsung, Infineon, and Freescale plan to extend technology development agreements through 2010 and beyond for 32nm bulk CMOS process technologies.

Worldwide silicon wafer area shipments rose just 1.4% during 1Q07 to 2070 millions of sq. in. (MSI), representing the third straight quarter of little or no growth, according to SEMI’s Silicon Manufacturers Group.

USA

FSI International says it has received a US patent for a method that combines etching and rinsing in a single immersion tank, eliminating wafer defects caused by wafer exposure.

Intel says that its 45nm processors will be its first to incorporate 100% lead-free packaging designs, using a tin/silver/copper alloy, and its 65nm chipsets also will be transitioned over next year.

Polysilicon silicon supplier Hemlock Semiconductor will spend $1 billion over the next four years to expand its Hemlock, MI, site, nearly doubling the company’s total output to 36,000 metric tons/year.

ASIAFOCUS

Capital investments from Japan’s top seven chipmakers-Toshiba daily paper.

Chartered Semiconductor Manufacturing has secured a $610 million loan guarantee from the US Export-Import bank, to support a Phase 2 capacity increase at its 300mm Fab 7 facility to 39,000 wafers/month, about 2.4×-2.6× of the site’s current capacity levels.

China’s SMIC has signed six letters of intent to purchase $1.86 billion worth of semiconductor manufacturing equipment over three-year periods from US vendors.

UMC has opened its new 300mm R&D center in Taiwan’s Tainan Science Park, adjacent to the foundry’s Fab 12A 300mm facility, with independent cleanroom R&D areas for 45nm and below technology development.

ASSP chipmaker Diodes Inc. says it will consolidate its analog wafer probe and final test operations from Hsinchu, Taiwan, to facilities in Shanghai, China, by the end of July.

EUROFOCUS

Solvay Solexis is expanding production capacity by ~30% for polyvinyledene fluoride, a specialty thermoplastic material, in Tavaux, France. The extra capabilities should be onstream by early 2009.