High interest in low-end printable electronics
07/01/2007
Discussions of Moore’s Law usually focus on the fastest microprocessors and the highest memory densities. For these components, the history of the integrated circuit (IC) industry is one of almost unbroken progress, doubling transistor density every two years or so at the same cost. Yet simply doubling transistor density does little to improve either the performance or the cost of many emerging applications. RFID tags store just 100 bits of information, trivial by DRAM standards. Displays and sensor arrays are more desirable if they are larger. Nanometer-scale transistors can help display quality, but do little to improve the parameters that matter most to customers.
In the language of Clayton Christensen’s seminal book, The Innovator’s Solution, the performance requirements of these applications are overserved by conventional CMOS manufacturing. At the same time, CMOS underserves other important requirements, like cost and portability [1].
Why not CMOS?
RFID tagging at the pallet level simplifies manufacturing and shipping logistics. The facility can read tracking numbers from pallets as they pass through a gate, rather than manually scanning a barcode. Tagging at the individual item level could help differentiate between authentic and counterfeit goods, provide detailed lot tracking for medicines and other highly sensitive products, and reduce retail theft. Yet most applications can only accept an incremental package cost of 1-2 cents per tag. The cost increment must cover not only the silicon IC’s insignificant cost, but also the inductor and the assembly steps involved in bonding the IC to an inductor and bonding the unit to a retail package. Both pick-and-place and fluidic self-assembly techniques are used to manufacture pallet-level tags, but it is not clear whether either can reach the very low cost needed for item-level tagging.
The dimensions of displays and sensor arrays are often defined by the application. A sensor array might adhere to the skin of an airplane or a medical patient. Hikers and military units might appreciate a map with an embedded GPS indicator, especially if it were as foldable and portable as a printed map. Further down the road, manufacturers envision disposable displays. These might guide visitors around a museum or city, highlighting points of interest or advertiser locations. Disposable electronic coupons might announce sales at particular times, or when the customer was near the store. The computational demands of these applications are moderate, well within the capabilities of current technology. Yet current technology is neither mechanically robust enough for full-scale electronic maps, nor cheap enough for disposable electronic guidebooks.
It’s worth remembering that the printed materials used in these applications offer an excellent combination of form and function. A printed map can be spread out on a table to show a large area, or folded into a small square to show just a few city blocks. One sheet might have several different views, from a low-resolution map of an entire state to a detailed map of a city center. Maps have among the highest data densities of any information graphics, according to Edward Tufte [2]. They can tolerate rips, stains, and other damage, often with little or no loss of function, yet even the best maps cost only a few dollars.
Maps are a product of a much older, but equally revolutionary information technology: printing. After centuries of continuous improvement, printing systems measure their output in meters per minute and achieve costs per area as much as two or three orders of magnitude less than silicon CMOS. What if you could enlist low-cost, high-volume printing technology for the manufacture of area- and cost-constrained ICs?
Printing: good news, bad news
Printing differs from conventional CMOS manufacturing in several important ways. The most important difference, and the root of printing’s cost advantage, is that it is a low temperature, atmospheric pressure process. It is compatible with essentially any substrate material, with existing industrial applications using materials as diverse as corrugated cardboard, paper, metal foil, and plastic film. Many of these substrates are challenging for silicon processes, due to the high temperatures required for silicon deposition.
The second important characteristic of printing is that it is generally an additive process. Whereas CMOS uses exposed photoresist to etch much of each layer away, printing simply stacks one patterned layer on top of the next. Materials utilization approaches 100% in many cases, and materials deposited on the substrate generally stay there. Converting inherently subtractive CMOS processes for use in an additive process environment will certainly be difficult and may prove impossible.
Finally, many of the printing methods considered in this article are continuous, roll-to-roll processes. Many small volume printers are batch-oriented, single sheet devices, but roll-to-roll printing’s high throughput gives it the most significant cost advantage. Continuous processes allow only limited time-usually only seconds-for annealing and in situ chemical reactions.
Taken together, these factors largely eliminate silicon and conventional silicon processes from consideration. Though some groups, particularly solar cell manufacturers, are investigating roll-to-roll fabrication of silicon devices, most flexible electronics processes use an entirely new material set.
Printable electronics demand functional inks with conducting, insulating, and semiconducting properties. Though many candidate materials are available, different printing methods require different viscosities and drying characteristics. For example, inkjet printing requires low viscosity inks that can form individual droplets at the printhead. These inks should dry quickly on contact with the substrate, but not so quickly that the printhead clogs. Flexographic printing, in contrast, transfers ink from a reservoir, to a roller, to a flexible printing “plate.” The ink must be viscous enough to coat all of these surfaces evenly, and mechanically robust enough to tolerate the resulting shear stress [3].
Most conventional printing methods cannot yet meet the resolution requirements of even simple electronic circuits. The smallest printed features are typically ≥10µm, while device manufacturers would prefer submicron features for performance reasons. This limitation is not necessarily inherent in the technology. Rather, printing presses simply have not been asked to produce subvisible features before, so engineering effort is required. Researchers are also addressing resolution limits through surface energy control, as well as through integration of CMOS-like patterning methods with conventional printing techniques.
Metal inks
The most mature group of electronic inks are probably metallic inks. They have been used in both decorative and electronic applications for several years, but are now being asked to deliver smaller feature sizes and lower resistance.
Generally speaking, metallic inks consist of a suspension of metal particles in a solvent. These inks create a conducting path with a higher resistance than a conventional wire, due to the gaps and interfaces between particles. Achieving a consistent film is difficult because the metal particles tend to agglomerate and settle out of solution, especially in low-viscosity inks. One potential solution, demonstrated by Daniel Huang and coworkers at UC Berkeley, depends on the unique behavior of metallic nanoparticles. The Berkeley group created an ink from a suspension of gold nanoparticles encapsulated in alkanethiol polymers. The encapsulant prevented agglomeration by isolating the particles from each other, while the small particle size limited settling. To convert a layer of isolated particles into a conducting line, the researchers took advantage of the unique thermal properties of nanoparticles, which have melting temperatures orders of magnitude lower than that of the bulk metal. After printing, sintering at or below 150ºC melted the individual particles and drove off the encapsulant. Once the encapsulant was gone, bringing the droplets of molten metal into contact with each other, the melting point rapidly returned to the bulk value, causing rapid solidification and formation of a bulk conductor. Lines printed in this manner demonstrated conductivity comparable to that of the bulk metal [4].
Inkjet transistors
Inkjet printing has been used in much of the early research on printable electronics, including much of the work on printable metals. Low-end inkjet printers are readily available at office supply stores, as are cartridges inexpensive enough to sacrifice in the name of science. Circuit patterns can be designed quickly and easily in software, without recourse to specialized maskmaking techniques. Yet inkjet printing is not an ideal technology for high-volume IC manufacturing. It places the ink one droplet at a time, while most printing technologies apply a uniform film of ink across an entire roller or plate. Droplet deposition is relatively slow. Creating a uniform line is especially difficult. First, the individual droplets must overlap to achieve complete coverage, giving the line a series of ridges at the overlapping edges. Second, droplets tend to dry in a “coffee ring” pattern, with a thicker ring of material surrounding a thinner center. The ink must either dry slowly enough for these features to smooth themselves out, or the process must accommodate a separate reflow step.
Inkjet printing also gives relatively low resolution, with minimum feature sizes typically between 20 and 50µm. Researchers have used a variety of creative fabrication techniques to work around this limitation. For instance, at this year’s Materials Research Society (MRS) Spring Meeting (April 9-13, San Francisco), Henning Sirringhaus, of the U. of Cambridge, discussed the use of surface energy manipulation to define submicron self-aligned transistor structures (see figure on p. 34). First, the Cambridge group deposited an anti-wetting coating on top of gold droplets. The coating repelled additional droplets to form a surface energy-mediated gap. The gap, only a few nanometers wide, allowed formation of a self-aligned gate. After electrode deposition, the researchers deposited first poly(9,9-dioctylfluorene-co-bitiophene) semiconductor (F8T2), then poly(methyl methacrylate) dielectric (PMMA), then a photoresist layer. They exposed the resist in the gate area by shining ultraviolet light through the backside of the transparent substrate, using the opaque metallic electrodes as a mask. Self-aligned deposition of a conducting poly(3,4-ethylenedioxythiophene) (PEDOT) gate into the resist trench completed the thin film transistors [5].
Larger metal features, like inductors, may be able to use a simpler manufacturing method. At this year’s MRS Spring Meeting, Magnus Berggren and colleagues at Linköping U. demonstrated printed RFID devices in which the metallic inductors were simply milled from metal foil. Rotary milling of metal foil is a mature industrial process, with throughput up to 160 m/min [6].
Self-assembly of thin dielectrics
The second important component of printable circuits, the dielectric, faces a challenge opposite that of metallic layers. For metals, thicker lines are desirable because they reduce resistance. For dielectrics, particularly transistor gate dielectrics, thinner layers are desirable because they reduce the operating voltage of the device. Thin dielectrics and low-voltage operation are especially important for RFID tags, which are constrained by the voltage that can be induced through the antenna.
Suitable dielectric materials are readily available-many different polymers have been used-but it can be difficult to create a thin enough layer that is also continuous. Current simply flows around pinholes in a metal layer, but pinholes in a dielectric cause short circuits.
One common approach to the deposition of thin continuous dielectric films depends on self-assembled monolayers (SAMs) composed of molecules in which one end preferentially bonds to the substrate, while the other is repelled by it. Thus, the material coats the substrate with a uniform, aligned monolayer. Dielectrics are often deposited as blanket films, with a SAM serving either as the dielectric by itself or as an adhesion layer to ensure a uniform spray deposition.
Patterned SAMs can also be used to encourage selective deposition of other materials. Researchers use a stamp to prepare patterned areas with the appropriate monolayer. An organic semiconductor or conductor preferentially adheres to the prepared region, but rinses off the untreated areas of the substrate.
The stamp for the self-assembly process is usually prepared by replicating a quartz or silicon mold. Standard lithographic techniques first cut the circuit pattern into a quartz or silicon layer. A rubbery material, commonly polydimethylsiloxane (PDMS), fills in the mold, conforming to it. After curing and release from the mold, the stamp is ready for use in circuit preparation. The release step does not damage the mold, which can be reused as often as necessary.
Very small feature sizes can be achieved in this manner, as the initial mold fabrication can use all the tools of maskmaking and other direct-write lithography methods. “Soft lithography,” as this stamping of SAMs is known, is potentially compatible with roll-to-roll processing: the PDMS stamp resembles the soft plate used in flexure printing. Though initial research has been promising, it is not yet known how susceptible to defects the PDMS stamp will be. The stamp itself could distort mechanically, or particles could embed themselves in the soft surface. Some wear and tear is likely; the stamp lifetime under use conditions is not yet known.
Beyond silicon
Most printed electronics researchers assume that only organic semiconductors can achieve the desired process simplicity and cost. Many different organic semiconductors exist, but all share a conjugated carbon backbone, in which single and double carbon bonds alternate. Conduction occurs by hopping between adjacent chains. The best carrier mobility is achieved in structures where the backbone chains of adjacent molecules are parallel to each other. (More precisely, such structures allow overlap between the π-orbitals of adjacent molecules.) Freestanding single crystals of rubrene have achieved the highest mobilities of any organic semiconductor, at 30 cm2/V-sec. Evaporated pentacene films typically have mobilities of ~1 cm2/V-sec [7].
Neither freestanding single crystals nor thermal evaporation are compatible with ambient atmosphere printing processes, however. Moreover, pentacene is not soluble in common solvents like toluene, and so it is difficult to create a pentacene ink. Other organic semiconductors dissolve more rapidly, so many researchers have attempted to improve the mobility of these compounds. For example, at the MRS Spring Meeting, PARC researcher Michael L. Chabinyc reported work on optimization of poly(2,5-bis(3-alkylthiophen-2-yl) thieno[3,2-b]thiophene) (PBTTT). The PBTTT molecule has side chains extending on either side of the conjugated carbon backbone. Chemists can manipulate the number and spacing of these chains, and have found that the most highly ordered films occur when the side chains of adjacent molecules fit together like interlaced fingers. This structure reduces the spacing between adjacent molecules, improving conduction between them. The group achieved mobilities of 0.1-0.5 cm2/V-sec, but the relationship between structure and mobility was not clear [8].
Attempts to develop solution-processable pentacenes have met with some success. One approach depends on a soluble pentacene precursor, converted to pentacene after deposition. Another modifies the pentacene molecule to improve solubility [9, 10].
In all of these cases, the overall circuit properties depend on the alignment and structure of the film. Low temperature, liquid phase deposition methods inherently provide much less control of crystal structure than high temperature vapor deposition schemes. One promising method uses a PDMS stamp to place self-aligned octadecyltrichlorosilane (OTS) in the desired locations. This creates a rough surface and appears to encourage growth aligned with the template. Zhenan Bao at Stanford even showed that a suspension of single crystal particles preferentially aligned themselves on a surface prepared in this way [11].
Applications
Efforts to combine the techniques discussed in this article into integrated manufacturing processes are just beginning. The Linköping U. group mentioned earlier combines its rotary-milled RFID inductors with printed organic devices. Rather than depositing the organic semiconductor, however, the group starts with polymer-coated paper, then patterns it by selective overoxidation, using a screenprinted gel electrolyte ink. Based on the Linköping U. experience, Berggren warned that these are extremely high-volume processes. The single printer at Linkoping processes 30m of substrate/min. The system is tiny by industrial printing standards, but is still capable of producing 720 million RFID tags per year.
Some applications can support such large volumes. Ubiquitous item-level RFID tagging would consume trillions of tags annually. However, lower-volume applications such as aircraft sensor arrays will need to make sure that throughput of their printing systems matches the desired production volumes. For these applications, the low setup costs of inkjet printing may be more important than its relatively low throughput.
Declaring that a given organic semiconductor application won’t command enough volume is risky. After all, IBM once believed that the total world computer market totaled about five machines. As transistors became less expensive, demand for them rose. The same is likely true for printable electronics.
References
- Clayton M. Christensen, Michael E. Raynor, The Innovator’s Solution, Harvard Business School Press, Ch. 2, 2003.
- Edward R. Tufte, Envisioning Information, Graphics Press, p. 49, 2003.
- Daniel R. Gamota et al., ed., Printed Organic and Molecular Electronics, Kluwer Academic Pub., 2004, is a good introduction to printing technologies and ink formulation for electronic devices.
- Daniel Huang, et al., “Plastic-compatible Low Resistance Printable Gold Nanoparticle Conductors for Flexible Electronics,” J. Electrochem. Soc., Vol. 150 (7), pp. G412-G417, 2003.
- Henning Sirringhaus, “Printing-based Manufacturing of Polymer TFTs,” MRS Spring Meeting 2007, April 9-13, San Francisco, paper N2.3.
- Magnus Berggren, et al., “All-organic Electronic and Electrochemical Devices Printed on Paper,” MRS Spring Meeting 2007, April 9-13, San Francisco, paper N1.4.
- G. Hadziioannou, P.F. Van Hutten, ed., Semiconducting Polymers, Wiley-VCH, 2000, is a good overview of the physics, chemistry, and applications of organic semiconductors.
- Michael L. Chabinyc, “Controlling the Performance of Semiconducting Polymers for Printed Electronics,” MRS Spring Meeting 2007, April 9-13, San Francisco, paper N1.7.
- Peter T. Herwig, Klaus Müllen, “A Soluble Pentacene Precursor: Synthesis, Solid-state Conversion into Pentacene and Application in a Field-effect Transistor,” Adv. Mater., Vol 11 (6), pp. 480-483, 1999.
- C.D. Sheraw, et al., “Functionalized Pentacene Active Layer Organic Thin-film Transistors,” Adv. Mater., Vol. 15, pp. 2009-2011, 2003.
- Zhenan Bao, “Patterning of Organic Semiconductor Materials for High-performance Transistors,” MRS Spring Meeting 2007, April 9-13, San Francisco, paper N1.3.
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Katherine Derbyshire is a contributing editor at Solid State Technology. She received her engineering degrees from the Massachusetts Institute of Technology and the U. of California, Santa Barbara. She is the founder of consulting firm Thin Film Manufacturing, [email protected], http://www.thinfilmmfg.com.