Improving wafer yields with integrated all-surface inspection
06/01/2007
Although backside defects have historically received much less attention than frontside defects, semiconductor manufacturers now realize that backside defectivity can contribute significantly to yield loss. Fortunately, much of this loss can be prevented or recovered if the defects are found soon enough. Yield-robbing backside defects are typically much larger than frontside defects, and the micro-defect inspection tools used on the frontside are not well suited for backside applications; the requirement that they detect very small defects makes them relatively slow and expensive. Macro-inspection tools, tuned to detect defects ≥5µm, are quite sufficient to capture most backside defects that can decrease yield, and are faster and less expensive to operate compared to micro-defect inspection tools.
Backside defects come from a number of sources that are often quite different from frontside mechanisms. For instance, backside particles can lodge between the wafer and a chuck, causing distortions in the front surface that adversely affect several processes. In photolithography, the distortions cause local areas of poor focus known as hotspots. In chemical-mechanical planarization (CMP), they cause nonuniformities in local removal rates and corresponding variations in the final layer thickness. In immersion lithography, particles can contribute to overall contamination of the chamber if left undetected. Backside contamination can also cause arcing on electrostatic chucks and temperature variations on thermal chucks.
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Other backside defects can be quite large, sometimes spanning the entire wafer. Scratches from handlers and CMP processes and residual films left by backside removal and cleaning processes are examples of large defects. Such defects typically appear as collections of point defects arranged in characteristic patterns across the wafer, and are not accurately detected and classified by the die-to-die comparison methods used for frontside inspection. However, spatial pattern recognition (SPR) routines can recognize and accurately classify many larger defects. Often the pattern provides an essential clue to the root cause of the defect.
Inspection methodology
The data presented here were acquired with an image-based macro-defect inspection system equipped with integrated backside and edge inspection modules (Rudolph Technologies AXi, E20, and B20). The frontside inspection collects images and compares them die-to-die with a dynamic die model. It readily detects a range of process and wafer anomalies, including hotspots and other pattern defects.
The backside and edge inspections are also image-based and may use either dark-field or bright-field illumination. The edge inspection uses multiple cameras to image the complex geometry of the edge region. It can detect physical cracks, chips, and delamination, as well as process variations. In particular, it provides accurate information regarding the edge-bead removal process, including the alignment among multiple films that is critical to preventing delamination.
The backside inspection module performs an unpatterned inspection and determines the wafer’s center and orientation as a reference for reporting defect locations. The image-based inspection includes color information that can be critical for accurate defect classification and root cause analysis. Usually the images acquired during the backside inspection are sufficient to immediately determine the defect’s root cause, eliminating the need to revisit the defects for optical or SEM review, which is important late in the process when the high value of the wafer makes such review prohibitively expensive-the wafer must be placed frontside down on the review stage.
Integration of the backside and edge inspection modules with the frontside inspection tool permits a streamlined and seamless process flow. Wafers proceed directly from one surface inspection to the next without unnecessary handling and with minimal reduction in inspection throughput. At the end of the inspection, results are presented with front and backside defect locations accurately correlated, and color defect images are immediately available for review. Of course, all inspection data may also be uploaded to a fab-wide data management system, but there is no need to do so before obtaining actionable data.
The immediate availability of correlated data significantly reduces the time required to take corrective action and the amount of work in process that is put at risk in any yield excursion. In photolithography applications, some manufacturers have shifted from after-develop inspections to pre-exposure inspections that can detect troublesome backside defects and divert wafers for cleaning, eliminating the investment of costly exposure time in defective wafers, and also avoiding the effort and cost of reworking developed wafers.
Hotspot detection
Hotspots result when a particle lodged between the wafer and the chuck distorts the front surface and causes local loss of focus (Fig. 1). Such particles are usually flattened significantly by the forces developed and must be relatively large to create a hotspot. A lower detection limit of 5µm is sufficient to detect particles that can cause hotspots. Hotspots are of particular interest because, if they are detected prior to the etch process, they offer an opportunity to rework the wafer and prevent yield loss. Since the hotspots are themselves frontside defects, proper analysis requires the ability to correlate their locations with the backside defects that cause them.
Immersion lithography is also vulnerable to hotspots caused by backside contamination. Although providing greater depth of focus (DOF) than equivalent dry technologies, any DOF increase will certainly be consumed rapidly at smaller technology nodes. An additional defect mechanism in immersion systems lies in the contamination of the fluid or the lens by backside residues.
Many of these residues hide in the backside region near the wafer edge that is designated as “zone 5” by Sematech. Such zone 5 defects often escape detection because common laser-based backside micro-inspection tools have a 3mm backside edge exclusion that prevents inspection of this critical area. Newer backside macro-inspection technologies do not have such limitations and can inspect all the way to the edge bevel, revealing hiding places of potentially killer backside defects.
Color imaging
Color information can be critical in detecting and identifying a range of defect types. Slight color variations can be used to detect photolithography hotspots on the frontside of the wafer. Color is even more important on the backside where the subtle differences revealed by frontside die-to-die comparison techniques are not available. For example, color variations often signal the presence of residual films left by backside cleaning or film removal processes.
 Figure 2. Color variation signals the presence of residual film on the backside of this wafer. |
Figure 2 shows an example of under-etching in the removal of a backside oxide film. The color information provides an immediate indication of the defect’s classification and root cause, permitting rapid correction of process parameters and potentially enabling reprocessing to recover yield. Residual backside films can cause defects on the frontside of adjacent wafers, or they may contaminate handlers, chucks, and tracks.
Spatial pattern recognition
Spatial pattern recognition (SPR) is used to classify large backside defects on the basis of wafer scale patterns. Accurate SPR requires the ability to first associate individual point defects into a pattern and then to distinguish one pattern from another on the basis of rules or recipes that describe such characteristics as size, shape, orientation, and position. For example, over-etching of a backside oxide film can leave a characteristic spiral pattern if etching chemicals drip unintentionally onto a spinning wafer.
Figure 3 shows a wafer map containing a number of different large-scale defects that must be correctly recognized by the SPR routines. Wafer handling is a frequent source of backside defects, either through damage or contamination. A three-point handler (A) left defects equidistant from the center and spaced at 120° intervals. Suction cup marks (B) are small, circular, and not concentric with the wafer. A wafer chuck (C) left a larger, circular pattern that is concentric. A scratch, probably left by a track (D), forms a linear pattern. As the importance of SPR has grown, manufacturers have begun to catalog the signatures of production tools, often requesting drawings of components such as chucks and handlers that are likely to leave characteristic defect patterns.
A root cause analysis of backside defects progresses from initial detection through FIB characterization. The initial backside scan may show an overall pattern that suggests a vacuum chuck, which, upon closer examination with dark-field imaging, could appear as sparse clusters of randomly distributed defects. FIB imaging at 80× reveals denser texturing within defects, while FIB cross-sectioning followed by imaging at 6500× would show the texture to be composed of densely spaced pits of fairly uniform size and shape. This type of pitting is typical when early surface damage such as a scratch is magnified by a subsequent etching process (Fig. 4).
Conclusion
New processes and technologies introduced at advanced technology nodes bring with them new defectivity mechanisms, both random and systematic. In many cases these mechanisms involve defects that occur on the backside or edges of the wafer, surfaces that have traditionally received less attention than the frontside.
An all-surface inspection solution that addresses many of the deficiencies of conventional inspection technologies is optimized to detect defects larger than a few micrometers in diameter, the range for backside defects that contribute most significantly to yield loss. Integration of front, edge, and backside inspection capability in a single tool maintains production level throughputs with no additional handling, and provides immediate correlation between front- and backside defect locations.
A sophisticated spatial pattern recognition (SPR) capability groups and classifies patterns of defects at the wafer scale. Color image-based technology adds to accurate size, location, and shape information, and the immediate availability of images permits rapid root cause determination without the need for additional optical or SEM review. Fast, reliable, automated all-surface inspection allows manufacturers to inspect more frequently and sooner in the process. Faster detection of excursions, diagnosis of root causes, and execution of corrective actions results ultimately in shorter development cycles for new products and improved yields in high volume production.
Alan Carlson received his BA in management and marketing from Assumption College. He joined Rudolph Technologies (formerly August Technology) as a process applications engineer in 2005. Rudolph Technologies Inc., 4900 West 78th St., Bloomington, MN 55435, United States; ph 952/820-0080, e-mail [email protected].
Tuan Le received his BS in mechanical engineering from the U. of the Pacific and his MBA from Cornell University. He is the all-surface product manager at Rudolph Technologies Inc.
Joseph Hallen received his bachelors in industrial technology from the U. of Southern Maine. He is in the Metrology Engineering Group at National Semiconductor in South Portland, Maine, United States. He supports the macro, edge, and backside inspection equipment and process functions for the Defect Detection and Prevention group.