A double-line/double-patterning process to extend immersion beyond 45nm
06/01/2007
Since the fall of 2003 when immersion lithography produced its first images and began appearing on roadmaps, the technology has made rapid progress towards maturity.Defectivity levels have improved to well below 50/wafer in several state-of-the-art processes-comparable with dry lithography, as are immersion’s overlay specifications. The newest exposure systems achieve a numerical aperture (NA) of 1.35, up from 1.2 in the spring of 2006, with production-worthy optical quality in terms of lens aberration and other characteristics.
 Figure 1. Resist picture of 36.5nm 1:1 dense lines/spaces using dipole illumination. |
When combined with advanced illumination modes, such as customized pupils, immersion lithography can achieve a depth-of-focus budget >300nm, more than 50% better than dry lithography. These advances not only demonstrate the potential to put this technology into production this year, but can also enable the industry to adopt immersion-based double-patterning techniques, extending optical technology even further into the future. The following sections review the progress made in readying immersion lithography for volume production.
Numerical aperture
The imaging performance of an immersion system with a NA = 1.20 was examined in detail in 2006 [1]. Today, the maximum NA achievable with water (1.35) has been realized. This improvement in NA supports the continued drive for device shrinks that the semiconductor industry demands, enabling 40nm half-pitch resolution. For flash and DRAM applications, in particular, 1.35NA offers significant potential for design shrinks compared to 1.2NA:
- R&D and volume production of 55nm, 50nm, and 45nm DRAM with a k1 >0.3 can be achieved; and
- R&D and volume production of 50nm, 45nm, and 40nm flash, which has the least stringent k1 requirements, can be achieved with a k1 factor close to the resolution limit of 0.25.
The case for logic design shrinks and the role of increased NA at the 45nm node is a little less clear cut; determining whether 1.2NA or 1.35NA should be used depends entirely on the actual pitch of the application. Looking at 32nm, 1.35NA offers significant extension potential, as well as the possibility of entering production at this node with single-exposure processes.
Optics
Having very low lens aberrations is critical to imaging at 40nm and below if the device design patterns are to print correctly. The current state-of-the-art lens performance has demonstrated Zernike RMS values below 4mλ and grouped Zernike aberrations below 2 mλ [2].
Looking into imaging performance, the ultimate resolution with immersion that has been achieved to date is shown in Fig. 1, which illustrates printed features with a half pitch of 36.5nm using dipole illumination. The example in Fig. 1 corresponds to a k1 value of 0.255 that is very close to the theoretical limit of 0.25. The capability of the 1.35NA lens is demonstrated, revealing very high image contrast. Other contributions to image quality, such as, polarization, stray light, and dynamics, are shown well under control.
Utilizing an illumination mode called C-quad, both horizontal and vertical 38nm half pitch lines can be printed simultaneously [2]. The resulting overlapping depth-of-focus (DoF) is >300nm. Given the level of focus control and question of focus budget discussed previously, this DoF value is large enough to achieve a robust process window.
 Figure 2. Reverse 8-wafer dedicated chuck overlay is <3nm and supports 32nm double patterning with a scan speed of 600mm/sec. |
Overlay
Overlay is also of key importance for both single- and double-exposure applications. A single-machine overlay as narrow as 6nm has been achieved. By ensuring that different layers get exposed on the same chuck of a dual-chuck immersion scanner, overlays as tight as 2.6nm can be achieved, even at maximum throughput. Such overlay performance paves the way to double-patterning applications that will enable resolutions well below 30nm. The dedicated chuck overlay of <3nm is shown in Fig. 2.
 Figure 3. XT:1700i data showing defect performance for all scan speeds; immersion defects are <5 defects/wafer. |
Defectivity
Immersion defectivity has been of key interest in the last several years as the technology has developed. During 2006, a broad range of immersion processes became available that exhibited single-digit defect counts per 300mm wafer, thus equaling dry scanner performance. Defectivity is essentially no longer an issue in terms of immersion’s effectiveness vs. traditional dry lithography, as shown in Fig. 3. However, the quality of incoming wafers is much more important in immersion lithography compared to dry lithography. In terms of defectivity, we have found that certain resist stack combinations and wafer edge schemes work better than others, which is described in detail [3].
Double patterning
 Figure 4. Schematic flow of a double-line process (double-patterning process). Top down and cross-section micrographs of the final 32nm lines and spaces are also shown. |
While immersion can extend optical lithography further than was thought possible just a few years ago, the industry is already looking at a means of extending immersion lithography below 32nm imaging. One possible solution is the use of double-patterning techniques. Many double-patterning processes exist; a common one, the double-line process, is depicted in Fig. 4. In the double-line process, lines are printed and etched into a hard mask, which is followed by printing and etching of a second set of lines onto a second hard mask or substrate. Subsequent processing reveals the final image, which is a combination of the two sets of lines. Obviously, tight overlay performance is critical to this and other double-patterning processes in order to avoid misalignment of the two alternating groups of lines.
While very strict overlay is necessary, part of the value of these techniques lies in relaxed k1 values. For 32nm lines and spaces, the final k1 is 0.2 when printed at 1.2 NA, and 0.22 when printed at 1.35NA, which corresponds to 0.4 at 1.2NA, and 0.44 at 1.35NA, in the individual exposure steps. This k1 is relatively large compared to current single-exposure conditions typically found today, such as 0.28-0.3 for flash memory applications. Such a large k1 allows good critical dimension uniformity (CDU) while using OPC-friendly illumination modes, for example, annular illumination, which is demonstrated in Fig. 5.
The CDU of these 32nm lines (duty cycle 1:1) was measured over the full wafer to be 4.9nm at 3λ; the major contributors to this variation were the processing and etch variation across the wafer and the reticle CD contribution. The processing and etch contributions can be compensated by applying a dose offset per exposure field (4.5nm CD range over the full wafer). After the interfield correction, the full-wafer CDU is 4.2nm 3λ and the intrafield profile, which is mainly caused by the reticle, becomes visible. Removing the reticle contribution (reticle CDU is 2nm at 1×, with a mask error enhancement factor of 2.2) by applying DoseMapper intrafield corrections, results in the full wafer CDU of 2.5nm at 3λ.
 Figure 6. Double- patterning results with a) 64nm pitch for flash, b) 100nm pitch for DRAM, and c) 117nm pitch for logic. |
Figure 6 shows a collection of double-patterning images being printed in a joint collaboration with IMEC on an XT:1700i. For flash, the minimum k1 for 0.17 and below is possible because of the one-dimensional nature of the pattern; for logic resolutions, k1 down to 0.22 can be expected.
Conclusion
While there have been several challenges to overcome, immersion lithography has gone from conception to production-worthy in just about three years. The technology has demonstrated the necessary image performance and has shown that critical variables such as focus, overlay, and thermal issues can be managed to enable immersion to extend optical lithography to the 45nm node and beyond. Current immersion technology can be coupled with double-patterning techniques, such as the double-line process described here, to potentially extend optical lithography to the 32nm node and beyond.
References
- C. Wagner, R. Kool, T. Modderman, H. Jasper, K. Ronse, “Immersion’s Evolution Launched the Age of Hyper-NA lithography,” Solid State Technology, p. 32, May 2006.
- J. de Klerk, et al., “Performance of a 1.35ArF Immersion Lithography System for 40nm Applications,” Proc. SPIE, Vol. 6520, 2007.
- Jan Mulkens et al., “Defects, Overlay, and Focus Improvements with Five Generations of Immersion Exposure Tools, Proc. SPIE, Vol. 6520, 2007
Christian Wagner received his PhD in quantum optics from the U. of Munich and is senior product manager at ASML, De Run 6501, 5504 DR Veldhoven, The Netherlands; ph 31/40-268-3000, e-mail [email protected].
Jo Finders received MSC and PhD degrees in physics and is an imaging scientist at ASML.
Jos de Klerk received his masters at the Technical U. of Delft and is XT:1900 product system engineer at ASML.
Ron Kool received his MSC and PhD degrees in mechanical engineering, specializing in measurement and control engineering, and is senior director of product marketing at ASML.