Scaling and complexity drive LCD yield strategies
02/01/2007
The display industry is growing at two to three times the rate of the semiconductor industry. Indeed, the display industry growth rate emulates that of the early days of semiconductors (see Fig. 1) [1]. The display market is dominated by liquid crystal display (LCD) technology, which is used exclusively in notebooks, for 80% of all computer monitors, and for an ever increasing percentage of TVs. Most of the small display market, from cell phones to portable video players and cameras, also use LCDs. The manufacture of LCDs is similar to semiconductors in that the active backplane is an array of thin film transistors. The LCD factories use technologies and systems that are similar (albeit vastly scaled up) to semiconductor factories for processing these backplanes.
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Although the technologies and processes may be similar, there are significant differences in the two industries. The differences affect the manufacturing strategies and yield management practices (Table 1) [2].
Performance trends in displays
All display technologies have been improving in performance. The most recent available TV display performance is shown in Table 2 [3, 4]. The table compares conventional, widely available cathode ray tube (CRT), plasma (PDP), and LCD performance. Also shown is the level of performance presented at technical conferences on pre-production displays. These pre-production displays typically become available within one to two years of their first exhibition.
 Figure 1. The display industry’s growth rate emulates that of the early semiconductor industry. |
To give context to these numbers, motion picture response times (MPRT) of ≤6 msec are generally acceptable [5]. Technicolor film has about a 120% National Television System Committee (NTSC) color range and digital cinema standards (Star Wars films, for example) are 92% NTSC. The contrast ratios shown are those of the manufacturers and are measured in a dark room for peak brightnesses. Actual American National Standards Institute (ANSI) checkerboard pattern contrast numbers are substantially lower for CRT and PDP displays; normal values are about 500:1 for these technologies. A brightly lit room will also reduce all the contrast ratios.
 Figure 2. Trends in substrate area vs. equipment costs. |
LCDs in brightly lit rooms have much higher contrast ratios than the CRTs and PDPs due to the LCD lower screen reflectivity. Movie theater contrast levels are typically 500:1 [6]. To avoid seeing individual pixels on a 1MPixel resolution screen (720p) requires a viewing distance of ≥5× the screen height, while a 2MPixel screen (1080p) can be viewed at 3× the screen height, and an 8MPixel at 1.5× the screen height. Home theater is defined as viewing distance ≤3× the screen height, which is equivalent to 30° or greater horizontal screen width.
Manufacturing trends in displays
Since the next generation LCDs will have performance significantly greater than any program input and all previous displays, further improvements will center on efficient manufacturing and cost reduction. Cost reduction is essential because the adoption of LCD technology is very price sensitive. It is estimated that for every 1% drop in display price, the sales go up ~2% [7]. Price reductions put pressure on factory profits. The industry has the same supply cyclicality as the semiconductor industry, with new fabs causing oversupply that is absorbed by price reductions driving additional demand. The price reductions must be met by concurrent cost reductions if profit margins are to be preserved. Cost reduction strategies include substrate scaling, fab equipment cost reduction, materials cost reduction, and yield improvement.
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The traditional way to reduce costs was to scale the substrate similar to the semiconductor scaling of wafer sizes. Revenue and material costs for displays are proportional to the display area. New substrates would double the area the fab would produce, doubling the revenue per plate. The equipment costs would increase ~30% for each generation, much less than the area growth, allowing a more efficient fab. This doubling of area per generation of substrate growth cannot be sustained indefinitely since there are transport limits to the size of the substrates. Generation 10 is near these limits [8]. Figure 2 shows these trends normalized to generation 1 and assume a constant 30% per generation increase in equipment costs.
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Substrate scaling has driven the cost contribution of the capital equipment down to ~10% of the module cost, but there are efforts to reduce it further. As in semiconductor fabs, the largest portion of the equipment costs is in lithography; two parallel efforts are being used to reduce these costs. The first is to reduce the number of masks used in the array fabrication from 5 to 4 by use of slit or phase shift masks [9]. The second is even more ambitious: eliminate the use of lithography in the color filter by replacing it with ink jet direct deposition of the color patches [10]. Generation 8 fabs are the first to attempt this replacement approach. Further out are techniques to eliminate lithography from the array process and allow roll-to-roll processing similar to printing presses [11].
The cost of materials, which comprises 60-70% of the finished module cost, can be reduced by eliminating high-priced films, such as triacetyl cellulose (TAC) in the polarizer stack, or substituting less expensive materials [12]. In addition, complex stacks of films, such as the backlight collimation/diffusing stack are being simplified. Another material reduction is accomplished by incorporating the gate drive circuitry directly on the array substrate, which eliminates the gate driver IC costs [13].
 Figure 3. Advanced TV pixel: a) equivalent circuit, and b) cell layout with 1:2 area ratio. |
Unfortunately, the backlight unit is the highest cost component. Replacing the backlight’s simple array of cold cathode fluorescent tubes with an array of individually addressed red, green, and blue LEDs produced the good performance shown by the pre-production LCD TVs of Table 2. By modulating the LEDs in tandem with the LCD panel, an additional 8 to 10 bits of contrast ratio and luminance resolution is obtained. In addition, since the LEDs are tuned to the desired output color, much wider color range and black level purity are possible. The LEDs contain no mercury and consume 30-50% of the power of a normal backlight, making them very environmentally friendly, but the drawback is cost. As the LEDs are still fairly expensive, this will add ~$1000 to the price of a 40 in. TV early this year. This addition could fall to $500 by the end of this year and will continue to fall as the LED prices drop.
Yield improvement for cost reduction
The most pure form of cost reduction is yield improvement. Every dollar saved in yield is direct profit. As was shown in Table 1, the yield in LCD factories tends to be driven by random, particulate type defects. Substrate scaling cost reduction forces each fab generation to be larger to the point where modern fabs are many football stadiums in size. Factories this large cannot be made low in particulates and so the yield is challenged. The pixel count on panels is rising because higher resolution is required for larger monitors and TV displays. Finally, the pixels themselves are becoming more complex to meet the requirements of wide viewing angle and fast motion reproduction without blurred edges. A typical wide viewing angle pixel is shown in Fig. 3 [14]; it utilizes twice as many drive transistors as a normal pixel and has independent sub-regions that must be individually tested.
 Figure 4. Poisson yield model with a range of typical fab defect densities and sensitive areas. |
Added particulates and added complexity are the two variables of a classic Poisson yield model. The equation is an exponential with defect density and defect sensitive area as arguments. Figure 4 shows a model with a range of typical fab defect densities and sensitive areas. The exact yield of the fab will be determined by where they are on this surface. The main point is that as the pixels become more complex, their sensitive area increases. As the panel sizes increase and the fabs become larger, the particulate levels increase. Both of these issues have profound effects on yield, and data from multiple customers bears this out.
 Figure 5. Yield vs. panel size in a fab. Yield is reduced as panel size increases. |
Simpler panels in smaller fabs tend to have higher yields than the most complex panels in the largest fabs. This is true whether it is a TV panel fab with products ranging from 26 in. to >50 in. or a monitor fab going from simple twisted nematic 15 in. panels to 30 in. high speed gaming monitors with advanced pixels. As an example, Fig. 5 shows yield vs. panel size in a fab. It is clear that the yield is impacted by larger panel sizes. These larger panels also tend to have the more advanced pixel designs and are often at reduced production levels, contributing to the yield losses.
 Figure 6. Repair overbuy analysis. |
Yield is also affected by the factory and product maturity. When a fab is starting to ramp, its output and yield are both improving with time. It is simple to show that as the fab ramps, there will come a point where the actual repair capability required is ~2× what the steady state requirement will be. For this reason, most fabs overbuy their repair systems for their initial phase (Fig. 6) [15].
Newer, larger, more complex displays are coming to the market. The pricing of the panels is determined by panel area but also, as shown in Table 1, by brand. Brand premiums for TVs are ~50%, a huge amount of money to the manufacturer. Premium module prices are allowed for premium brand end products. This can be the difference between profitability and losses. But a brand premium can be destroyed by getting a reputation for poor quality. This makes defect detection and repair crucial. A final factor making yield critical is the high material costs of the finished product. Proper detection can eliminate wasted materials.
Repair and test
In a typical factory flow, the backplane thin film transistor array is done in 4-5 lithography steps. Optical inspection is done after every patterning step. Often, line open repair (laser assisted CVD) is done at these points. After the array is complete, a 100% functional test of every panel and every pixel is performed. The pixel test developed by Photon Dynamics uses a voltage imaging system to map all the pixel voltages across the display. Other technologies used for testing include full electrical probing and e-beam. After test, the panels are sent to repair
eview stations for final disposition. The defects, when possible, are repaired and the arrays are binned. Repair at this stage consists of line open (laser assisted CVD or laser weld) repair and line short (laser cut) repair. Bright point defects can be converted to less objectionable dark point defects if required by cutting them open from the array.
The color filter uses four mask steps if ink jets are not used. Deposition and trim repairs are done after color filter inspection. The backplane and color filter are sandwiched together with the liquid crystal between. These cell assemblies are sealed and trimmed from the larger mother glass substrate. After test, they have the drive electronics and backlight added to complete the module. Inspection and repair points are spaced throughout the process.
Typical transistor array cycle times are 1-2 days. This short cycle time, plus the fact that array test is 100% of the panels, ensures that excursions are quickly found. The cell process also takes <1 day. The module assembly is typically done in a separate facility, much like IC packaging and test. Although the module yield is usually very high, any excursions that do occur will be found days after the cell is completed. Cell inspection then must be highly effective with a mix of human and automated checks. Good panels from the automated test are sent on to module, while flagged panels are sent to human inspectors for verification and disposition. A limited laser cut repair capability is also attempted for any defective cells. Module final inspection usually consists of cascaded human inspectors who ensure that all panels shipped meet the acceptance criteria. Bad modules can often have their backlight and driver electronics recovered, mitigating the yield loss.
Conclusion
The display industry, and in particular the LCD industry, is growing rapidly in unit volume and performance. In addition, the displays are getting larger. With this growth come challenges to control panel costs. Previously successful techniques for cost control included substrate scaling, but these benefits are diminishing. Yield enhancement is an obvious choice for cost control but is challenged by the expanding size of the factories and increasing complexity of the designs. Nonetheless, yield improvement is critical for further cost reductions in LCD products.
References
- DisplaySearch October 2006, VLSI Research April 2006 data.
- T. Pye, “Optimized Inspection Strategies for Cell and Module Inspection,” p. 328, IMID Conference Proceedings, August 2006.
- DisplaySearch CRT/PDP/LCD Monthly databases, September 2006.
- FPD International Conference, manufacturer booth displays, October 2006.
- K.H. Shin, J.Y. Ahn, K.D. Kim, H.H. Shin, I.J. Chung, “Acceptable Motion Blur Levels of an LCD-TV Based on Human Visual System,” p. 286, SID Conference Proceedings, June 2006.
- Wikipedia, “Contrast Ratio.”
- R. Young, “It’s a Flat World After All,” US FPD Conference, March 2006.
- P. Bocko, “The Future of Substrates and Display Applications,” FID Conference, October 2006.
- S. Choi, J. Cho, K-Y. Han, J.H. Jang, J.G. Park, et al., “Novel Four-mask Process in the FFS TFT-LCD with Optimum Multiple-slit Design Applied by the Use of a Gray-tone Mask,” p. 284, SID Conference Proceedings, May 2005.
- J-H. Kim, H. Kim, D. S. Ha, M. Yu, “New Materials for Inkjet LCD Color Filter Manufacturing,” p. 1497, IMID Conference Proceedings, August 2006.
- H-J. Kim, M. Almanza-Workman, A. Chaiken, W. Jackson, A. Jeans, et al., “Roll-to-Roll Fabrication of Active-matrix Backplanes Using Self-Aligned Imprint Lithography (SAIL),” p. 1539, IMID Conference Proceedings, August 2006.
- M. Nakata, M. Ishimaru, S. Ichikawa, H. Nakagawa, H. Nakatani, et al., “Novel Optical Compensation Films for IPS-LCDs,” p. 420, SID Conference Proceedings, June 2006.
- Y.H. Jang, S.Y. Yoon, B. Kim, M. Chun, H.N. Cho, et al., “A-Si TFT Integrated Gate Driver with AC-driven Single Pull-down Structure,” p. 208, SID Conference Proceedings, June 2006.
- Sang Soo Kim, Brian H. Berkeley, Taesung Kim, “Advancements for Highest-Performance LCD-TV,” p. 1938, SID Conference Proceedings, June 2006.
- T. Pye, “Trends in LCD Yield Management,” Korea FPD 2005.
Tom Pye received his BSE and MSEE from the U. of Illinois and is senior director of marketing at Photon Dynamics, 5970 Optical Court, San Jose, CA 95138; ph 408/360-3007; e-mail [email protected].