Boosting production output by outsourcing CMP
01/01/2007
Outsourcing the chemical mechanical planarization (CMP) process module has been successfully implemented to boost production output from an existing wafer fab. By working with Entrepix to provide the additional CMP capacity when needed, STMicroelectronics-Phoenix (ST) is able to react to market demands immediately and maximize total fab productivity without the typical delays of several months to a year required to add internal capacity. The outsourcing of a process module identified as a potential bottleneck avoids upfront capital outlay, as well as the risk of stranded capital in the event of a future downturn.
 STMicroelectronic’s wafer completing post-CMP clean on Entrepix’ Mirra-Mesa CMP tool. |
Established models for outsourcing of semiconductor manufacturing have typically focused on outsourcing the entire wafer fabrication sequence to dedicated foundries. However, this requires either complete reliance on the outsource provider to develop the appropriate process technologies or a detailed process transfer of any specific process modules not already in place. For some companies, a more attractive alternative to full outsourcing is the “fab-lite” model, which may focus on only a portion of the wafer process flow, such as outsourcing of the final interconnect layers. Benefits of this approach include a larger degree of flexibility and the ability to leverage the process technology strengths of both the fab and the outsource provider to best advantage.
Recent market demands required ST to evaluate multiple options to quickly increase total fab production to capture immediate customer demand. After reviewing projected production ramp requirements, it was determined the CMP module did not have the required capacity to support near-term ramp targets, and added capacity would be required. Simply purchasing more tools would not address the problem for several months due to the lead-time required to order, install, and qualify the added equipment. Expanding internal capacity also requires substantial outlays in capital, more fab floor space, and incurs the financial risk of having to carry these fixed assets if wafer starts drop in the future due to product mix changes or an industry downturn. Faced with the possibility of missing opportunities for additional revenue, ST determined that an alternate solution for both oxide and tungsten CMP process modules was required.
Why outsource a process module
The outsourcing of any semiconductor production process is typically driven by a combination of factors related to production demands, technology, timing, capital, or availability of fab floor space. Which factor carries more weight depends on the unique circumstances of the fab at the time. Some fabs desire to leverage an outsource providers’ unique capability and expertise in a specific process to complement their own core competencies.
CMP is unique for several reasons, including its relatively recent widespread adoption by semiconductor manufacturers, the complexity of the process coupled with a limited availability of experienced CMP engineers, and the ability to keep it relatively segregated from other processes in the fab. CMP is also growing rapidly in both the number of device technologies that require it and the number of CMP steps in the process flow for advanced technologies.
For example, the capacity required at CMP can jump 33% or more just by introducing additional levels of metallization for a new device family, even if the number of wafer starts remains constant. Product mix changes or adoption of new materials and process levels can drive even more need for CMP capacity.
Fortunately, since CMP removes material across the face of the wafer, it resets several key wafer metrics, including planarity and surface defectivity. So long as the primary process targets are achieved, the location of the CMP processing does not impact the final product or the downstream processes in the fab. This is frequently not true of other processes like etch and deposition, where the integration may require specific process chambers or implementing rigid maximum queue times before the next unit process. Fortunately CMP processes are not generally subject to these types of constraints, making it an ideal candidate for process module outsourcing.
Process transfer and qualification
The qualification sequences for both oxide and tungsten CMP processes were driven primarily by requirements of the ST engineering department and the internal ST process change review board (PCRB). In short, data had to be generated to prove with reasonable confidence that process metrics measured on wafers planarized at Entrepix matched the metrics of wafers planarized internally. Experiments were performed around these primary areas: removal rate and uniformity, planarization, defectivity, process consistency, residual surface contamination, and yield on product split lots.
 Figure 1. Baseline 25-wafer lot data for oxide removal rate and uniformity on an IPEC CMP system at ST. |
Transferring the oxide CMP process was relatively straightforward since both ST and Entrepix use a combination of Novellus (formerly IPEC) model 472 tools, OnTrak cleaners, and Applied Materials Mirra CMP systems. Likewise, metrology systems were well matched, with the primary film thickness measurement tool being the Thermawave Optiprobe 2600-DUV. Using identical consumables (pads, slurries, conditioning disks, and cleaning chemistries), the process was verified with an initial 25-wafer run for rate and across-wafer uniformity on blanket-film oxide wafers (Fig. 1).
In the same set of experiments, blanket-film defectivity monitor wafers were planarized at Entrepix then analyzed upon return to ST for comparison to baseline data from the fab. The results of this comparison showed that the average defect density on the surface of the oxide was slightly higher for wafers shipped back to ST when they were initially unpacked. However, a simple cleaning process to remove surface fall-on particles was sufficient to return defect counts to a level statistically identical to wafers planarized in the fab. Wafers were also submitted for SIMS/TXRF analysis of surface microcontamination. Across a standard 16-element series focused on residual metals, all values for the wafers planarized at Entrepix were equivalent to or lower than fab baseline values.
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Having confirmed process results on blanket-film wafers, a data package was presented to the PCRB and product split lots authorized for ultimately the most important comparison of device yield. Three lots were allocated at each of two process levels, ILD1 and ILD2, for a total of six product split lots. Each lot was split into roughly equal thirds with two splits planarized on two different polishers at Entrepix and a control split planarized internally at ST. Measurement recipes from the ST Optiprobe were transferred electronically to the Entrepix Optiprobe and pre-CMP measurements on product wafers compared to verify that the polish could be successfully controlled. Table 1 shows that, as expected, yield across all splits was nearly identical with small differences being statistically insignificant given that wafer-to-wafer yield variation within a split is typically up to a few percent.
The tungsten (W) CMP process was also successfully qualified for outsourcing to Entrepix, but required a more significant effort due to differences between the toolsets. ST uses a combination of Novellus 676 orbital polishers and AMAT Mirra CMP tools for W-CMP, while Entrepix uses a combination of Novellus 472s and AMAT Mirra/Mirra Mesa tools. The W process on the Mirra platform was a direct transfer and was qualified in a straightforward fashion using a similar sequence of steps from blanket-film verification through product split lots. Qualification of a W-CMP process on the Novellus 472 tools represented more of a challenge because ST does not generally run tungsten CMP on this platform internally. However, both companies desired the flexibility and additional capacity of having a tungsten CMP process qualified at Entrepix on the Novellus 472 tools.
 Figure 2. SEM photos of tungsten plugs planarized with a) the internal ST process, b) Entrepix Process #1, and c) Entrepix Process #2. |
Fortunately, ST engineering had performed some previous work, and a qualified starting point process was available that only required slight modification to run on the Entrepix 472 tools. In addition, Entrepix had data from an in-house process using a different consumables set that showed certain advantages for manufacturing. Data on blanket-film wafers were generated, showing performance across all metrics of interest and compared to the existing 676 process at ST. Upon review of all blanket-film data, the ST PCRB elected to run three-way product split lots per the following: a baseline run internally on ST’s 676 process, Entrepix’s Process #1 based on ST’s prior engineering development work, and Entrepix’s Process #2 using the Entrepix’s process with a different consumable set. Figure 2 shows SEM photos of tungsten plugs planarized with each of the processes.
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Table 2 shows that all blanket-film metrics, analytical results, SEM photo comparisons, and process yields were functionally equivalent between all three tungsten CMP processes. Upon subsequent review, both processes at Entrepix were qualified and released for production when needed. By choice, the majority of tungsten wafers planarized since production release were run on Process #2 for operational simplicity.
Operational execution
Process qualification and production release are only the first steps in successfully outsourcing CMP. The logistics and monitoring requirements must also be carefully planned and implemented to ensure overall success. Process control plans, SPC limits, operating procedures, metrology recipes, and nearly anything else directly related to the oxide or tungsten CMP processes were either copied exactly or adapted closely from the analogous element in the ST production control system. This approach gives the highest possible degree of confidence that wafers processed by Entrepix will be indistinguishable from wafers processed in the fab.
The shipping of live product wafers-from ST to Entrepix and back to ST-mandated procedures to protect the wafers from breakage and to prevent accidental exposure to a noncleanroom environment. Clear and accurate records are also kept for a written lot traveler for each product lot, and for packing slips, process logs, shipping logs, accounting records, etc. Once debugged, these systems work smoothly and effectively with minimal loading on the process staff.
Maintaining excellence in a complex production system such as outsourced CMP requires diligence and attention to detail. The Entrepix foundry operation is ISO 9001-2000 certified and maintains active continuous improvement programs. ST regularly monitors both in-line data and end-of-line yield to verify that wafers planarized by Entrepix are performing as expected. Any aspect of the operation can be reviewed either in regular meetings or at any time upon request from ST.
During a recent 4-week period, ST was faced with strong production demand and the simultaneous loss of a portion of internal capacity due to one of the high throughput CMP tools being off line for equipment upgrades. Entrepix was able to rapidly allocate additional capacity and provide immediate support to help avoid a severe bottleneck at CMP. In this brief campaign, Entrepix processed over 12,000 wafers and enabled ST to meet production targets without compromising quality or yield.
Time is almost always constrained. By working with an outsource provider to provide flexible process module capacity on demand, fabs can respond almost immediately to sudden increases in demand and capture additional revenue quickly. On an operational level, some additional time is spent in shipping outsourced wafers that may exceed theoretical internal cycle times. However, real-world experience shows that when the internal backlog queue time for a particular process module exceeds the cycle time of outsourcing, there is no time advantage for internal processing and actual cycle time may be dramatically improved by outsourcing.
Summary
STMicroelectronics has outsourced a portion of its CMP processing to Entrepix as an effective alternative to installing more in-fab CMP equipment. This resulted in improved overall fab utilization and higher total wafer output, and enabled ST to meet production commitments to its customers faster than any alternative path would have allowed. In addition, partial outsourcing of CMP is continuing to allow ST to maximize fab space utilization and minimize capital investment while maintaining the flexibility to rapidly respond to changes in production demands.
For many fabs, outsourcing one or a few key processes to increase overall internal fab utilization is a more attractive alternative than complete outsourcing of the device flow. CMP has now joined the short list of process modules proven viable for outsourcing.
Hoang Nguyen received his BS in electrical engineering from Arizona State U. He is a senior CMP process engineer for STMicroelectronics, 1000 E. Bell Road, Phoenix, AZ 85022; ph 602/485-6137, e-mail [email protected].
Mike Goulding received both his BTech (Hons) in applied physics and his PhD in solid state physics from the U. of Bradford, Yorkshire, England. He is the process engineering section manager for the Implant/CMP/Epitaxy Group at STMicroelectronics, Phoenix, AZ.
Todd Gandy received his BS in chemical engineering from the U. of Arizona and his MS in chemical engineering from Arizona State U. He is the process engineering director for STMicroelectronics, Phoenix, Arizona.
Kevin Baker is a senior manufacturing section manager for ST Microelectronics, Phoenix, AZ. He previously managed production activities within the HiVac module.
Kirk Ebbs received his BS from Indiana U. of PA, and his MBA from W.P. Carey, Arizona State U. He is a senior engineer, industrial engineering, for STMicroelectronics, Phoenix, AZ.
Robert L. Rhoades received his PhD, MS, and BS in electrical engineering from the U. of Illinois, Urbana-Champaign. He is the CTO for Entrepix Inc., Tempe, AZ.