ECTC: Focus on integration
09/01/2004
One focus at this year's Electronic Components and Technology Conference (ECTC) was highly integrated components and structures, with leading researchers taking this beyond the integrated passives that are becoming more common.
Integrated passives and filters
Kai Zoschke and co-workers at the Fraunhofer Institute for Reliability and Microintegration [1] reported on a passive integration scheme based on thin-film layers; they looked in detail at the electrical performance of the passive devices and the filters built with them.
The thin-film build-up consisted of an Al2O3 base, 10µm of BCB (benzocyclobutene), 20nm of NiCr (nickel chromium), 5µm of copper, 8µm of BCB, and 10µm of copper. BCB was chosen as the dielectric because of its good planarization characteristics. An 8µm thickness was used as a compromise between high capacitance (which requires a thin dielectric) and insulation properties. A key factor in the selection of NiCr for fabricating resistors was the ability to change the sheet resistance of the layer by a factor of 10 by varying the deposition time. The two copper layers were used to create both capacitors and inductors. Inductors can be either single-layer, where the second layer of metal provides just the connection to the inner end of the coil, or double-layer, where the second layer contributes coils to the inductor (see figure).
The double-layer and single-layer inductors were characterized, and the trade-offs were demonstrated. Double-layer coils can provide approximately 4× the inductance as single-layer coils in the same area, but they have a lower quality factor. The additional capacitance from the two-layer structure can cause a lower resonant frequency, which results in an inferior design. Shifting one layer of coils laterally with respect to the other can mitigate this effect, but it still results in a lower resonant frequency than the single-layer coil.
Fraunhofer also went into depth on the electrical performance of filters created with thin-film passive elements. They designed and fabricated a bandpass filter, two bandstop filters, and a lowpass filter. The results were promising for using this technology to create filters in the 2.4GHz range. The filters were built with a design that considered the parasitic influences of elements and conductors, and good agreement between simulations and measurements was achieved. The capability was demonstrated in a flip-chip mountable integrated passive device.
Integrated substrate technology
A team from Sandia National Laboratories used a BCB/copper structure for its work on what it called "integrated substrate technology" [2]. Rajen Chanchani's group at Sandia stacked BCB and copper layers for capacitors and inductors, but used more layers (up to six metal and five BCB). They also used TaN for the thin-film resistors, rather than NiCr, and the thin-film capacitor dielectric was Ta2O5, instead of the BCB layers that made up most of the dielectric.
 Embedded passive components have been integrated to create filters [1]. |
Sandia's work showed thin-film passives built on different base materials: Si, Al2O3, and low-temperature co-fired ceramic (LTCC). The technology was originally developed for Si and Al2O3 substrates; adapting it for LTCC presented new challenges. Due to shrinkage in LTCC when fired, there was a mismatch in dimensional tolerances between substrate and thin-film layers as originally designed. This was solved with "interface pads" that accommodate different tolerances.
The test vehicle for the technology contained features for characterization of the RF performance. The results were encouraging, with lower measured transmission losses than other papers have reported for LTCC or the GE HDI technology.
The paper mentioned using Sandia's integrated substrate technology to stack wafers and make electrical connections between them. The focus on RF performance suggests that they are working in an area where functional integration within wafers is difficult, which makes a wafer stacking technology more appealing.
Multifunctional interconnections
One of the Georgia Institute of Technology's papers was an update to its "sea of leads" vertical interconnection technology. Muhannad Bakir and James Meindl went into detail on the "sea of polymer pillars" (SoPP) approach [3]. The polymer pillars can provide both optical and electrical interconnection. The pillar is made with a photodefinable material; Georgia Tech has shown different geometries and patterns of pillars. Two different sets of pillars created to demonstrate the range are 60µm dia., 300µm height, and 325µm pitch, vs. 5µm dia., 13µm height, and 12µm pitch.
The basic mechanism for optical communication through the pillars is with a slanted surface on its top face or the pad to which it is connected. The slanted surface, achievable on the pillar's tip with an imprint step, steers optical signals onto the pillar's vertical axis. Electrical interconnections, made by metallizing the polymer pillar exteriors at sites where an electrical connection is desired, create cylindrical path for current to flow. An extension of this dual-function interconnect is creating micro-pipes for thermal or microfluidic functioning. If a metal-coated polymer pillar is processed so that the polymer is removed, a hollow metal tube is left. This can be used to transport fluids being processed in a "lab-on-a-chip" device, for example, or to contain a fluid used to transport heat away from local hot spots.
It is noteworthy that even though these structures are much like what would commonly be called MEMS (microelectromechanical systems), the term "MEMS" is not mentioned in the paper. This might indicate that it is not necessary to segregate functions and structures with somewhat arbitrary (although widespread) names. Once all of this is integrated on one chip, there is less value in trying to categorize chip components.
The continued success of ECTC indicates the papers' impressive quality. IEEE CPMT Society organizers reported the event had its second highest attendance ever. The event's international nature reflects ECTC's stature: >40% of attendees were not from the US, and 30% and 13% of papers came from Asia and Europe, respectively.
References
- R. Chanchani, et al., "Integrated Substrate Tech.," Proc. 54th ECTC, p. 1232.
- K. Zoschke, et al., "Thin Film Integration of Passives — Single Components, Filters, Integrated Passive Devices," Proc. 54th ECTC, p. 294.
- M.S. Bakir, J.M. Meindl, "Integrated Electrical, Optical, and Thermal High Density and Compliant Wafer-level Chip I/O Interconnections for Gigascale Integration," Proc. 54th ECTC, p. 1.
Jeffrey C. Demmin is on the advisory board of Solid State Technology.