Issue



Business Trends and Worldwide Highlights


08/01/2004







Business Trends

Semi: Wafer shipments set records in 1Q04

Worldwide silicon wafer-area shipments rose 9% in 1Q from the previous quarter, and 29% from 1Q03, according to the Semi Silicon Manufacturers Group (SMG), in its quarterly analysis of the silicon wafer industry.


Silicon area shipments in millions of sq. in. (MSI). (Source: Semi)
Click here to enlarge image

Total silicon wafer-area shipments were 1514 millions of sq. in. (MSI) during the most recent quarter, up from the 1392 MSI shipped during the previous quarter. Shipments in all three sectors as well as in total have surpassed the record level set in 3Q00, noted John Kaufmann, chairman of Semi SMG and VP of marketing for MEMC Electronic Materials Inc. "Revenue growth still lags area growth, despite 300mm sales becoming a more significant part of the silicon mix, although prices are starting to firm for smaller-diameter wafers," he added.

SMG acts as an independent group within Semi, serving members involved in manufacturing polycrystalline silicon, monocrystalline silicon, or silicon wafers (not including reclaimed wafers).


WORLDWIDE HIGHLIGHTS

Intel Corp.'s Fab 24 facility in Leixlip, Ireland, has begun production of 300mm wafers using 90nm process technology, one month after the company announced it would invest †1.6 billion (nearly $2 billion) to enable 65nm process technologies at the site by 1H06. The Ireland facility is Intel's fourth 300mm facility, joining sites in Oregon and New Mexico, and the third to incorporate 90nm technology. The company's planned conversion of its Fab 12 200mm wafer fab in Chandler, AZ, to a 300mm/.65nm facility is expected to be completed by late 2005.

TSMC's Fab 14 plant has successfully produced high-yield 300mm wafers at levels equaling those from its Fab 12 operations, just 90 days after initial installation of process equipment. The company also said it has boosted production at its Fab 6 facility to a record 70,000 200mm wafers/month, exceeding its planned 2Q04 capacity by 10%. Half of the wafers were manufactured using 0.13µm process technologies, with a significantly increased percentage of wafers using low-k dielectrics, the company said. Together, the two facilities in Hsinchu's Tainan Science Industrial Park are expected to contribute 25% of the company's total wafer capacity by the end of 2005.

USA

Cadence Design Systems Inc., San Jose, CA, and ASML MaskTools, Santa Clara, CA, have signed a multiyear, multimillion-dollar agreement to develop an integrated design-for-manufacturability (DFM) flow. Under the agreement, Cadence will license and co-develop ASML MaskTools' MaskWeaver and LithoCruiser software packages for resolution enhancement, mask optimization, and lithography process analysis and optimization.

AMD has completed the design of its AMD 64 dual-core processors and plans to launch the technology by mid-2005, right about the time Intel is expected to bring its dual-core chips to market. The chips will be ready for x86 servers by mid-2005, and introduced for high-end desktop PCs in 2H05. The announcement brings AMD in line with Intel, which recently said it would bring its dual-core chips to market in 2005, more than a year earlier than originally planned.

Semi and IEEE have signed an agreement to support each other's efforts in creating nanotechnology and microelectromechanical systems (MEMS) standards, the first such collaboration between the two organizations. Under the partnership, Semi and IEEE will meet periodically to exchange information, as well as update each other's committees and disseminate standards information on nanotechnology and MEMS. The IEEE is expected to publish its measurement standard for carbon nanotubes by 2005, addressing test methods, materials, devices, interoperability, and other topics. Semi's MEMS initiative, now underway, addresses materials, tools, and interfaces.

A new group has been formed to create open standards for unifying IC design and manufacturing information and to counter increasing costs and complexities associated with design for manufacturability (DFM). The Design-to-Manufacturing Coalition's (DTMC) initial focus will be on lithography issues: how to speed photomask and wafer manufacturing ramps and improve yields through the communication of more detailed and comprehensive design, mask, and wafer process information. Charter members include Applied Materials, Cadence Design Systems, DuPont Photomasks, Freescale Semiconductor Inc., LSI Logic, Photronics, and Sagantec.

ASIAFocus

China

Royal Philips Electronics NV plans to transfer production from its chipmaking operations in Stadskanaal, The Netherlands, to China in an effort to strengthen ties with the company's domestic partners. The move would affect 250 jobs and possibly result in layoffs, according to Dow Jones.

Rohm and Haas Electronic Materials, a Philadelphia, PA-based materials company, has opened a new manufacturing facility in Dongguan, China. The largest of the company's five Asia-Pacific operations, the facility will produce technologies to support its circuit board and packaging and finishing businesses.

India

Alliance Semiconductor Corp., a Santa Clara, CA-based provider of chip technologies, said it will invest up to $50 million in its India Design Center over the next five years to expand its engineering and deployment services. The investment is more than twice the company's $20 million investment in its Bangalore and Hyderabad centers, and will double the company's domestic workforce to 300.

Japan

Toshiba Corp. plans to transfer part of its power transistor business, including product development, design, manufacturing, and marketing of high-capacity power module products, to Mitsubishi Electric. The operations consist of only a few percent of Toshiba's total discrete business. Toshiba will continue to supply high-voltage modules to its industrial and power systems and services business.

In other related news, Toshiba Ceramics Co. plans to increase production of 200mm wafers from 350,000 wafers/month to 400,000 wafers/month by September, according to the Asia Pulse Businesswire. The addition of equipment and capacity for annealed-wafer production at its subsidiary Niigata Toshiba Ceramics Co. is part of a ¥4 billion ($35.7 million) spending plan for the company's fiscal year ending March 2005.

Renesas Technology Corp., the chipmaking JV formed in April 2003 by Hitachi and Mitsubishi Electric Corp., has purchased two Tokyo-area chipmaking plants from Hitachi Ltd. for ¥1.2 billion ($10.9 million) to boost its wafer-processing and chip-packaging operations, according to the Nihon Keizai Shimbun. With the investment, the company's manufacturing subsidiary, Renesas Eastern Japan Semiconductor Inc., will effectively raise its output capacity for large-scale ICs by 20% to 18 million units/month.

Fujitsu Ltd. is planning a 20% increase in production of image sensors (mostly CMOS) in fiscal 2004 to 1.2 million units/month, but will use existing production lines to avoid additional capital investments, according to the Asia Pulse Businesswire. Fujitsu produces CMOS sensors at a facility in Fukushima Prefecture, and assembles them into image sensor modules at a facility in Kagoshima Prefecture.

Korea

Hynix Semiconductor has agreed to sell its system IC division to a newly founded group, pending shareholders' approval. The South Korean business will be renamed System Semiconductor Ltd., a group formed by CVC Asia Pacific Ltd. and Citigroup Venture Capital Equity Partners, which facilitated the $822 million sale of Hynix's nonmemory business earlier this year.

Philippines

SunPower Corp., a subsidiary of Cypress Semiconductor, said it has produced an initial lot of solar cells from its manufacturing facility near Manila, less than two months after it opened. Volume production is scheduled for 2H04 at the facility, the Philippines' first semiconductor fab and the first large-scale solar cell facility in Southeast Asia.

Taiwan

Powerchip Semiconductor Corp. plans to spend about $2 billion to build a third 300mm facility in Taiwan, according to a Dow Jones report. Powerchip already has a 300mm facility on-line, with another under construction; combined monthly capacity for these will be 40,000 wafers/month. Once land is purchased, production would follow in about six quarters, depending on market conditions, according to a Powerchip spokesperson.

Swiss firm Unaxis has begun construction of a $29.8 million LCD R&D and assembly facility in the Chunan Science-based Industrial Park in Miaoli County, with a completion date of 2005. The facility represents the company's largest investment in Asia; after its completion, the company indicated it would widen the scope of its Taiwan investments to focus on semiconductors and optical products.

Applied Materials, Santa Clara, CA, has signed a deal to provide global sales and marketing for 300mm test wafers from Phoenix Silicon International (PSI), Hsinchu, Taiwan. Applied also will provide PSI with new technology and equipment for 300mm fab requirements. PSI will perform manufacturing operations for the wafer reclaim services.

Eurofocus

International Sematech has selected German lithography firm Carl Zeiss SMT to develop a defect review tool for 193nm immersion lithography photomasks. An alpha tool of the aerial image measurement system (AIMS) is expected to be available to Sematech member companies by 4Q05, with a commercial tool ready by 2006.

The European Union once again is looking into Intel Corp.'s business practices in Europe, after a renewed complaint by rival AMD. European Commission antitrust regulators, who ruled in 2001 that Intel did not engage in abusive marketing practices, have acknowledged the beginning of "a new fact-finding stage." So far the probe extends only to letters of inquiry to computer makers and retailers.

Renesas Technology Corp. has said it plans to restructure its frontend manufacturing business, resulting in the closure of Renesas Semiconductor Europe by the end of this year. Frontend work for MCU, SRAM, and NOR flash memory will be transferred to manufacturing operations in Japan. The site in Alsdorf, Germany, was opened in November 1989 and employs 520 workers.

Infineon Technologies AG is set to open its newly expanded memory chip assembly and test facility in Porto, Portugal, in which it has invested †230 million (about $277 million) to build a second module at the site. Work began in late 2003, with full capacity of 600 million chips/year expected by mid-2006 — double the current capacity and accommodating roughly 35%–40% of the company's global memory chip production. In total, Infineon has spent about †560 million ($675 million) on the site since 1996.