Technology News
08/01/2004
Designer plasmas solve range of manufacturing problems
Tohoku U. researchers are applying their pulse-time modulation technology to tailor plasma composition for specific processes, showing results in efficiently etching difficult new materials, making ultrathin gate-dielectric layers, and reducing plasma process defects in a range of applications.
The basic pulse-time modulated plasma process, first developed a decade ago, pulses high-frequency power on and off in cycles on the order of several tens of microseconds. The on cycles generate positive ions and radicals in the plasma; the off cycles generate negative ions. Controlling these cycle times regulates the plasma's energy and its composition of charged particles and photons. Current work shows results applying these designed pulsed plasmas to solve specific manufacturing problems in etching PtMn in MRAMs; in uniformly distributing N in ultrathin SiON gate-dielectric layers; in etching Al interconnects and gate electrodes; and in etching CCD micro lenses. Equipment makers have now started to incorporate the technology.
 Figure 1. PtMn was etched with pulse-time modulated plasma using Cl2 gas. Longer off cycles generated more negative ions, resulting in faster etching. |
The pulsed plasma process allows faster and more effective etching of new materials where current processes don't work very well, such as high-k HfO2 gate layers, PtMn and FeNi magnetic layers in MRAMs, and Pt and Au rare metal electrodes. These materials don't react easily with conventional chloride or fluoride plasmas. Alternative high-density or high-temperature plasma processes are slow, while ion milling can build up material on the pattern sidewalls. But the negative ions generated by the pulse-modulated system react easily with these materials. The process etched PtMn selectively in accordance with the mask pattern, with longer off cycle times — that create more negative ions — increasing etching speed by two- to threefold. Conventional continuous-power plasma etching did not etch the material at all (Figs. 1 and 2).
The pulse-modulated plasma technology also allowed better control of N density in plasma nitridization of ultrathin gate-dielectric layers. Adding N to the traditional SiO2 dielectric is one solution to limit voltage leakage in ever thinner gate layers, but it requires uniform control of the N density in a layer as thin as 1–2nm. Too much plasma energy and too much N damage the substrate surface.
The off cycles of the pulsed system reduce the energy at the surface and prevent excess heat buildup. This prevents the deposition of too much N, and greatly reduces the N in the SiO2/Si interface. The method also allows the peak N levels to be moved as close as 0.5nm from the surface, whereas with the standard plasma the peak N level is 1nm from the surface. A transistor made with this technology had about 200% better negative bias temperature instability lifespan.
Another application is preventing dielectric damage by stopping the buildup of a surface charge in etching gate electrodes and Al interconnects. With traditional continuous-power plasma etching, a charge tends to build up on the substrate surface, which damages the gate dielectric layer, and shows up as a voltage shift. The pulse-time modulated approach adds a lower-frequency bias voltage (600kHz) that generates negative ions for half its cycle and positive ones for the other half, thus allowing positive ions through the ion sheath on half the cycle and negative ions on the other half, so no charge builds up.
Longer off cycles and more negative ions resulted in faster etching of polysilicon. With no off cycle, etching rates were around 150nm/min. With a 60 µsec off cycle, they jumped to more than 300nm/minute. Etching polysilicon gate electrodes for a MOS transistor with HBr and Cl2 gas with traditional plasma showed dielectric damage resulting in a gate voltage shift of around 20mV. The pulsed plasma showed almost no shift, suggesting damage had been prevented. Similarly, etching Al interconnects with Cl2 in traditional plasma processes commonly results in threshold voltage shifts at tighter circuit densities, but with a 100 µsec off cycle there was essentially no shift.
The technology was also shown to allow better etching of microlenses for CCDs, preventing the UV damage at the Si/SiO2 interface that degrades image quality. Cycling the plasma off every 50 µsec apparently doesn't give the UV enough time to cause damage. The approach could similarly improve quality by preventing such damage in plasma processes in other image sensors as well.
Seiji Samukawa, Tohoku U., SST partner Nikkei Microdevices
Automated macrodefect system enables 100% real-time inspection
Rudolph Technologies has introduced an automated macrodefect inspection system that allows for 100% inline inspection at lithography and CMP process steps, thereby eliminating the need for random sampling strategies.
 The bright area is a hot spot defect — a type of lithography defect. |
The overall system consists of three tools: i-MOD (the integrated inspection modules for Track and CMP systems), WaferView 320 (stand-alone defect review/detection/classification station), and YieldView (acts as a common knowledge base and recipe server), says director of marketing Chris Morath. With 300mm wafers producing ~2.5× as much product as 200mm wafers, saving a single wafer can have a significant impact on overall yield. The figure shows a hot spot defect that is typically caused by a particle on the wafer's backside or stepper chuck and locally warps the wafer surface during exposure.
"Unlike other kinds of defects, lithography and some CMP macrodefects can be reworked to recover yield," explains Morath. "They are also more likely to occur at advanced technology nodes due to the use of thinner resists and Cu/low-k CMP challenges. Typically, only about 10–20% of all wafers are inspected for macrodefects using manual inspection tools, so ~80–90% of the wafers with random macrodefects will not be reworked and therefore experience some degree of yield reduction."
The WaferView 320 and i-MOD units that can detect defects down to 20µm will be available in Q3; 5µm resolution capability will be available later this year. A macrodefect is typically 50µm or larger.
Small world: Carving 10nm 3D MEMS structures with e-beam
NTT's basic materials science laboratory says it has developed high-speed e-beam technology for making MEMS structures with higher resolution than can be done by etching. Researchers are showing off a 3D map of the world (see figure), with details as small as 10nm, carved into a 60µm globe of PMMA resist, which they say took only two minutes to make.
They've also reportedly made a lattice-type filter with multiple 10nm holes, and a sphere of 100nm pillars spaced 200nm apart, but are still looking for practical applications for the basic processing technology.
 An e-beam has carved the world in 10nm detail on 60??m sphere. (Sources: NTT, Nikkei Microdevices) |
Keys to the precise e-beam carving are control of the stage and control of the beam's focal point. The stage rotates around two axes, so it can be moved with a rotational error of ±0.1° around both the north-south and east-west axes, for very precise positioning under the beam where desired. The stage is also the same shape as standard stages, so it can be used directly on existing e-beam equipment.
Then the focal point of the e-beam is controlled on the fly as the distance from the emitter to the processing surface changes with the 3D pattern's shape and depth. The process uses the strength of the reflected e-beams to maintain a constant 1–2µm distance from the processing surface. — SST partner Nikkei Microdevices