Has outsourcing changed the landscape?
07/01/2004
Solid State Technology asked executives to comment on semiconductor manufacturing models.
'IDM+' model provides best of both fab worlds
Kevin Ritchie, senior VP, Technology & Manufacturing Group, Texas Instruments Inc.
 Kevin Ritchie |
Time-to-market is critical to any semiconductor company. That is never truer than in an "up" market when capacity tends to be constrained, customers are demanding response times equal to or better than in "down" market environments, and competition for market share is at its peak.
TI believes its "IDM+" model — with the "plus" being foundry manufacturing support — provides the best solution by offering the following: volume to the marketplace first; the ability to ramp leading-edge products on leading technology; appropriate scope and size of business; the flexibility to quickly support customer upsides; and maximum return on invested capital and profit margin.
The IDM+ strategy was put in place during 2000. The upturn has validated this model, which targets a 50-50 balance in internal and external capacity for leading-edge logic, 85%–90% internal for mixed-signal ICs, and 100% internal capacity for other products, including high-performance analog circuits.
Internal technology development is the foundation upon which our manufacturing strategy is built for several reasons. In the era of increasingly complex system-on-chip (SoC) products, the ability to closely link circuit designers and the process technologists early in the development cycle is critical to meeting performance specifications and achieving a fast yield ramp. Furthermore, internal development of the process technology eases deployment to both internal wafer fabs and multiple external foundries by precisely defining the electrical specifications each foundry wafer fab must meet. Once a fab meets those electrical specs, other products can be quickly fanned out to a fab with minimal re-engineering, device characterization, and qualification.
A new 300mm wafer fab today will cost in the $2–$3 billion range when fully equipped, and will gross $2.5–$4.0 billion a year in net revenue. Very few companies can afford such an investment. Yet when you look at the financial results of major foundry companies at peak times, you see 35%–50% gross profit margins. The ability to internally manufacture a significant portion of required capacity will provide a competitive advantage against pure fabless companies that must pay for the foundries' profit margins. To achieve this competitive edge requires the IDM to manufacture wafers as efficiently as the foundries used by their fabless competitors. TI's model allows us to closely benchmark ourselves against the foundries we work with to make sure we are matching their efficiency.
As mentioned earlier, customers today are demanding delivery times equal to or better than those of any past history of the semiconductor industry. This is where I believe a mixed internal and foundry strategy has the largest advantage over either a pure IDM internal model or a fabless model. The pure-play IDM requires capacity to be built significantly ahead based on current demand forecasts. Lead-times to add equipment capacity (if you already have fab space) range in time from 6–12 months, from tool ordering to device production shipments. A pure IDM with anything less than a perfect crystal ball will either be short of capacity and forced to stretch out lead-times, or have surplus capacity and underutilized assets. On the other end of the spectrum, a fabless company locked into a foundry's technology will be forced in an upturn to negotiate additional capacity with hundreds of other users or move to a second foundry after time-consuming device re-engineering due to fab technology differences.
In the IDM+ model, the simultaneous qualification of several high-volume devices at different foundries, and significant internal capacity support, achieves maximum flexibility. If demand is higher than anticipated, options include increasing run rates at multiple foundries and adding internal capacity if a sustained ramp is underway. Because the base technology is the same, device movement and sourcing from different foundries is quick and efficient with matched electrical performance. If the market is slower than forecasted, the shared capacity can be reduced, keeping internal utilization higher. This mix keeps lead-times short for our customers.
Financial performance is the final area where a mixed strategy outperforms either a pure IDM or fabless manufacturing strategy when looking at return on invested capital over a semiconductor cycle period. Internal utilization is maximized by not overbuilding and keeping the cost of purchased wafers at a minimum using internal capacity and competition among foundries.
For more information, contact Kevin Ritchie, Texas Instruments Inc., 12500 TI Blvd., Dallas, TX 75243; ph 972/995-2011.
The specialization imperative
Jack Harding, chairman, president, and CEO, eSilicon Corp.,
Mark Templeton, co-founder, president, and CEO, Artisan Components Inc.
 Jack Harding and Mark Templeton |
The sea of change occurring in the semiconductor industry, whether caused by the downturn or a partial cure for it, is influencing every aspect of our industry. Until recently, most semiconductor companies were primarily vertically integrated, with dedicated internal resources for each step in the supply chain, from design to manufacturing and distribution. Today, the industry is in the midst of a fierce period of horizontal specialization, which has permanently altered the supply chain and created exciting opportunities for new semiconductor vendors. The catalyst for the latest industry transformation has been the overwhelming success of the pure-play foundry model, no longer just the domain of early adopters.
From an IP perspective, the success of the foundry model is accelerating at an unbelievable rate. Cost and time-to-market pressures have driven companies involved in IC design to rely on third-party IP to get to silicon faster and more economically. Since 1999, the use of third-party IP has grown phenomenally, from a few hundred to approximately 1300 companies embracing this model.
Will this specialization imperative continue to flourish? All indications are that it will. However, for the model's continued success, specialized providers will have to find ways to collaborate and provide well-integrated solutions to end users.
The first wave of pure-play foundry customers was made up of advanced users with silicon-literate designers that understood all aspects of design, manufacturing, packaging, and test. These companies were willing to make the significant investment required to take direct advantage of the industry's specialized but fragmented offerings. As the foundry model has spread, many potential users are without this broad expertise; they want the comfort provided by an ASIC vendor or other vertical supplier. Of course, this runs counter to the lean, specialized strategy of the foundries and their associated beneficial economics — unless some kind of supply-chain management partner can be found.
The number of new fabless semiconductor companies that need supply-chain management services is growing every quarter. Why are these services needed? (That is, why can't each new fabless semiconductor company just do it themselves?) The answer to this question is complex, but the basic conclusion is: To succeed in this market, companies should focus on what differentiates them from the competition, and outsource everything else. The fiercely competitive landscape demands that each company specialize in what it does best.
A basic product launch scenario will illustrate the leverage that can be achieved through specialization and outsourcing. Assume it costs $25 million to design, manufacture, and launch a chip, all in, with a supply-chain management partner. Doing the same tasks with internal resources can easily reach $32 million (operations staff, ERP system, yield tools, etc.). If you agree with this relatively small delta, the implication is that the ultimate market size needed for this product will vary by $87.5 million, which is a very large number. That is, the $25 million investment requires $125 million in sales to get a 20% R&D line. If a great chip can grab 40% of the market, that implies the market must be $312.5 million to begin the project. The very same scenario in "do it yourself" mode requires a market of $400 million. The difference here can be the margin of victory for many companies.
Clearly, increasing horizontal specialization provides designers with many benefits, but the serious negative side effect is the fragmentation of the overall design solution. Coordinating all of the horizontal providers has become an expensive and time-consuming operation. A re-aggregation of the semiconductor supply chain through a supply-chain management partner is the best solution for many companies.
To help provide an efficient re-aggregation, companies like eSilicon and Artisan Components are working with the industry and with each other to provide designers with integrated product and services offerings. One such effort is the IP subcommittee, sponsored by the Fabless Semiconductor Association. This committee is tackling issues surrounding IP reuse and IP quality. We support and endorse these efforts. These initiatives recognize the responsibility that our companies have to ensure that integrated solutions are available to our customers.
Over the next few years, we expect to see explosive growth in the use of the foundry model, leading to even more industry specialization and to fragmentation of the design solution. The challenge for all vendors will be to find ways to work together to provide integrated and easy-to-use design chain solutions. We invite other members of the new, worldwide, outsourced supply chain to join us.
For more information, contact Jack Harding, eSilicon Corp., ph 408/616-4600, e-mail [email protected]; or Mark Templeton, Artisan Components, ph 408/734-5600, e-mail [email protected].