Minifab operations for SoC production
06/01/2004
A growing trend in broadband-networked digital consumer electronics has led to a paradigm shift in semiconductor manufacturing toward more rapid ramp-up, shorter cycle time, and high mix and low-volume "minifab" operations involving SoC production. For minifabs, traditional multiwafer-processing equipment used in "megafabs" should be downsized and redesigned to be able to perform multiprocesses with single-wafer processing. Minifab tools will have much lower throughput than their megafab counterparts, but must be much less expensive. Single-wafer processing tool sets, including innovative wet-cleaning equipment, provide protection from overcapacity and enable fast response to changing demand.
Paradigms have been shifting in the semiconductor industry, particularly in Japan. At one time, the driving force in the semiconductor market was mainframes, followed by a shift to personal computers. The driving force has further shifted to digital consumer electronic products, and will shift again to broadband-networked ones in the very near future [1]. Combining consumer, networking, and PC applications, digital convergence will create new markets based on a platform of broadband-networked audiovisual and information technologies.
In accordance with this growing trend, the driving force of semiconductor technology has recently been shifting from dynamic random-access memories (DRAM) for computer applications to system LSIs (or systems-on-chips, SoC), mainly for the digital consumer electronics industry. Under pressure from larger commodity DRAM suppliers overseas as well as from the economic situation known as the "DRAM recession," almost all Japanese device manufacturers — except newly born Elpida Memory — have retreated from the commodity DRAM market and begun to concentrate on high-end SoC manufacturing.
DRAM and SoC manufacturing have completely different business models, as shown in the table. DRAM manufacturing is based on a business model involving the fabrication of high-volume, low-mix products, where the key to success is the highest throughput backed up by huge capital expenditures. In contrast, the SoC business model involves the fabrication of low or variable volumes of many types of consumer electronics devices. SoC customers and end-product suppliers demand short cycle times to maximize timely sales of "fashionable" consumer products.
 |
In the rapidly changing era of the broadband Internet, consumers' interests have become more diversified, as well as more whimsical. The advance of broadband networking/information technologies is also occurring very rapidly. For example, the recording capacity of DVDs as well as hard disks has expanded every few weeks, and even the highest-density post-DVD products such as Blu-ray discs are available on the market. Therefore, the life cycle of end-consumer products can be as short as a few weeks or months. Consequently, total production volumes of each model typically will range from several thousand to 30,000 units, except for best-selling video game consoles and some popular digital-camera-embedded cellular phones.
Production methods of the high-end consumer electronic products in leading Japanese electronics firms, such as Sony and Canon, have completely shifted from the traditional conveyer-belt system to the "cell" system, in which a product can be completely fabricated by a single skillful worker. It was found that this cell system is much more efficient than the conveyor-belt system and more suitable for high-end consumer electronics production. The SoC business for this industry is, therefore, based on low (or variable) volume, high product-mix manufacturing, where short cycle times for chip manufacturing are demanded by SoC customers or end-product suppliers to reduce the risks of missing timely sales of fashionable consumer products. In the SoC business, knowledge creation or sophisticated value addition on silicon substrates is another key to success (see "How many 300mm wafers are needed for SoC production?"). Figure 1 shows Sony's roadmap for SoC production for its own use.
Single-wafer processing
In general, semiconductor device manufacturing and its supporting equipment tool sets have traditionally been designed for high-volume production of such products as DRAMs. The large investment associated with fabs sometimes causes overcapacity in the market and results in so-called silicon cycles, making semiconductor manufacturing a risky business.
 Figure 1. Sony's roadmap for SoC production. |
The minifab concept, on the other hand, appears to minimize the gap between supply and demand by relying on small production lines that can be added step-by-step, according to increases in demand. Minifabs require comparatively low levels of capital investment, and they can be adjusted flexibly and quickly to changing consumer tastes, with minimized risk. In many cases only one or two minilines are enough for SoC production in one location. At some point, each consumer electronics plant may have its own backyard semiconductor miniline.
The key attributes of a minifab include 1) less investment with minimized risk, or step-by-step investment by flexibly and quickly adjusting to demand variations; 2) high-mix, low-volume manufacturing, depending strongly on customers' requests; 3) rapid ramp-up and short cycle-time operations; and 4) less energy consumption and almost zero emissions.
 Figure 2. The wafer processing capacity of each equipment tool/process/month in one of Sony's existing 200mm CMOS volume-production lines in Japan. |
Figure 2 shows the wafer processing capacity of each equipment tool/process/month in one of Sony's existing 200mm CMOS volume-production lines in Japan; the production capacity significantly varies from one piece of equipment to the next. It should be noted that, among these tool sets, batch-process tools — such as oxidation, diffusion, low-pressure CVD, and wet cleaning equipment — have excess production capacity, even in the existing megafab with capacity of 10,000 or 20,000 wafers/month. In order to achieve a high tool-utilization ratio with current tool sets, an economically proper fab size will naturally be large.
If the minifab concept were to be implemented with current tool sets, it would not be cost-effective because most tools have excess production capacity, which translates into both excess investment and wasted energy. Therefore, tools suitable for minifabs will not be the same as those found in current fabs. In the minifab setting, equipment must be downsized and redesigned to perform multiple processes without cross-contamination. Minifab tools will have much lower throughput than tools used in megafabs, and they will also have to be much less expensive. Single-wafer processing equipment, including wet cleaning tools, must be installed in the minifab instead of the batch-processing tools preferred in the megafab.
 Figure 3. The repetitive use of ozonated water and dilute HF in the SCROD cleaning process. |
We have developed and implemented a new room-temperature single-wafer spin-cleaning technology suitable for minifab operations. Called "SCROD," (single-wafer spin cleaning with repetitive use of ozonated water and diluted HF), this cleaning process meets the requirements for stricter wafer cleanliness, larger-diameter wafer processing, and greater respect for the environment (Fig. 3). Motivations and challenges behind implementing SCROD in production have been presented elsewhere [2–4]. Innovative technologies suitable for miniline operations are desired, not only for wafer processing but also for assembly and testing, as well as wafer inspection and yield management [5]. In low-volume SoC chip production, soon we will not be able to afford expensive photomask sets for exposing only a limited number of wafers. High-speed multibeam maskless EB lithography will be needed soon.
 Figure 4. An example of a minifab. A minifab cleanroom will drastically reduce the amount of space occupied by ultraclean areas and minimize electricity consumption. |
An example of a minifab is schematically illustrated in Fig. 4. With employment of a minienvironment system, or localized clean environments that isolate wafers from both the ballroom air and personnel, the minifab cleanroom will drastically reduce the amount of space occupied by ultraclean areas and minimize electricity consumption. To avoid the adsorption of airborne chemical contaminants such as organic volatiles on silicon surfaces, wafers should be stored in closed pods [6, 7]. Chemical-free clean air will be supplied to very limited enclosed areas for specific wafer processes, including post cleaning. During such steps, chemical contaminants have a detrimental impact on the performance of semiconductor devices, causing degradation of the gate oxide integrity and the incubation of the CVD film growth, and haze formation on the wafer surface [6, 7].
Summary
A growing trend in broadband-networked digital consumer electronics has led to shifts in semiconductor manufacturing toward shorter cycle-time minifab operations with step-by-step investments, where single-wafer processing is preferable. The minifab protects us from overcapacity and enables us to respond quickly to changing demand. In addition to its high-mix, low-volume nature and low-risk investment advantages, minifab manufacturing enables faster ramp-up times, shorter cycle times, and lower energy consumption and emissions levels than megafab operations.
We look forward to the realization of ideal ultraclean single-wafer transport and process environments for the minifab as a well-balanced total system for the healthy growth of the semiconductor industry.
Acknowledgment
Blue-ray disc is a trademark of the Blu-ray Disc Founders.
References
- News release from IBM entitled "IBM, Sony, Toshiba to develop chip technologies jointly" (http://www.ibm.com/news/us/2002/04/02.html), which includes the following message: "The PC is no longer the driving force in semiconductor innovation. Networking and consumer electronics applications are driving the evolution of a new semiconductor industry — one based on closer collaboration with consumers."
- T. Hattori, T. Osaka, A. Okamoto, K. Saga, H.Kuniyasu, "Contamination Removal by Single-Wafer Cleaning with Repetitive Use of Ozonated Wafer and Dilute HF," J. Electrochem. Soc., Vol. 145, No. 9, pp. 3278–3284, 1998.
- T. Osaka, T. Hattori, "Single-Wafer Spin Cleaning with Repetitive Use of Ozonated Water and Dilute HF ("SCROD")," in Cleaning Technology in Semiconductor Device Manufacturing VII, ed. J. Ruzyllo, T. Hattori, R. Opila, R. Novak, pp. 3–14, Electrochemical Society Proc., Vol. 2001–26, the Electrochemical Society, Pennington, NJ, 2002.
- T. Hattori, "Implementing a Single-Wafer Cleaning Technology Suitable for Minifab Operations," Micro, Vol, 21, No. 1., pp. 49–57, 2003.
- T. Hattori, T. Hashimoto, "Sony's Semiconductor Strategy," a keynote address at the 8th Int'l Symp. on Semiconductor Manufacturing, San Jose, 1999.
- T. Hattori, "Chemical contamination control in ULSI Wafer Processing," in Characterization and Metrology for ULSI Technology 2000, AIP Conf. Proc., Vol. 550, pp. 275–284, American Institute of Physics, New York, 2001.
- T. Hattori, ed., Ultra Clean Surface Processing of Silicon Wafers 3/4 Secrets of VLSI Manufacturing, Springer-Verlag, Heidelberg, Berlin, and New York, 1998.
Takeshi Hattori received his BS, MS, and PhD degrees in electrical and electronic engineering from Sophia U. in Tokyo, Japan, and his DEng from Stanford U. He is the chief research scientist and GM of UCT Laboratories, Sony Corp.'s Semiconductor Network Company in Atsugi, Japan; ph 81/46-230-5461, e-mail [email protected].
How many 300mm wafers are needed for SoC production?
In the broadband internet era, the total production volume of a high-end digital consumer electronic product throughout its life cycle (only a few months) will typically be ≤30,000 units for each model, except the most popular video game console, which sells at levels of a few million units/month for several years, and megapixel digital camera-embedded cellular phones, which sell at levels of hundreds of thousands of units/month for several weeks. In general, the initial production volume for each model of high-end digital electronics will typically be ≤10,000 units because consumer demand is diverse and changes quickly, and also because information technology advances rapidly. Million-unit sellers with a comparatively long life cycle of several years, such as PlayStation2 video game consoles, will be rare exceptions.
If one employs a complicated high-end system LSI (48Mbit DRAM- and 1.5M gate MOS logic-embedded, 90nm technology node-bases) for the high-end consumer product, one can theoretically produce 1800 chips from one 300mm wafer. Assuming production yield to be 50–100% for these chips, only 6–12 wafers will be needed (six wafers with a 100% yield, and 12 wafers with 50%) for the initial 10,000 chips to be produced. System LSIs are not always so complicated and not so integrated. A 25-wafer lot will no longer be able to be composed for one product. Besides, larger-diameter wafers and minimum feature sizes consume a much smaller number of silicon wafers to produce the same number of chips.
On the other hand, only 122 CCD chips can be produced from a 300mm silicon wafer for digital still cameras with 6M picture cells, while only 54 LCD microdisplay devices can be produced on a 300mm quartz wafer for large-size rear-projection TV sets to employ three 1.35-inch poly-Si TFT-LCDs for the three primary color filters, because the chip size of these two types of imaging devices are naturally much larger compared to SoC devices. The production of these imaging chips will, therefore, require consumption of more wafers than DRAM-embedded SoCs.
This is the major reason why Sony started 300mm wafer fab operation in 2000 with both CCD imagers and LCD microdisplay devices, not CMOS devices, by using mostly conventional 300mm equipment without waiting arrival of a total tool set of lower-throughput, lower-priced 300mm equipment available for minifab operations, while other Japanese semiconductor houses have hesitated or postponed their 300mm fab construction/operation. Conventional 300mm equipment would have to be reconfigured with a radically different design concept for the coming minifab era. All single-wafer processing and also very high-speed electron-beam direct-writing (or maskless) lithography would be candidates for such small-lot wafer production at a minifab. Tokyo Electron, Dainippon Screen, and Ebara have jointly established a new firm to develop and market such a lithography system, while existing EB firms' prototypes, such as Advantest's, are under development.
In Japan, a government-funded semiconductor industry consortium at the Association of Super-Advanced Electronic Technologies, an METI affiliate, in Tokyo has been developing equipment technologies for minifab applications of SoC production. It should be noted that Toyota Motors, which has several in-house/affiliate semiconductor plants for a variety of automotive applications, also is a member of the consortium.