World News
02/01/2004
Business Trends
Worldwide semiconductor sales continued to rebound in October, posting the eighth consecutive monthly increase and largest month-to-month gains since 1990, according to data from the Semiconductor Industry Association (SIA).
Worldwide semiconductor sales rose to $15.43 billion in October, a 6.8% increase from the $14.45 billion in September and 23.3% higher than October 2003. While October is typically a strong month, "this exceeds historical norms," stated SIA president George Scalise. "This growth cycle is dynamic and broad-based, drawing strength from all geographic markets, all product sectors, and all end markets." So far in 2003, chip sales have grown 16.4% from last year, and SIA reaffirmed projections of double-digit growth in 2003 and 2004.
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Leading the growth were DRAMs and microprocessors, which were up 8.0% and 6.6%, respectively. Wireless technologies also showed robust growth — flash grew 12.7% and digital signal processors grew 9.3% in October — thanks in part to renewed momentum in China, which adds 5 million new cell-phone subscribers/month. Continued demand for holiday purchases of electronics devices helped boost optoelectronics (up 5.2%) and standard cells (up 6.3%). Scalise also noted a revised US GDP growth of 8.2% driven by strong consumer spending, and an upwardly revised 18.4% increase in business spending on computers and software.
Geographically, all markets reported month-to-month gains slightly higher than September's growth of 4.6% to 8.0%, led by Europe and the Americas. All geographic markets also expanded their year-on-year growth, led by the Asia-Pacific region (31.0%), Japan (24.8%), and Europe (20.8%), with the Americas posting a rare double-digit gain. For the moving three-month average, all markets showed better double-digit growth than in the September period: Americas 15.0%, Europe 19.7%, Japan 12.4%, and Asia-Pacific 22.9%.
WORLDWIDE HIGHLIGHTS
International Sematech (ISMT), Austin, TX, has qualified an ultralow-k material for dual-damascene copper processing at 0.13µm features, using 193nm lithography on 300mm wafers. The porous methylsilsesquioxane (MSQ) film is comprised of silicon-oxygen and hydrocarbons with a k value of 2.5, compared with current materials that have k values between 2.65–3.0 (ideal low k in a vacuum is 1.0).
The Interuniversity MicroElectronics Center (IMEC) in Belgium has demonstrated the use of high-k dielectrics and metal gates at sub-1nm nodes. The material, which uses TiN or TaN gates and HfO2 as a dielectric, scaled down to 0.8nm thickness for both nMOS and pMOS transistors, with better results in terms of conductance, leakage, and threshold-voltage instabilities than polysilicon-based materials. The research was done in collaboration with International Sematech, Renesas, Matsushita, and Samsung.
USA
Veeco Instruments Inc., Woodbury, NY, has completed its acquisition of Advanced Imaging Inc. (AII), Camarillo, CA, a manufacturer of precision bar lapping equipment for thin-film data storage technologies. Veeco will pay up to $69 million for AII, which reported $33 million in revenues over the past 12 months.
Tokyo Electron Ltd. (TEL) and IBM have jointly developed a tunable etch-resistant, antireflective dielectric film for CMOS device patterning at the 65nm node and below. The silicon-based material, which is deposited by plasma-enhanced CVD, aims to improve the resolution and latitude of the lithographic process. IBM and TEL worked on the material with TEL's dielectric CVD chamber at IBM's facility in East Fishkill, NY.
International Sematech, Austin, TX, plans to form a new consortium of fabs and chipmakers to focus on manufacturing infrastructure, methods, standards, and productivity. The new subsidiary, International Sematech Manufacturing Initiative Inc., will aim to help semiconductor manufacturers in council-guided areas. Efforts now underway include e-manufacturing, manufacturing operations analysis, benchmarking and best practices, predictive maintenance system design, and life-cycle assessment.
ON Semiconductor plans to shut down its manufacturing operations in East Greenwich, RI, by the end of 2004, which it predicts will save $20–$25 million/year. The company will assume a $15–$20 million charge in 4Q03. It's the second recent facility closure for ON Semiconductor, which in November announced plans to move backend operations from the Czech Republic to Malaysia.
Corning Inc. plans to consolidate its manufacturing operations for producing fused silica and fluoride crystal materials into its Canton, NY facility, resulting in the closure of operations in SC and MA. The company will take a $70–$80 million charge for the move, which it predicts will eventually save $12 million/year.
Nikon Corp., Belmont, CA, has unveiled plans to introduce ArF immersion-lithography equipment based on its NSR-S307E 193nm lithography tool. The company plans to have a trial model with a NA = 0.85 ready by 2H04, with a preproduction model (NA = 0.92) scheduled to be completed in 2005, and mass production (NA = 1.0) slated for 2006.
ASIAFocus
Japan
Toshiba Corp. and SanDisk plan to build a facility for producing NAND flash memory chips by 2005, according to the Kyodo News International. The $1.9 billion plant in Yokkaichi, Japan, scheduled to begin construction in October 2005, will focus on 300mm wafers with 70nm process technologies, with an output of 10,000 wafers/month.
Soitec and Seika Corp. plan to create a joint venture to provide SOI wafers and other substrates for customers in Japan, China, and Korea. The Tokyo-based business, 70% owned by Soitec, is scheduled to be finalized in April 2004, at the end of Soitec's current fiscal year.
Aviza Technology Inc., Scotts Valley, CA, has opened a subsidiary, Aviza Technology Japan KK, in Kawasaki. Aviza's Japan subsidiary was formed in October after the company bought ASML's thermal business. Aviza Technology has been in the thermal and deposition business for several decades.
Taiwan
UMC is the newest member of the X Initiative, a coalition of companies pushing a new method of designing chip circuitry. UMC is the first pure-play foundry to support the X Architecture, which incorporates interconnects with diagonal pathways vs. traditional right-angle "Manhattan" configurations. UMC is now accepting designs for fabrication at 180–130nm process nodes.
China
Applied Materials and Meidensha Corp. have opened a center in Shanghai to provide remanufactured chipmaking tools and services to Asian customers. The facility is the fourth such site in Applied's worldwide remanufacturing network.
Fujitsu Ltd. plans to outsource production of its 8-bit microcontrollers used in "white goods" such as household appliances to China's Central Semiconductor Manufacturing Corp. (CSMC). Design work will be done by Fujitsu's local subsidiary. Eventually, Fujitsu wants CSMC to produce all of its 8-bit units shipped in China.
Korea
South Korea plans to invest approximately $830 million over the next five years in semiconductor research and development. The majority would go toward development of system-on-chip, memory, and nanoprocessing technologies, with the remainder spent on personnel and research and manufacturing facilities. The investment is part of a plan to boost nonmemory chip exports to 40%, and triple semiconductor exports to $50 billion in 2010.
EuroFocus
The Netherlands
ASML NV, Veldhoven, The Netherlands, and Dainippon Screen Manufacturing Co. Ltd., Kyoto, Japan, have agreed to co-develop methods for linking their track and lithography systems. The two will install Dainippon Screen's 300mm coater/developer in ASML's development laboratory in Veldhoven. Volume tool shipments are slated for January 2004. ASML also has signed a deal with Tokyo Electron Ltd. (TEL) to link the companies' lithography and track systems. ASML will install TEL's Clean Track line with its Twinscan system in Japan, Europe, and the US starting in "early 2004," with volume shipments slated for 2H04.
France
KLA-Tencor, San Jose, CA, and Soitec, Grenoble, France, are forming a joint development partnership to create wafer inspection systems. The tools will be based on KLA-Tencor's Surfscan, optimized for silicon-on-insulator (SOI) wafers at the 90nm and 65nm nodes, and compatible with substrates including strained silicon and SiGe. The first tool is expected to ship to Soitec in early 2004. Soitec also has installed epitaxial equipment to its pilot line facility, and a strained-silicon-on-insulator and strained-silicon germanium-on-insulator at its Bernin II site.
Germany
AMD will build a new 300mm fab in Dresden, Germany. The $2.4 billion Fab 36, the first new chipmaking facility in Europe in years, will be built next to AMD's Fab 30 facility, with volume production scheduled to begin in 2006. The deal, which would generate as many as 1400 jobs in the region, reportedly includes up to $800 million in government grants, loans, and credit guarantees, on top of equity funding from Saxony and a group of European investors.
Plans to build a chip plant in eastern Germany have apparently been scrapped after investor and government funding has fallen through, according to media reports. Communicant's $1 billion plant in Frankfurt an der Oder was announced in February 2001, with production scheduled for this year.
Wacker Group, Munich, Germany, is restructuring sales of polysilicon away from Wacker Siltronic and into the hands of an independent organizational unit, Wacker Polysilicon. The deal, effective in January, will help boost polysilicon production from 4200 metric tons/year to 5000 tons/year by the middle of this year.
Czech Republic
ON Semiconductor has announced plans to move backend manufacturing operations from its facility in Roznov, Czech Republic, to its assembly and test facility in Malaysia. The company says it will keep a frontend manufacturing and design center in Roznov, where it has ties to local technical universities.
Clarification
In the article "Increase device yield with FEOL dry-clean processes," December 2003, p. 38, Reference 5 should read: W. Graff, M. Matson, T. Kellner, T. Pluym, S.O. Nelson, et al., "RF and Microwave Plasma for Resist and Post-Etch Polymer Removal," Solid State Technology, pp. 37–42, December 2001.