Advanced prototyping using step-and-flash imprint
12/01/2005
Developments in step-and-flash imprint lithography have enabled the support of advanced device and process prototyping with mix-and-match overlay capability compatible with photolithography tools. Work is ongoing to improve the throughput of step-and-flash imprint tools and to minimize template and process defects, but the technology has developed enough to allow the fabrication of a few critical levels in advanced semiconductor devices in R&D pilot lines.
By David Wang, Tom Rafferty, Phil Schumaker, Ian McMackin, David Vidusek and S.V. Sreenivasan
Nanoscale feature replication using imprinting or micromolding has existed for several years [1, 2]. Step-and-flash imprint lithography (S-FIL) is a nanoimprint process [2] using a step-and-repeat replication technique, based on low-viscosity, UV-curable liquids (Fig. 1). It has previously been demonstrated that S-FIL can replicate structures as small as 20nm with very low line-edge roughness (Fig. 2), and its resolution appears to be limited only by the electron-beam process that creates the template [3].
Figure 1. The S-FIL process steps. |
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Figure 2. S-FIL resolution is at least 20nm and appears to be limited only by the template fabrication process. |
S-FIL has also shown that it can maintain field-to-field CD control of better than 1nm in the replicated pattern. Using low-viscosity monomers (viscosity of <5cps) leads to a low imprint pressure (<0.25psi) in the process, which results in significantly lower process defects. Furthermore, the low-viscosity liquids allow for nanoscale in situ alignment corrections in the liquid just prior to UV curing, which has shown sub-10nm (3σ) alignment capability [4]. Finally, S-FIL capabilities have recently been extended by the development of the S-FIL/R process, which reverses the tone of the lithography process during etch. The S-FIL/R process has potential advantages with respect to etch, alignment, and throughput [5].
Step-and-flash imprint processes have the potential to enable a variety of emerging device applications that require nanoscale lithography, including patterned media for magnetic storage, surface acoustic wave (SAW) devices, photonic crystals for high-brightness LEDs, micropolarizer arrays, and so on. Working SAW devices [6] and micropolarizers [7] have been made using the S-FIL process. These emerging device applications are critical in developing the template, tool, and process infrastructure for the technology in its early development phases. If the promise of nanoimprint replication is to be extended to address the high demands of advanced IC manufacturing, it is important to leverage the early learning obtained from inserting S-FIL into these emerging applications.
For successful insertion of S-FIL into IC manufacturing, the following process-related challenges need to be addressed:
- printing sub-100nm structures with nonuniform pattern densities;
- etching nanostructures with appropriate CD control;
- precise alignment and overlay with the ability to mix-and-match with photolithography;
- availability of 1× templates;
- achieving appropriate throughput for cost-effective manufacturing; and
- minimizing template and process-induced defects to allow acceptable process yields.
IC device and process prototyping
S-FIL technology has developed to the point today where the first four challenges listed have been substantially addressed. Development work is underway to further improve tool throughput and minimize template and process defects. Significant template-defect, process-defect, and electrical-testing data are still needed to fully develop the technology for IC fabrication. Having addressed the previous challenges, however, S-FIL can be used as a prototyping tool by patterning critical layers and in conjunction with photolithography.
Printing structures with nonuniform pattern density. The S-FIL process uses “drop-on-demand” fluid delivery, which can be tailored to fabricate device geometries that have arbitrary pattern densities. Specifically, the imprint liquid is dispensed on a field-to-field basis, and the volume of liquid deposited/unit area can be varied within the field to accommodate significant pattern-density variations. This is very difficult to achieve with other imprint techniques that use a spin-on film to deposit the imprint material. Figure 3 shows a 25×25mm field that has significant pattern-density variations printed using S-FIL.
Figure 3. A 25×25mm field that has widely varying pattern densities imprinted using the S-FIL process. |
Etching nanoscale structures. Both S-FIL and S-FIL/R use bilayer etch processes for pattern transfer and have been discussed [5, 6]. The results presented in this section were obtained using the S-FIL/R etch process [5]. In particular, the patterning and etching of contact holes into oxide was chosen to demonstrate the capability of S-FIL. Patterning and etching contacts and vias at the 65nm and the 45nm nodes are considered to be a major challenge for advanced photolithography. In addition to issues associated with the basic process resolution, contact and via fabrication using photolithography is complicated by various problems such as variation of pitch within a field, line-edge roughness in chemically amplified photoresists, and large mask-error enhancement factors that lead to stringent CD control requirements on the mask.
Figure 4. 2:1 pitch 60nm contact holes etched into >6000Å of oxide. |
In S-FIL, the template has only binary features and creates a perfect replica during printing. Further, if the S-FIL/R process is used, the template features essentially are holes in fused silica, which can be obtained by using processes that are very similar to the fabrication of binary contact photomasks. Etching of 60nm contact holes into >6000Å of oxide is shown in Fig. 4. The stack consisted of bare Si wafers with an etch stop of SiN deposited on it, followed by deposition of oxide. The pattern transfer process used here etched through the oxide to stop on the SiN hard mask.
Mixing and matching with photolithography. State-of-the-art S-FIL tools use a through-the-template (TTT) alignment strategy and moiré alignment targets to measure misalignment between the template and the wafer. The moiré alignment approach is adapted from proximity x-ray lithography research work [8]. The data reported in this article are based on an experiment in which the level 1 wafer was patterned using 248nm photolithography. The appropriate moiré alignment marks were placed at the four corners of the field in the photomask and patterned onto the wafer. The complementary moiré marks were then placed on the imprint template at the four corners, and the alignment was performed using a field-by-field TTT alignment approach. The advanced S-FIL tools are capable of correcting the six basic alignment errors: x, y, θ, mag-x, mag-y, and orthogonality. It was found that the magnification control on the tool was essential for performing mix-and-match alignment.
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The table shows data from 32 fields/wafer on 200mm Si wafers. For each field, the alignment errors after correction at the four corners were measured. The data for wafer 1 and wafer 2 were obtained without applying any magnification correction on the tool. The data for wafer 3 were obtained while using magnification control. It is clear that the mix-and-match alignment improves significantly with magnification control. The current mix-and-match alignment capability of the S-FIL tools appears to be ~25nm, 3σ. The next step is to obtain comprehensive overlay data that includes an understanding of the contributions of all the various distortion errors associated with the template, photomask, lens, and processing steps. This is currently being studied and will be reported in future work.
Fabricating 1× templates. S-FIL templates are fabricated using standard photomask fused-silica substrates. The template is essentially a chromeless phase mask used in advanced photolithography. The details of 1× template fabrication for S-FIL using commercial Cr-coated fused-silica substrates are discussed elsewhere [3]. It may seem that the photolithography mask has an inherent advantage over templates because a typical photolithography process uses a 4× reduction in its imaging. A recent trend in photolithography involves printing features on the wafer smaller than the wavelength of light, which requires “subresolution” features that are approaching 1.5× the size of the wafer features on the photomask. This trend actually could lead to 1× features on a 4× mask that is 16× the area of the template, proving the advantage is false. This could make the templates cheaper than masks, which would be significant, particularly for low-volume ASICs.
Conclusion
S-FIL can cost-effectively replicate sub-50nm structures, complicated patterns, and 3D structures while providing precise overlay. The technology will likely address emerging market segments such as magnetic storage, SAW devices, high-brightness LEDs, and more. S-FIL is particularly suited for fulfilling the requirements of device and process prototyping of advanced semiconductor devices. The tools support mix-and-match overlay capability with photolithography to allow the fabrication of a few critical levels of a device using imprint lithography. Future editions of the International Technology Roadmap for Semiconductors can also benefit from advanced process development and integration techniques using S-FIL.
The major barriers to extending S-FIL to mainstream IC fabrication include 1) long-term defect control and yield; 2) template fabrication and inspection costs; and 3) tool throughput as a function of cost. Since the technology does not include expensive lasers and optics, the tools are likely to cost significantly less than advanced photolithography systems. Therefore, the key challenge is to develop and demonstrate a lithography process that can approach the long-term yield and productivity of photolithography.
Acknowledgments
The authors would like to acknowledge the employees of Molecular Imprints Inc. and the graduate students at the U. of Texas at Austin that worked on the S-FIL project. This work was partially funded by the DARPA Advanced Lithography Program and by the NIST Advanced Technology Program. S-FIL is a registered trademark of Molecular Imprints Inc.
References
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- M. Colburn, T. Bailey, B.J. Choi, J.G. Ekerdt, S.V. Sreenivasan, et al., “Development and Advances of Step and Flash Lithography,” Solid State Technology, Vol. 46, No. 7, p. 67, July 2001.
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- G.F. Cardinale, J.L. Skinner, A.A. Talin, R.W. Brocato, D.W. Palmer, et al., “Fabrication of a Surface Acoustic Wave-based Correlator using Step and Flash Imprint Lithography,” EIPBN Conf., June 2004.
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For more information, contact David Wang at Molecular Imprints Inc., 1807-C W. Braker Lane, Austin, TX 78758; ph 512/339-7760 ext. 287, fax 512/339-3799, e-mail [email protected].
Tom Rafferty, Phil Schumaker, Ian McMackin, David Vidusek, S.V. Sreenivasan, Molecular Imprints Inc., Austin, Texas